ark1668_lcd.h 12 KB

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  1. #ifndef ARK_LCD_H
  2. #define ARK_LCD_H
  3. #include <linux/types.h>
  4. #if !APP_RUN_PROCESS
  5. #include <common.h>
  6. #include <asm/global_data.h>
  7. #include "ark1668_hardware.h"
  8. #include "ark1668_sys.h"
  9. #endif
  10. #define RED_Y 0x50
  11. #define RED_U 0x5a
  12. #define RED_V 0xEF
  13. #define GREEN_Y 0x90
  14. #define GREEN_U 0x36
  15. #define GREEN_V 0x22
  16. #define BLUE_Y 0x28
  17. #define BLUE_U 0xEF
  18. #define BLUE_V 0x6E
  19. #define BLACK_Y 0x10
  20. #define BLACK_U 0x80
  21. #define BLACK_V 0x80
  22. #define HICOLOR_565 0
  23. #define HICOLOR_X555 1
  24. #define HICOLOR_I555 2
  25. #define HICOLOR_4444 3
  26. #define LVDS_W 1366
  27. #define LVDS_H 768
  28. #define LVDS_PIXEL (LVDS_W * LVDS_H)
  29. #define LVDS_HSW 32
  30. #define LVDS_HBP 80
  31. #define LVDS_HFP 48
  32. #define LVDS_VFP 3
  33. #define LVDS_VSW 5
  34. #define LVDS_VBP 14
  35. #define LVDS_IOE 0
  36. #define LVDS_IHS 1
  37. #define LVDS_IVS 1
  38. #define LCD_W 800
  39. #define LCD_H 480
  40. #define LCD_PIXEL (LCD_W * LCD_H)
  41. //#define HV_MODE
  42. #ifdef HV_MODE
  43. #define HSW 0x15
  44. #define HBP 0x54
  45. #define HFP 0x15
  46. #define VFP 0x18
  47. #define VSW 0x50
  48. #define VBP 0x20
  49. #else // DE_MODE
  50. #define HSW 0x52//82
  51. #define HBP 0x2f//64
  52. #define HFP 0x40//64
  53. #define VFP 0x0//36
  54. #define VSW 0x16//16//20
  55. #define VBP 0x16//40
  56. #endif
  57. #define IOE 0
  58. #define IHS 0
  59. #define IVS 0
  60. #define CONTRAST 0x50
  61. #define BRIGHTNESS 0x80
  62. #define HUE 0
  63. #define SATURATION 0x40
  64. //yuv format
  65. #define Y_U_V 0
  66. #define Y_UV 1
  67. //window format
  68. #define SEQ_Y_UV422 20 //Y_UV422 format for video layer
  69. #define SEQ_Y_UV420 21 //Y_UV420 format for video layer
  70. #define SEQ_YUV422 0 //Y_U_V422 format for video layer
  71. #define PALETTE 0 //palette for osd layer
  72. #define SEQ_YUV420 1 //Y_U_V420 format for video layer
  73. #define YUV422 2
  74. #define YUV444 3
  75. #define RGB_I555 4
  76. #define RGB_565 5
  77. #define RGB_a888 6
  78. #define RGB_888 7
  79. #define RGB_a1555 8
  80. #define RGB_a1888 9
  81. #define RGB_a4888 10
  82. #define RGB_666 11
  83. #define RGB_a1666 12
  84. //screen type
  85. #define PARALLEL_24 0
  86. #define PARALLEL_18 1
  87. #define PARALLEL_16 2
  88. #define RGB_DUMMY 3
  89. #define CCIR_656 4
  90. #define YUV_PANEL 5
  91. #define CPU_PANEL 6
  92. #define RGB_NORMAL 7
  93. //SCALER CUT BOUNDARY
  94. #define LEFT_BLANK 0
  95. #define RIGHT_BLANK 0
  96. #define TOP_BLANK 0
  97. #define BOTTOM_BLANK 0
  98. //LCD ROTATE CONTROL
  99. #define ROTATE_0 0
  100. #define ROTATE_90 1
  101. #define ROTATE_180 2
  102. #define ROTATE_270 3
  103. #define HORIZON_MIRROR 4
  104. #define VERTICAL_MIRROR 5
  105. #define AUTO_FILTER 1
  106. #define MANUL_FILTER 0
  107. #define ENABLE_H_FILTER 1
  108. #define DISABLE_H_FILTER 0
  109. #define MOVE_STEP 8
  110. #define EFFECT_NUM 2
  111. #define LCD_WAIT_FRAME 20
  112. //#define POST_SCALER 0
  113. #define DEINTERLACE 0
  114. #define ITU656_WRITEBACK 0
  115. enum DISP_OSD_LAYER_ID
  116. {
  117. OSD1_LAYER,
  118. OSD2_LAYER,
  119. OSD3_LAYER,
  120. };
  121. enum DISP_VIDEO_LAYER_ID
  122. {
  123. VIDEO_LAYER,
  124. VIDEO2_LAYER,
  125. };
  126. enum DISP_OSD_FORMAT
  127. {
  128. DISP_PALETTE = 0,
  129. DISP_BMP24BIT,
  130. DISP_YUV422 = 0x2,
  131. DISP_YUV422_VYUY = 0x2,
  132. DISP_YUV422_UYVY = 0x12,
  133. DISP_YUV422_YVYU = 0x22,
  134. DISP_YUV422_YUYV = 0x32,
  135. DISP_YUV444 = 3,
  136. DISP_RGB_I555,
  137. DISP_RGB_565,
  138. DISP_RGB_a888,
  139. DISP_RGB_888 = 0x7,
  140. DISP_RBG_888 = 0x17,
  141. DISP_GRB_888 = 0x27,
  142. DISP_GBR_888 = 0x37,
  143. DISP_BRG_888 = 0x47,
  144. DISP_BGR_888 = 0x57,
  145. DISP_RGB_a1555 = 8,
  146. DISP_RGB_a1888,
  147. DISP_RGB_a4888,
  148. DISP_RGB_666,
  149. DISP_RGB_a1666
  150. };
  151. enum DISP_VIDEO_FORMAT
  152. {
  153. DISP_SEQ_YUV422 = 0,
  154. DISP_SEQ_Y_U_V422 = 0,
  155. DISP_SEQ_Y_UV422 = 0x10,
  156. DISP_SEQ_YUV420 = 1,
  157. DISP_SEQ_Y_U_V420 = 0x1,
  158. DISP_SEQ_Y_UV420 = 0x11,
  159. };
  160. #define DispGetYUVFormat(format) ((format) & 0xF)
  161. #define DispGetYUVOrder(format) (((format) & 0xF0) >> 4)
  162. enum screen_type_id {
  163. SCREEN_TYPE_RGB,
  164. SCREEN_TYPE_LVDS,
  165. SCREEN_TYPE_ITU601,
  166. SCREEN_TYPE_TVENC,
  167. SCREEN_TYPE_CVBS,
  168. SCREEN_TYPE_VGA,
  169. SCREEN_TYPE_YPBPR,
  170. SCREEN_TYPE_ITU656,
  171. SCREEN_TYPE_NONE = -1,
  172. };
  173. enum rgb_format_id {
  174. RGB_FORMAT_RGB0888,
  175. RGB_FORMAT_RGB565,
  176. RGB_FORMAT_NONE = -1,
  177. };
  178. enum lvds_format_id {
  179. LVDS_FORMAT_RGB0888,
  180. LVDS_FORMAT_RGB565,
  181. LVDS_FORMAT_NONE = -1,
  182. };
  183. enum cvbs_format_id {
  184. CVBS_FORMAT_PAL,
  185. CVBS_FORMAT_NTSC,
  186. CVBS_FORMAT_NONE = -1,
  187. };
  188. enum vga_format_id {
  189. VGA_FORMAT_800x480,
  190. VGA_FORMAT_800x600,
  191. VGA_FORMAT_1024x768HZ60,
  192. VGA_FORMAT_1280x1024HZ60,
  193. VGA_FORMAT_1900x1200HZ60,
  194. VGA_FORMAT_1280x1024HZ75,
  195. VGA_FORMAT_1280x960HZ85,
  196. VGA_FORMAT_1280x720HZ60,
  197. VGA_FORMAT_640x480HZ60,
  198. VGA_FORMAT_NONE = -1,
  199. };
  200. enum ypbpr_format_id {
  201. YPBPR_FORMAT_480I,
  202. YPBPR_FORMAT_576I,
  203. YPBPR_FORMAT_480P,
  204. YPBPR_FORMAT_576P,
  205. YPBPR_FORMAT_720P60HZ,
  206. YPBPR_FORMAT_720P50HZ,
  207. YPBPR_FORMAT_1080I60HZ,
  208. YPBPR_FORMAT_1080I50HZ,
  209. YPBPR_FORMAT_1080I50HZ_1250,
  210. YPBPR_FORMAT_1080P60HZ,
  211. YPBPR_FORMAT_1080P50HZ,
  212. YPBPR_FORMAT_NONE = -1,
  213. };
  214. enum ark_disp_tvenc_out_mode {
  215. ARKDISP_TVENC_OUT_YPBPR_I480HZ60 = 0,
  216. ARKDISP_TVENC_OUT_YPBPR_I576HZ50 = 1,
  217. ARKDISP_TVENC_OUT_YPBPR_P480HZ60 = 2,
  218. ARKDISP_TVENC_OUT_YPBPR_P576HZ50 = 3,
  219. ARKDISP_TVENC_OUT_YPBPR_P720HZ60 = 4,
  220. ARKDISP_TVENC_OUT_YPBPR_P720HZ50 = 5,
  221. ARKDISP_TVENC_OUT_YPBPR_I1080HZ60 = 6,
  222. ARKDISP_TVENC_OUT_YPBPR_I1080HZ50 = 7,
  223. ARKDISP_TVENC_OUT_YPBPR_I1080HZ50_1250 = 8,
  224. ARKDISP_TVENC_OUT_YPBPR_P1080HZ60 = 9,
  225. ARKDISP_TVENC_OUT_YPBPR_P1080HZ50 = 10,
  226. ARKDISP_TVENC_OUT_CVBS_PAL = 11,
  227. ARKDISP_TVENC_OUT_CVBS_NTSC = 12,
  228. ARKDISP_TVENC_OUT_ITU656_PAL = 13,
  229. ARKDISP_TVENC_OUT_ITU656_NTSC = 14,
  230. ARKDISP_TVENC_OUT_VGA_640x480HZ60 = 15,
  231. ARKDISP_TVENC_OUT_VGA_800x600HZ60 = 16,
  232. ARKDISP_TVENC_OUT_VGA_1024x768HZ60 = 17,
  233. ARKDISP_TVENC_OUT_VGA_1280x1024HZ60 = 18,
  234. ARKDISP_TVENC_OUT_VGA_1900x1200HZ60 = 19, // bandwidth limit
  235. ARKDISP_TVENC_OUT_VGA_1280x1024HZ75 = 20,
  236. ARKDISP_TVENC_OUT_VGA_1280x960HZ85 = 21, // bandwidth limit
  237. ARKDISP_TVENC_OUT_VGA_1280x720HZ60 = 22,
  238. };
  239. enum screen_id {
  240. SCREEN_QUN700,
  241. SCREEN_CVBS_NTSC,
  242. SCREEN_CVBS_PAL,
  243. SCREEN_VGA8060,
  244. SCREEN_TYPE_YPBPR720P,
  245. SCREEN_C101EAN,
  246. SCREEN_CLAA101,
  247. SCREEN_GM8284DD,
  248. SCREEN_USER_TYPE,
  249. SCREEN_MAX_NUM,
  250. };
  251. enum clk_source_id {
  252. SCREEN_CLKSEL_CPUPLL,
  253. SCREEN_CLKSEL_SYSPLL,
  254. SCREEN_CLKSEL_DDSCLK,
  255. SCREEN_CLKSEL_24MCLK = 4,
  256. SCREEN_CLKSEL_NONE = -1,
  257. };
  258. enum rgb_mode_id {
  259. RGB_MODE_BGR,
  260. RGB_MODE_GBR,
  261. RGB_MODE_RBG,
  262. RGB_MODE_BRG,
  263. RGB_MODE_GRB,
  264. RGB_MODE_RGB,
  265. RGB_MODE_NUM,
  266. };
  267. enum ui_scaler_type_id {
  268. UI_SCALER_NONE,//normal mode: no caler ,cannt set posx posy
  269. UI_POSITION_CVBS,//no scaler, can set posx posy throught arkdata.ini
  270. UI_SCALER_VGA, //scaler mode, can set posx posy throught arkdata.ini
  271. UI_SCALER_CVBS, //scaler mode, can set posx posy throught arkdata.ini
  272. UI_SCALER_END,
  273. };
  274. enum mirror_type {
  275. MIRROR_TYPE_NONE,
  276. MIRROR_TYPE_L2R,//mirror left to right
  277. MIRROR_TYPE_U2D,//mirror up to down
  278. MIRROR_TYPE_L2R_U2D,//mirror left to right and up to down
  279. MIRROR_TYPE_END,
  280. };
  281. #define ARK_DISPLAY_ALL_MODE 0
  282. #if ARK_DISPLAY_ALL_MODE
  283. typedef struct _VP_INFO
  284. {
  285. unsigned int video_contrast;
  286. unsigned int video_brightness;
  287. unsigned int video_saturation;
  288. unsigned int video_hue;
  289. unsigned int video2_contrast;
  290. unsigned int video2_brightness;
  291. unsigned int video2_saturation;
  292. unsigned int video2_hue;
  293. unsigned int osd1_contrast;
  294. unsigned int osd1_brightness;
  295. unsigned int osd1_saturation;
  296. unsigned int osd1_hue;
  297. unsigned int osd2_contrast;
  298. unsigned int osd2_brightness;
  299. unsigned int osd2_saturation;
  300. unsigned int osd2_hue;
  301. unsigned int osd3_contrast;
  302. unsigned int osd3_brightness;
  303. unsigned int osd3_saturation;
  304. unsigned int osd3_hue;
  305. }vp_info;
  306. typedef struct _tGammaInfo
  307. {
  308. unsigned int gamma_en;
  309. unsigned int gamma_regval[48];
  310. } gamma_info;
  311. #endif
  312. struct screen_info
  313. {
  314. int screen_id;
  315. enum screen_type_id screen_type;
  316. int format;
  317. unsigned int width;
  318. unsigned int height;
  319. unsigned int vbp;
  320. unsigned int vfp;
  321. unsigned int vsw;
  322. unsigned int hbp;
  323. unsigned int hfp;
  324. unsigned int hsw;
  325. unsigned int vclk_active;
  326. unsigned int hsync_active;
  327. unsigned int vsync_active;
  328. unsigned int de_active;
  329. unsigned int tvenc;
  330. unsigned int tvout_format;
  331. unsigned int clk_source;
  332. unsigned int clk_freq;
  333. unsigned int clk_div1;
  334. unsigned int clk_div2;
  335. unsigned int src_format;
  336. unsigned int rgb_mode;
  337. unsigned int bpp;
  338. unsigned int lvds_cfg;
  339. unsigned int interlace;
  340. unsigned int frame_rate;
  341. unsigned int src_width;
  342. unsigned int src_height;
  343. unsigned int pad_unset;
  344. };
  345. #if ARK_DISPLAY_ALL_MODE
  346. typedef struct _itu656in
  347. {
  348. unsigned int ModeControl;
  349. unsigned int VGATE_DELAY;
  350. unsigned int DEN_V_STOP;
  351. unsigned int DEN_V_START;
  352. unsigned int NTSC_TVGDEL;
  353. unsigned int NTSC_TVSYNC;
  354. unsigned int NTSC_THGDEL;
  355. unsigned int NTSC_THSYNC;
  356. unsigned int NTSC_THLEN;
  357. unsigned int NTSC_THGATE;
  358. unsigned int NTSC_TVLEN;
  359. unsigned int NTSC_TVGATE;
  360. unsigned int NTSC_VFZ;
  361. unsigned int NTSC_HFZ;
  362. unsigned int NTSC_SYNC_UP_CNT;
  363. unsigned int NTSC_SYNC_DOWN_CNT;
  364. unsigned int NTSC_DATENA_INV;
  365. unsigned int NTSC_VSYNC_INV;
  366. unsigned int NTSC_HSYNC_INV;
  367. unsigned int NTSC_FIELD_INV;
  368. unsigned int NTSC_HV_DELAY;
  369. unsigned int PAL_TVGDEL;
  370. unsigned int PAL_TVSYNC;
  371. unsigned int PAL_THGDEL;
  372. unsigned int PAL_THSYNC;
  373. unsigned int PAL_THLEN;
  374. unsigned int PAL_THGATE;
  375. unsigned int PAL_TVLEN;
  376. unsigned int PAL_TVGATE;
  377. unsigned int PAL_VFZ;
  378. unsigned int PAL_HFZ;
  379. unsigned int PAL_SYNC_UP_CNT;
  380. unsigned int PAL_SYNC_DOWN_CNT;
  381. unsigned int PAL_DATENA_INV;
  382. unsigned int PAL_VSYNC_INV;
  383. unsigned int PAL_HSYNC_INV;
  384. unsigned int PAL_FIELD_INV;
  385. unsigned int PAL_HV_DELAY;
  386. }itu656byp_info;
  387. typedef struct _special_info
  388. {
  389. unsigned int dithering;
  390. unsigned int video_hfz;
  391. unsigned int video_vfz;
  392. unsigned int backlight;//backlight 环境变量中获取
  393. unsigned int carback_mask; //bit0=1:carback_brightness active,bit0=0:carback_brightness not active; ... ; bit5=1:carback_sharpness active,bit5=0:carback_sharpness not active
  394. int carback_brightness;
  395. int carback_contrast;
  396. int carback_saturation;
  397. int carback_hue;
  398. int carback_sharpness;
  399. unsigned int usb_update_delay;//usb update delay(unit: s)环境变量中获取
  400. unsigned int disp_xpos;
  401. unsigned int disp_ypos;
  402. unsigned int disp_width;
  403. unsigned int disp_height;
  404. unsigned int ui_scaler_type;
  405. unsigned int track_setting;
  406. unsigned int usr_data7;
  407. unsigned int usr_data8;
  408. unsigned int usr_data9;
  409. }special_info;
  410. #define MAX_TOUCHKEY 8
  411. struct touchkey {
  412. int left;
  413. int top;
  414. int right;
  415. int bottom;
  416. int value;
  417. };
  418. typedef struct{
  419. int origin;
  420. int panelx_min;
  421. int panelx_max;
  422. int panely_min;
  423. int panely_max;
  424. int touchkey_num;
  425. struct touchkey key[MAX_TOUCHKEY];
  426. }touchscreen_info;
  427. #endif
  428. typedef struct _display_updatepara
  429. {
  430. unsigned char flag_id[16];
  431. struct screen_info screeninfo;
  432. #if ARK_DISPLAY_ALL_MODE
  433. unsigned int flag_vpinfo;
  434. unsigned int flag_gamma;
  435. vp_info vpinfo;
  436. gamma_info gammainfo;
  437. itu656byp_info itu656bypinfo;
  438. special_info spec_info;
  439. touchscreen_info touch_info;
  440. #endif
  441. }display_updatepara;
  442. #define SCREEN_MODULE_ID 4
  443. #define DEBUG_DISPLAY 1
  444. #define IS_TVENC_SCREEN(x) ((x)->screen_type > SCREEN_TYPE_TVENC)
  445. void ark_disp_wait_lcd_frame_int(void);
  446. void ark_disp_wait_tvenc_frame_int(void);
  447. int is_interlace_tvenc(struct screen_info *screen);
  448. void ark_set_osd_image(enum DISP_OSD_LAYER_ID layer_id,int format, int width, int height);
  449. void ark_set_osd_addr(enum DISP_OSD_LAYER_ID layer_id, unsigned int addr);
  450. void ark_disp_set_osd_layer_position(int id, int x, int y);
  451. void ark_backlight_config_f(int screen_id);
  452. void ark_display_initialize_port(struct screen_info *screen);
  453. void ark_osd_en_layer(int id, unsigned int enable);
  454. void ark_set_osd_frame_mode(int id, int frame);
  455. void ark_backlight_config(int screen_id);
  456. #endif