sdp4430_mux_data.h 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010
  4. * Texas Instruments Incorporated, <www.ti.com>
  5. *
  6. * Balaji Krishnamoorthy <balajitk@ti.com>
  7. * Aneesh V <aneesh@ti.com>
  8. */
  9. #ifndef _SDP4430_MUX_DATA_H
  10. #define _SDP4430_MUX_DATA_H
  11. #include <asm/arch/mux_omap4.h>
  12. const struct pad_conf_entry core_padconf_array_essential[] = {
  13. {GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */
  14. {GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */
  15. {GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */
  16. {GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */
  17. {GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */
  18. {GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */
  19. {GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */
  20. {GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */
  21. {GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */
  22. {GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */
  23. {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */
  24. {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */
  25. {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */
  26. {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */
  27. {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */
  28. {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */
  29. {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */
  30. {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */
  31. {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */
  32. {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */
  33. {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */
  34. {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */
  35. {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */
  36. {UART3_TX_IRTX, (M0)}, /* uart3_tx */
  37. {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */
  38. {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */
  39. {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */
  40. {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */
  41. {USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */
  42. {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */
  43. {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */
  44. {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */
  45. {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */
  46. {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */
  47. {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */
  48. };
  49. const struct pad_conf_entry wkup_padconf_array_essential[] = {
  50. {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
  51. {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
  52. {PAD1_SYS_32K, (IEN | M0)} /* sys_32k */
  53. };
  54. const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {
  55. {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */
  56. };
  57. #endif /* _SDP4430_MUX_DATA_H */