kxcjk-1013.c 37 KB

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  1. /*
  2. * KXCJK-1013 3-axis accelerometer driver
  3. * Copyright (c) 2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/bitops.h>
  19. #include <linux/slab.h>
  20. #include <linux/string.h>
  21. #include <linux/acpi.h>
  22. #include <linux/pm.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/iio/iio.h>
  25. #include <linux/iio/sysfs.h>
  26. #include <linux/iio/buffer.h>
  27. #include <linux/iio/trigger.h>
  28. #include <linux/iio/events.h>
  29. #include <linux/iio/trigger_consumer.h>
  30. #include <linux/iio/triggered_buffer.h>
  31. #include <linux/iio/accel/kxcjk_1013.h>
  32. #define KXCJK1013_DRV_NAME "kxcjk1013"
  33. #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
  34. #define KXTF9_REG_HP_XOUT_L 0x00
  35. #define KXTF9_REG_HP_XOUT_H 0x01
  36. #define KXTF9_REG_HP_YOUT_L 0x02
  37. #define KXTF9_REG_HP_YOUT_H 0x03
  38. #define KXTF9_REG_HP_ZOUT_L 0x04
  39. #define KXTF9_REG_HP_ZOUT_H 0x05
  40. #define KXCJK1013_REG_XOUT_L 0x06
  41. /*
  42. * From low byte X axis register, all the other addresses of Y and Z can be
  43. * obtained by just applying axis offset. The following axis defines are just
  44. * provide clarity, but not used.
  45. */
  46. #define KXCJK1013_REG_XOUT_H 0x07
  47. #define KXCJK1013_REG_YOUT_L 0x08
  48. #define KXCJK1013_REG_YOUT_H 0x09
  49. #define KXCJK1013_REG_ZOUT_L 0x0A
  50. #define KXCJK1013_REG_ZOUT_H 0x0B
  51. #define KXCJK1013_REG_DCST_RESP 0x0C
  52. #define KXCJK1013_REG_WHO_AM_I 0x0F
  53. #define KXTF9_REG_TILT_POS_CUR 0x10
  54. #define KXTF9_REG_TILT_POS_PREV 0x11
  55. #define KXTF9_REG_INT_SRC1 0x15
  56. #define KXCJK1013_REG_INT_SRC1 0x16 /* compatible, but called INT_SRC2 in KXTF9 ds */
  57. #define KXCJK1013_REG_INT_SRC2 0x17
  58. #define KXCJK1013_REG_STATUS_REG 0x18
  59. #define KXCJK1013_REG_INT_REL 0x1A
  60. #define KXCJK1013_REG_CTRL1 0x1B
  61. #define KXTF9_REG_CTRL2 0x1C
  62. #define KXCJK1013_REG_CTRL2 0x1D /* mostly compatible, CTRL_REG3 in KTXF9 ds */
  63. #define KXCJK1013_REG_INT_CTRL1 0x1E
  64. #define KXCJK1013_REG_INT_CTRL2 0x1F
  65. #define KXTF9_REG_INT_CTRL3 0x20
  66. #define KXCJK1013_REG_DATA_CTRL 0x21
  67. #define KXTF9_REG_TILT_TIMER 0x28
  68. #define KXCJK1013_REG_WAKE_TIMER 0x29
  69. #define KXTF9_REG_TDT_TIMER 0x2B
  70. #define KXTF9_REG_TDT_THRESH_H 0x2C
  71. #define KXTF9_REG_TDT_THRESH_L 0x2D
  72. #define KXTF9_REG_TDT_TAP_TIMER 0x2E
  73. #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
  74. #define KXTF9_REG_TDT_LATENCY_TIMER 0x30
  75. #define KXTF9_REG_TDT_WINDOW_TIMER 0x31
  76. #define KXCJK1013_REG_SELF_TEST 0x3A
  77. #define KXTF9_REG_WAKE_THRESH 0x5A
  78. #define KXTF9_REG_TILT_ANGLE 0x5C
  79. #define KXTF9_REG_HYST_SET 0x5F
  80. #define KXCJK1013_REG_WAKE_THRES 0x6A
  81. #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
  82. #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
  83. #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
  84. #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
  85. #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
  86. #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
  87. #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */
  88. #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
  89. #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
  90. #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
  91. #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
  92. #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
  93. #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
  94. #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
  95. #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
  96. #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
  97. #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
  98. #define KXCJK1013_MAX_STARTUP_TIME_US 100000
  99. #define KXCJK1013_SLEEP_DELAY_MS 2000
  100. #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */
  101. #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
  102. #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */
  103. #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
  104. #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
  105. #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
  106. #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
  107. /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
  108. #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
  109. #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
  110. #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
  111. #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
  112. #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
  113. #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
  114. #define KXCJK1013_DEFAULT_WAKE_THRES 1
  115. enum kx_chipset {
  116. KXCJK1013,
  117. KXCJ91008,
  118. KXTJ21009,
  119. KXTF9,
  120. KX_MAX_CHIPS /* this must be last */
  121. };
  122. enum kx_acpi_type {
  123. ACPI_GENERIC,
  124. ACPI_SMO8500,
  125. ACPI_KIOX010A,
  126. };
  127. struct kxcjk1013_data {
  128. struct i2c_client *client;
  129. struct iio_trigger *dready_trig;
  130. struct iio_trigger *motion_trig;
  131. struct mutex mutex;
  132. s16 buffer[8];
  133. u8 odr_bits;
  134. u8 range;
  135. int wake_thres;
  136. int wake_dur;
  137. bool active_high_intr;
  138. bool dready_trigger_on;
  139. int ev_enable_state;
  140. bool motion_trigger_on;
  141. int64_t timestamp;
  142. enum kx_chipset chipset;
  143. enum kx_acpi_type acpi_type;
  144. };
  145. enum kxcjk1013_axis {
  146. AXIS_X,
  147. AXIS_Y,
  148. AXIS_Z,
  149. AXIS_MAX,
  150. };
  151. enum kxcjk1013_mode {
  152. STANDBY,
  153. OPERATION,
  154. };
  155. enum kxcjk1013_range {
  156. KXCJK1013_RANGE_2G,
  157. KXCJK1013_RANGE_4G,
  158. KXCJK1013_RANGE_8G,
  159. };
  160. struct kx_odr_map {
  161. int val;
  162. int val2;
  163. int odr_bits;
  164. int wuf_bits;
  165. };
  166. static const struct kx_odr_map samp_freq_table[] = {
  167. { 0, 781000, 0x08, 0x00 },
  168. { 1, 563000, 0x09, 0x01 },
  169. { 3, 125000, 0x0A, 0x02 },
  170. { 6, 250000, 0x0B, 0x03 },
  171. { 12, 500000, 0x00, 0x04 },
  172. { 25, 0, 0x01, 0x05 },
  173. { 50, 0, 0x02, 0x06 },
  174. { 100, 0, 0x03, 0x06 },
  175. { 200, 0, 0x04, 0x06 },
  176. { 400, 0, 0x05, 0x06 },
  177. { 800, 0, 0x06, 0x06 },
  178. { 1600, 0, 0x07, 0x06 },
  179. };
  180. static const char *const kxcjk1013_samp_freq_avail =
  181. "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
  182. static const struct kx_odr_map kxtf9_samp_freq_table[] = {
  183. { 25, 0, 0x01, 0x00 },
  184. { 50, 0, 0x02, 0x01 },
  185. { 100, 0, 0x03, 0x01 },
  186. { 200, 0, 0x04, 0x01 },
  187. { 400, 0, 0x05, 0x01 },
  188. { 800, 0, 0x06, 0x01 },
  189. };
  190. static const char *const kxtf9_samp_freq_avail =
  191. "25 50 100 200 400 800";
  192. /* Refer to section 4 of the specification */
  193. static const struct {
  194. int odr_bits;
  195. int usec;
  196. } odr_start_up_times[KX_MAX_CHIPS][12] = {
  197. /* KXCJK-1013 */
  198. {
  199. {0x08, 100000},
  200. {0x09, 100000},
  201. {0x0A, 100000},
  202. {0x0B, 100000},
  203. {0, 80000},
  204. {0x01, 41000},
  205. {0x02, 21000},
  206. {0x03, 11000},
  207. {0x04, 6400},
  208. {0x05, 3900},
  209. {0x06, 2700},
  210. {0x07, 2100},
  211. },
  212. /* KXCJ9-1008 */
  213. {
  214. {0x08, 100000},
  215. {0x09, 100000},
  216. {0x0A, 100000},
  217. {0x0B, 100000},
  218. {0, 80000},
  219. {0x01, 41000},
  220. {0x02, 21000},
  221. {0x03, 11000},
  222. {0x04, 6400},
  223. {0x05, 3900},
  224. {0x06, 2700},
  225. {0x07, 2100},
  226. },
  227. /* KXCTJ2-1009 */
  228. {
  229. {0x08, 1240000},
  230. {0x09, 621000},
  231. {0x0A, 309000},
  232. {0x0B, 151000},
  233. {0, 80000},
  234. {0x01, 41000},
  235. {0x02, 21000},
  236. {0x03, 11000},
  237. {0x04, 6000},
  238. {0x05, 4000},
  239. {0x06, 3000},
  240. {0x07, 2000},
  241. },
  242. /* KXTF9 */
  243. {
  244. {0x01, 81000},
  245. {0x02, 41000},
  246. {0x03, 21000},
  247. {0x04, 11000},
  248. {0x05, 5100},
  249. {0x06, 2700},
  250. },
  251. };
  252. static const struct {
  253. u16 scale;
  254. u8 gsel_0;
  255. u8 gsel_1;
  256. } KXCJK1013_scale_table[] = { {9582, 0, 0},
  257. {19163, 1, 0},
  258. {38326, 0, 1} };
  259. #ifdef CONFIG_ACPI
  260. enum kiox010a_fn_index {
  261. KIOX010A_SET_LAPTOP_MODE = 1,
  262. KIOX010A_SET_TABLET_MODE = 2,
  263. };
  264. static int kiox010a_dsm(struct device *dev, int fn_index)
  265. {
  266. acpi_handle handle = ACPI_HANDLE(dev);
  267. guid_t kiox010a_dsm_guid;
  268. union acpi_object *obj;
  269. if (!handle)
  270. return -ENODEV;
  271. guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
  272. obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
  273. if (!obj)
  274. return -EIO;
  275. ACPI_FREE(obj);
  276. return 0;
  277. }
  278. #endif
  279. static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
  280. enum kxcjk1013_mode mode)
  281. {
  282. int ret;
  283. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  284. if (ret < 0) {
  285. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  286. return ret;
  287. }
  288. if (mode == STANDBY)
  289. ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
  290. else
  291. ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
  292. ret = i2c_smbus_write_byte_data(data->client,
  293. KXCJK1013_REG_CTRL1, ret);
  294. if (ret < 0) {
  295. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  296. return ret;
  297. }
  298. return 0;
  299. }
  300. static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
  301. enum kxcjk1013_mode *mode)
  302. {
  303. int ret;
  304. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  305. if (ret < 0) {
  306. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  307. return ret;
  308. }
  309. if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
  310. *mode = OPERATION;
  311. else
  312. *mode = STANDBY;
  313. return 0;
  314. }
  315. static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
  316. {
  317. int ret;
  318. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  319. if (ret < 0) {
  320. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  321. return ret;
  322. }
  323. ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
  324. KXCJK1013_REG_CTRL1_BIT_GSEL1);
  325. ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
  326. ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
  327. ret = i2c_smbus_write_byte_data(data->client,
  328. KXCJK1013_REG_CTRL1,
  329. ret);
  330. if (ret < 0) {
  331. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  332. return ret;
  333. }
  334. data->range = range_index;
  335. return 0;
  336. }
  337. static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
  338. {
  339. int ret;
  340. #ifdef CONFIG_ACPI
  341. if (data->acpi_type == ACPI_KIOX010A) {
  342. /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
  343. kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
  344. }
  345. #endif
  346. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
  347. if (ret < 0) {
  348. dev_err(&data->client->dev, "Error reading who_am_i\n");
  349. return ret;
  350. }
  351. dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
  352. ret = kxcjk1013_set_mode(data, STANDBY);
  353. if (ret < 0)
  354. return ret;
  355. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  356. if (ret < 0) {
  357. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  358. return ret;
  359. }
  360. /* Set 12 bit mode */
  361. ret |= KXCJK1013_REG_CTRL1_BIT_RES;
  362. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
  363. ret);
  364. if (ret < 0) {
  365. dev_err(&data->client->dev, "Error reading reg_ctrl\n");
  366. return ret;
  367. }
  368. /* Setting range to 4G */
  369. ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
  370. if (ret < 0)
  371. return ret;
  372. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
  373. if (ret < 0) {
  374. dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
  375. return ret;
  376. }
  377. data->odr_bits = ret;
  378. /* Set up INT polarity */
  379. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
  380. if (ret < 0) {
  381. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  382. return ret;
  383. }
  384. if (data->active_high_intr)
  385. ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
  386. else
  387. ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
  388. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
  389. ret);
  390. if (ret < 0) {
  391. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  392. return ret;
  393. }
  394. ret = kxcjk1013_set_mode(data, OPERATION);
  395. if (ret < 0)
  396. return ret;
  397. data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
  398. return 0;
  399. }
  400. #ifdef CONFIG_PM
  401. static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
  402. {
  403. int i;
  404. int idx = data->chipset;
  405. for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
  406. if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
  407. return odr_start_up_times[idx][i].usec;
  408. }
  409. return KXCJK1013_MAX_STARTUP_TIME_US;
  410. }
  411. #endif
  412. static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
  413. {
  414. #ifdef CONFIG_PM
  415. int ret;
  416. if (on)
  417. ret = pm_runtime_get_sync(&data->client->dev);
  418. else {
  419. pm_runtime_mark_last_busy(&data->client->dev);
  420. ret = pm_runtime_put_autosuspend(&data->client->dev);
  421. }
  422. if (ret < 0) {
  423. dev_err(&data->client->dev,
  424. "Failed: kxcjk1013_set_power_state for %d\n", on);
  425. if (on)
  426. pm_runtime_put_noidle(&data->client->dev);
  427. return ret;
  428. }
  429. #endif
  430. return 0;
  431. }
  432. static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
  433. {
  434. int waketh_reg, ret;
  435. ret = i2c_smbus_write_byte_data(data->client,
  436. KXCJK1013_REG_WAKE_TIMER,
  437. data->wake_dur);
  438. if (ret < 0) {
  439. dev_err(&data->client->dev,
  440. "Error writing reg_wake_timer\n");
  441. return ret;
  442. }
  443. waketh_reg = data->chipset == KXTF9 ?
  444. KXTF9_REG_WAKE_THRESH : KXCJK1013_REG_WAKE_THRES;
  445. ret = i2c_smbus_write_byte_data(data->client, waketh_reg,
  446. data->wake_thres);
  447. if (ret < 0) {
  448. dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
  449. return ret;
  450. }
  451. return 0;
  452. }
  453. static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
  454. bool status)
  455. {
  456. int ret;
  457. enum kxcjk1013_mode store_mode;
  458. ret = kxcjk1013_get_mode(data, &store_mode);
  459. if (ret < 0)
  460. return ret;
  461. /* This is requirement by spec to change state to STANDBY */
  462. ret = kxcjk1013_set_mode(data, STANDBY);
  463. if (ret < 0)
  464. return ret;
  465. ret = kxcjk1013_chip_update_thresholds(data);
  466. if (ret < 0)
  467. return ret;
  468. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
  469. if (ret < 0) {
  470. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  471. return ret;
  472. }
  473. if (status)
  474. ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  475. else
  476. ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  477. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
  478. ret);
  479. if (ret < 0) {
  480. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  481. return ret;
  482. }
  483. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  484. if (ret < 0) {
  485. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  486. return ret;
  487. }
  488. if (status)
  489. ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
  490. else
  491. ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
  492. ret = i2c_smbus_write_byte_data(data->client,
  493. KXCJK1013_REG_CTRL1, ret);
  494. if (ret < 0) {
  495. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  496. return ret;
  497. }
  498. if (store_mode == OPERATION) {
  499. ret = kxcjk1013_set_mode(data, OPERATION);
  500. if (ret < 0)
  501. return ret;
  502. }
  503. return 0;
  504. }
  505. static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
  506. bool status)
  507. {
  508. int ret;
  509. enum kxcjk1013_mode store_mode;
  510. ret = kxcjk1013_get_mode(data, &store_mode);
  511. if (ret < 0)
  512. return ret;
  513. /* This is requirement by spec to change state to STANDBY */
  514. ret = kxcjk1013_set_mode(data, STANDBY);
  515. if (ret < 0)
  516. return ret;
  517. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
  518. if (ret < 0) {
  519. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  520. return ret;
  521. }
  522. if (status)
  523. ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  524. else
  525. ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  526. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
  527. ret);
  528. if (ret < 0) {
  529. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  530. return ret;
  531. }
  532. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  533. if (ret < 0) {
  534. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  535. return ret;
  536. }
  537. if (status)
  538. ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
  539. else
  540. ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
  541. ret = i2c_smbus_write_byte_data(data->client,
  542. KXCJK1013_REG_CTRL1, ret);
  543. if (ret < 0) {
  544. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  545. return ret;
  546. }
  547. if (store_mode == OPERATION) {
  548. ret = kxcjk1013_set_mode(data, OPERATION);
  549. if (ret < 0)
  550. return ret;
  551. }
  552. return 0;
  553. }
  554. static const struct kx_odr_map *kxcjk1013_find_odr_value(
  555. const struct kx_odr_map *map, size_t map_size, int val, int val2)
  556. {
  557. int i;
  558. for (i = 0; i < map_size; ++i) {
  559. if (map[i].val == val && map[i].val2 == val2)
  560. return &map[i];
  561. }
  562. return ERR_PTR(-EINVAL);
  563. }
  564. static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
  565. size_t map_size, int odr_bits,
  566. int *val, int *val2)
  567. {
  568. int i;
  569. for (i = 0; i < map_size; ++i) {
  570. if (map[i].odr_bits == odr_bits) {
  571. *val = map[i].val;
  572. *val2 = map[i].val2;
  573. return IIO_VAL_INT_PLUS_MICRO;
  574. }
  575. }
  576. return -EINVAL;
  577. }
  578. static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
  579. {
  580. int ret;
  581. enum kxcjk1013_mode store_mode;
  582. const struct kx_odr_map *odr_setting;
  583. ret = kxcjk1013_get_mode(data, &store_mode);
  584. if (ret < 0)
  585. return ret;
  586. if (data->chipset == KXTF9)
  587. odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
  588. ARRAY_SIZE(kxtf9_samp_freq_table),
  589. val, val2);
  590. else
  591. odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
  592. ARRAY_SIZE(samp_freq_table),
  593. val, val2);
  594. if (IS_ERR(odr_setting))
  595. return PTR_ERR(odr_setting);
  596. /* To change ODR, the chip must be set to STANDBY as per spec */
  597. ret = kxcjk1013_set_mode(data, STANDBY);
  598. if (ret < 0)
  599. return ret;
  600. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
  601. odr_setting->odr_bits);
  602. if (ret < 0) {
  603. dev_err(&data->client->dev, "Error writing data_ctrl\n");
  604. return ret;
  605. }
  606. data->odr_bits = odr_setting->odr_bits;
  607. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
  608. odr_setting->wuf_bits);
  609. if (ret < 0) {
  610. dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
  611. return ret;
  612. }
  613. if (store_mode == OPERATION) {
  614. ret = kxcjk1013_set_mode(data, OPERATION);
  615. if (ret < 0)
  616. return ret;
  617. }
  618. return 0;
  619. }
  620. static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
  621. {
  622. if (data->chipset == KXTF9)
  623. return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
  624. ARRAY_SIZE(kxtf9_samp_freq_table),
  625. data->odr_bits, val, val2);
  626. else
  627. return kxcjk1013_convert_odr_value(samp_freq_table,
  628. ARRAY_SIZE(samp_freq_table),
  629. data->odr_bits, val, val2);
  630. }
  631. static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
  632. {
  633. u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
  634. int ret;
  635. ret = i2c_smbus_read_word_data(data->client, reg);
  636. if (ret < 0) {
  637. dev_err(&data->client->dev,
  638. "failed to read accel_%c registers\n", 'x' + axis);
  639. return ret;
  640. }
  641. return ret;
  642. }
  643. static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
  644. {
  645. int ret, i;
  646. enum kxcjk1013_mode store_mode;
  647. for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
  648. if (KXCJK1013_scale_table[i].scale == val) {
  649. ret = kxcjk1013_get_mode(data, &store_mode);
  650. if (ret < 0)
  651. return ret;
  652. ret = kxcjk1013_set_mode(data, STANDBY);
  653. if (ret < 0)
  654. return ret;
  655. ret = kxcjk1013_set_range(data, i);
  656. if (ret < 0)
  657. return ret;
  658. if (store_mode == OPERATION) {
  659. ret = kxcjk1013_set_mode(data, OPERATION);
  660. if (ret)
  661. return ret;
  662. }
  663. return 0;
  664. }
  665. }
  666. return -EINVAL;
  667. }
  668. static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
  669. struct iio_chan_spec const *chan, int *val,
  670. int *val2, long mask)
  671. {
  672. struct kxcjk1013_data *data = iio_priv(indio_dev);
  673. int ret;
  674. switch (mask) {
  675. case IIO_CHAN_INFO_RAW:
  676. mutex_lock(&data->mutex);
  677. if (iio_buffer_enabled(indio_dev))
  678. ret = -EBUSY;
  679. else {
  680. ret = kxcjk1013_set_power_state(data, true);
  681. if (ret < 0) {
  682. mutex_unlock(&data->mutex);
  683. return ret;
  684. }
  685. ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
  686. if (ret < 0) {
  687. kxcjk1013_set_power_state(data, false);
  688. mutex_unlock(&data->mutex);
  689. return ret;
  690. }
  691. *val = sign_extend32(ret >> 4, 11);
  692. ret = kxcjk1013_set_power_state(data, false);
  693. }
  694. mutex_unlock(&data->mutex);
  695. if (ret < 0)
  696. return ret;
  697. return IIO_VAL_INT;
  698. case IIO_CHAN_INFO_SCALE:
  699. *val = 0;
  700. *val2 = KXCJK1013_scale_table[data->range].scale;
  701. return IIO_VAL_INT_PLUS_MICRO;
  702. case IIO_CHAN_INFO_SAMP_FREQ:
  703. mutex_lock(&data->mutex);
  704. ret = kxcjk1013_get_odr(data, val, val2);
  705. mutex_unlock(&data->mutex);
  706. return ret;
  707. default:
  708. return -EINVAL;
  709. }
  710. }
  711. static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
  712. struct iio_chan_spec const *chan, int val,
  713. int val2, long mask)
  714. {
  715. struct kxcjk1013_data *data = iio_priv(indio_dev);
  716. int ret;
  717. switch (mask) {
  718. case IIO_CHAN_INFO_SAMP_FREQ:
  719. mutex_lock(&data->mutex);
  720. ret = kxcjk1013_set_odr(data, val, val2);
  721. mutex_unlock(&data->mutex);
  722. break;
  723. case IIO_CHAN_INFO_SCALE:
  724. if (val)
  725. return -EINVAL;
  726. mutex_lock(&data->mutex);
  727. ret = kxcjk1013_set_scale(data, val2);
  728. mutex_unlock(&data->mutex);
  729. break;
  730. default:
  731. ret = -EINVAL;
  732. }
  733. return ret;
  734. }
  735. static int kxcjk1013_read_event(struct iio_dev *indio_dev,
  736. const struct iio_chan_spec *chan,
  737. enum iio_event_type type,
  738. enum iio_event_direction dir,
  739. enum iio_event_info info,
  740. int *val, int *val2)
  741. {
  742. struct kxcjk1013_data *data = iio_priv(indio_dev);
  743. *val2 = 0;
  744. switch (info) {
  745. case IIO_EV_INFO_VALUE:
  746. *val = data->wake_thres;
  747. break;
  748. case IIO_EV_INFO_PERIOD:
  749. *val = data->wake_dur;
  750. break;
  751. default:
  752. return -EINVAL;
  753. }
  754. return IIO_VAL_INT;
  755. }
  756. static int kxcjk1013_write_event(struct iio_dev *indio_dev,
  757. const struct iio_chan_spec *chan,
  758. enum iio_event_type type,
  759. enum iio_event_direction dir,
  760. enum iio_event_info info,
  761. int val, int val2)
  762. {
  763. struct kxcjk1013_data *data = iio_priv(indio_dev);
  764. if (data->ev_enable_state)
  765. return -EBUSY;
  766. switch (info) {
  767. case IIO_EV_INFO_VALUE:
  768. data->wake_thres = val;
  769. break;
  770. case IIO_EV_INFO_PERIOD:
  771. data->wake_dur = val;
  772. break;
  773. default:
  774. return -EINVAL;
  775. }
  776. return 0;
  777. }
  778. static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
  779. const struct iio_chan_spec *chan,
  780. enum iio_event_type type,
  781. enum iio_event_direction dir)
  782. {
  783. struct kxcjk1013_data *data = iio_priv(indio_dev);
  784. return data->ev_enable_state;
  785. }
  786. static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
  787. const struct iio_chan_spec *chan,
  788. enum iio_event_type type,
  789. enum iio_event_direction dir,
  790. int state)
  791. {
  792. struct kxcjk1013_data *data = iio_priv(indio_dev);
  793. int ret;
  794. if (state && data->ev_enable_state)
  795. return 0;
  796. mutex_lock(&data->mutex);
  797. if (!state && data->motion_trigger_on) {
  798. data->ev_enable_state = 0;
  799. mutex_unlock(&data->mutex);
  800. return 0;
  801. }
  802. /*
  803. * We will expect the enable and disable to do operation in
  804. * in reverse order. This will happen here anyway as our
  805. * resume operation uses sync mode runtime pm calls, the
  806. * suspend operation will be delayed by autosuspend delay
  807. * So the disable operation will still happen in reverse of
  808. * enable operation. When runtime pm is disabled the mode
  809. * is always on so sequence doesn't matter
  810. */
  811. ret = kxcjk1013_set_power_state(data, state);
  812. if (ret < 0) {
  813. mutex_unlock(&data->mutex);
  814. return ret;
  815. }
  816. ret = kxcjk1013_setup_any_motion_interrupt(data, state);
  817. if (ret < 0) {
  818. kxcjk1013_set_power_state(data, false);
  819. data->ev_enable_state = 0;
  820. mutex_unlock(&data->mutex);
  821. return ret;
  822. }
  823. data->ev_enable_state = state;
  824. mutex_unlock(&data->mutex);
  825. return 0;
  826. }
  827. static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
  828. {
  829. struct kxcjk1013_data *data = iio_priv(indio_dev);
  830. return kxcjk1013_set_power_state(data, true);
  831. }
  832. static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
  833. {
  834. struct kxcjk1013_data *data = iio_priv(indio_dev);
  835. return kxcjk1013_set_power_state(data, false);
  836. }
  837. static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
  838. struct device_attribute *attr,
  839. char *buf)
  840. {
  841. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  842. struct kxcjk1013_data *data = iio_priv(indio_dev);
  843. const char *str;
  844. if (data->chipset == KXTF9)
  845. str = kxtf9_samp_freq_avail;
  846. else
  847. str = kxcjk1013_samp_freq_avail;
  848. return sprintf(buf, "%s\n", str);
  849. }
  850. static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
  851. kxcjk1013_get_samp_freq_avail, NULL, 0);
  852. static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
  853. static struct attribute *kxcjk1013_attributes[] = {
  854. &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
  855. &iio_const_attr_in_accel_scale_available.dev_attr.attr,
  856. NULL,
  857. };
  858. static const struct attribute_group kxcjk1013_attrs_group = {
  859. .attrs = kxcjk1013_attributes,
  860. };
  861. static const struct iio_event_spec kxcjk1013_event = {
  862. .type = IIO_EV_TYPE_THRESH,
  863. .dir = IIO_EV_DIR_EITHER,
  864. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  865. BIT(IIO_EV_INFO_ENABLE) |
  866. BIT(IIO_EV_INFO_PERIOD)
  867. };
  868. #define KXCJK1013_CHANNEL(_axis) { \
  869. .type = IIO_ACCEL, \
  870. .modified = 1, \
  871. .channel2 = IIO_MOD_##_axis, \
  872. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  873. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  874. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  875. .scan_index = AXIS_##_axis, \
  876. .scan_type = { \
  877. .sign = 's', \
  878. .realbits = 12, \
  879. .storagebits = 16, \
  880. .shift = 4, \
  881. .endianness = IIO_LE, \
  882. }, \
  883. .event_spec = &kxcjk1013_event, \
  884. .num_event_specs = 1 \
  885. }
  886. static const struct iio_chan_spec kxcjk1013_channels[] = {
  887. KXCJK1013_CHANNEL(X),
  888. KXCJK1013_CHANNEL(Y),
  889. KXCJK1013_CHANNEL(Z),
  890. IIO_CHAN_SOFT_TIMESTAMP(3),
  891. };
  892. static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
  893. .preenable = kxcjk1013_buffer_preenable,
  894. .postenable = iio_triggered_buffer_postenable,
  895. .postdisable = kxcjk1013_buffer_postdisable,
  896. .predisable = iio_triggered_buffer_predisable,
  897. };
  898. static const struct iio_info kxcjk1013_info = {
  899. .attrs = &kxcjk1013_attrs_group,
  900. .read_raw = kxcjk1013_read_raw,
  901. .write_raw = kxcjk1013_write_raw,
  902. .read_event_value = kxcjk1013_read_event,
  903. .write_event_value = kxcjk1013_write_event,
  904. .write_event_config = kxcjk1013_write_event_config,
  905. .read_event_config = kxcjk1013_read_event_config,
  906. };
  907. static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
  908. static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
  909. {
  910. struct iio_poll_func *pf = p;
  911. struct iio_dev *indio_dev = pf->indio_dev;
  912. struct kxcjk1013_data *data = iio_priv(indio_dev);
  913. int ret;
  914. mutex_lock(&data->mutex);
  915. ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
  916. KXCJK1013_REG_XOUT_L,
  917. AXIS_MAX * 2,
  918. (u8 *)data->buffer);
  919. mutex_unlock(&data->mutex);
  920. if (ret < 0)
  921. goto err;
  922. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  923. data->timestamp);
  924. err:
  925. iio_trigger_notify_done(indio_dev->trig);
  926. return IRQ_HANDLED;
  927. }
  928. static int kxcjk1013_trig_try_reen(struct iio_trigger *trig)
  929. {
  930. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  931. struct kxcjk1013_data *data = iio_priv(indio_dev);
  932. int ret;
  933. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
  934. if (ret < 0) {
  935. dev_err(&data->client->dev, "Error reading reg_int_rel\n");
  936. return ret;
  937. }
  938. return 0;
  939. }
  940. static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
  941. bool state)
  942. {
  943. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  944. struct kxcjk1013_data *data = iio_priv(indio_dev);
  945. int ret;
  946. mutex_lock(&data->mutex);
  947. if (!state && data->ev_enable_state && data->motion_trigger_on) {
  948. data->motion_trigger_on = false;
  949. mutex_unlock(&data->mutex);
  950. return 0;
  951. }
  952. ret = kxcjk1013_set_power_state(data, state);
  953. if (ret < 0) {
  954. mutex_unlock(&data->mutex);
  955. return ret;
  956. }
  957. if (data->motion_trig == trig)
  958. ret = kxcjk1013_setup_any_motion_interrupt(data, state);
  959. else
  960. ret = kxcjk1013_setup_new_data_interrupt(data, state);
  961. if (ret < 0) {
  962. kxcjk1013_set_power_state(data, false);
  963. mutex_unlock(&data->mutex);
  964. return ret;
  965. }
  966. if (data->motion_trig == trig)
  967. data->motion_trigger_on = state;
  968. else
  969. data->dready_trigger_on = state;
  970. mutex_unlock(&data->mutex);
  971. return 0;
  972. }
  973. static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
  974. .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
  975. .try_reenable = kxcjk1013_trig_try_reen,
  976. };
  977. static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
  978. {
  979. struct kxcjk1013_data *data = iio_priv(indio_dev);
  980. int ret = i2c_smbus_read_byte_data(data->client,
  981. KXCJK1013_REG_INT_SRC2);
  982. if (ret < 0) {
  983. dev_err(&data->client->dev, "Error reading reg_int_src2\n");
  984. return;
  985. }
  986. if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
  987. iio_push_event(indio_dev,
  988. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  989. 0,
  990. IIO_MOD_X,
  991. IIO_EV_TYPE_THRESH,
  992. IIO_EV_DIR_FALLING),
  993. data->timestamp);
  994. if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
  995. iio_push_event(indio_dev,
  996. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  997. 0,
  998. IIO_MOD_X,
  999. IIO_EV_TYPE_THRESH,
  1000. IIO_EV_DIR_RISING),
  1001. data->timestamp);
  1002. if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
  1003. iio_push_event(indio_dev,
  1004. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1005. 0,
  1006. IIO_MOD_Y,
  1007. IIO_EV_TYPE_THRESH,
  1008. IIO_EV_DIR_FALLING),
  1009. data->timestamp);
  1010. if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
  1011. iio_push_event(indio_dev,
  1012. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1013. 0,
  1014. IIO_MOD_Y,
  1015. IIO_EV_TYPE_THRESH,
  1016. IIO_EV_DIR_RISING),
  1017. data->timestamp);
  1018. if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
  1019. iio_push_event(indio_dev,
  1020. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1021. 0,
  1022. IIO_MOD_Z,
  1023. IIO_EV_TYPE_THRESH,
  1024. IIO_EV_DIR_FALLING),
  1025. data->timestamp);
  1026. if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
  1027. iio_push_event(indio_dev,
  1028. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1029. 0,
  1030. IIO_MOD_Z,
  1031. IIO_EV_TYPE_THRESH,
  1032. IIO_EV_DIR_RISING),
  1033. data->timestamp);
  1034. }
  1035. static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
  1036. {
  1037. struct iio_dev *indio_dev = private;
  1038. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1039. int ret;
  1040. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
  1041. if (ret < 0) {
  1042. dev_err(&data->client->dev, "Error reading reg_int_src1\n");
  1043. goto ack_intr;
  1044. }
  1045. if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
  1046. if (data->chipset == KXTF9)
  1047. iio_push_event(indio_dev,
  1048. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1049. 0,
  1050. IIO_MOD_X_AND_Y_AND_Z,
  1051. IIO_EV_TYPE_THRESH,
  1052. IIO_EV_DIR_RISING),
  1053. data->timestamp);
  1054. else
  1055. kxcjk1013_report_motion_event(indio_dev);
  1056. }
  1057. ack_intr:
  1058. if (data->dready_trigger_on)
  1059. return IRQ_HANDLED;
  1060. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
  1061. if (ret < 0)
  1062. dev_err(&data->client->dev, "Error reading reg_int_rel\n");
  1063. return IRQ_HANDLED;
  1064. }
  1065. static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
  1066. {
  1067. struct iio_dev *indio_dev = private;
  1068. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1069. data->timestamp = iio_get_time_ns(indio_dev);
  1070. if (data->dready_trigger_on)
  1071. iio_trigger_poll(data->dready_trig);
  1072. else if (data->motion_trigger_on)
  1073. iio_trigger_poll(data->motion_trig);
  1074. if (data->ev_enable_state)
  1075. return IRQ_WAKE_THREAD;
  1076. else
  1077. return IRQ_HANDLED;
  1078. }
  1079. static const char *kxcjk1013_match_acpi_device(struct device *dev,
  1080. enum kx_chipset *chipset,
  1081. enum kx_acpi_type *acpi_type)
  1082. {
  1083. const struct acpi_device_id *id;
  1084. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  1085. if (!id)
  1086. return NULL;
  1087. if (strcmp(id->id, "SMO8500") == 0)
  1088. *acpi_type = ACPI_SMO8500;
  1089. else if (strcmp(id->id, "KIOX010A") == 0)
  1090. *acpi_type = ACPI_KIOX010A;
  1091. *chipset = (enum kx_chipset)id->driver_data;
  1092. return dev_name(dev);
  1093. }
  1094. static int kxcjk1013_probe(struct i2c_client *client,
  1095. const struct i2c_device_id *id)
  1096. {
  1097. struct kxcjk1013_data *data;
  1098. struct iio_dev *indio_dev;
  1099. struct kxcjk_1013_platform_data *pdata;
  1100. const char *name;
  1101. int ret;
  1102. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1103. if (!indio_dev)
  1104. return -ENOMEM;
  1105. data = iio_priv(indio_dev);
  1106. i2c_set_clientdata(client, indio_dev);
  1107. data->client = client;
  1108. pdata = dev_get_platdata(&client->dev);
  1109. if (pdata)
  1110. data->active_high_intr = pdata->active_high_intr;
  1111. else
  1112. data->active_high_intr = true; /* default polarity */
  1113. if (id) {
  1114. data->chipset = (enum kx_chipset)(id->driver_data);
  1115. name = id->name;
  1116. } else if (ACPI_HANDLE(&client->dev)) {
  1117. name = kxcjk1013_match_acpi_device(&client->dev,
  1118. &data->chipset,
  1119. &data->acpi_type);
  1120. } else
  1121. return -ENODEV;
  1122. ret = kxcjk1013_chip_init(data);
  1123. if (ret < 0)
  1124. return ret;
  1125. mutex_init(&data->mutex);
  1126. indio_dev->dev.parent = &client->dev;
  1127. indio_dev->channels = kxcjk1013_channels;
  1128. indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
  1129. indio_dev->available_scan_masks = kxcjk1013_scan_masks;
  1130. indio_dev->name = name;
  1131. indio_dev->modes = INDIO_DIRECT_MODE;
  1132. indio_dev->info = &kxcjk1013_info;
  1133. if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
  1134. ret = devm_request_threaded_irq(&client->dev, client->irq,
  1135. kxcjk1013_data_rdy_trig_poll,
  1136. kxcjk1013_event_handler,
  1137. IRQF_TRIGGER_RISING,
  1138. KXCJK1013_IRQ_NAME,
  1139. indio_dev);
  1140. if (ret)
  1141. goto err_poweroff;
  1142. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  1143. "%s-dev%d",
  1144. indio_dev->name,
  1145. indio_dev->id);
  1146. if (!data->dready_trig) {
  1147. ret = -ENOMEM;
  1148. goto err_poweroff;
  1149. }
  1150. data->motion_trig = devm_iio_trigger_alloc(&client->dev,
  1151. "%s-any-motion-dev%d",
  1152. indio_dev->name,
  1153. indio_dev->id);
  1154. if (!data->motion_trig) {
  1155. ret = -ENOMEM;
  1156. goto err_poweroff;
  1157. }
  1158. data->dready_trig->dev.parent = &client->dev;
  1159. data->dready_trig->ops = &kxcjk1013_trigger_ops;
  1160. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  1161. indio_dev->trig = data->dready_trig;
  1162. iio_trigger_get(indio_dev->trig);
  1163. ret = iio_trigger_register(data->dready_trig);
  1164. if (ret)
  1165. goto err_poweroff;
  1166. data->motion_trig->dev.parent = &client->dev;
  1167. data->motion_trig->ops = &kxcjk1013_trigger_ops;
  1168. iio_trigger_set_drvdata(data->motion_trig, indio_dev);
  1169. ret = iio_trigger_register(data->motion_trig);
  1170. if (ret) {
  1171. data->motion_trig = NULL;
  1172. goto err_trigger_unregister;
  1173. }
  1174. }
  1175. ret = iio_triggered_buffer_setup(indio_dev,
  1176. &iio_pollfunc_store_time,
  1177. kxcjk1013_trigger_handler,
  1178. &kxcjk1013_buffer_setup_ops);
  1179. if (ret < 0) {
  1180. dev_err(&client->dev, "iio triggered buffer setup failed\n");
  1181. goto err_trigger_unregister;
  1182. }
  1183. ret = pm_runtime_set_active(&client->dev);
  1184. if (ret)
  1185. goto err_buffer_cleanup;
  1186. pm_runtime_enable(&client->dev);
  1187. pm_runtime_set_autosuspend_delay(&client->dev,
  1188. KXCJK1013_SLEEP_DELAY_MS);
  1189. pm_runtime_use_autosuspend(&client->dev);
  1190. ret = iio_device_register(indio_dev);
  1191. if (ret < 0) {
  1192. dev_err(&client->dev, "unable to register iio device\n");
  1193. goto err_buffer_cleanup;
  1194. }
  1195. return 0;
  1196. err_buffer_cleanup:
  1197. if (data->dready_trig)
  1198. iio_triggered_buffer_cleanup(indio_dev);
  1199. err_trigger_unregister:
  1200. if (data->dready_trig)
  1201. iio_trigger_unregister(data->dready_trig);
  1202. if (data->motion_trig)
  1203. iio_trigger_unregister(data->motion_trig);
  1204. err_poweroff:
  1205. kxcjk1013_set_mode(data, STANDBY);
  1206. return ret;
  1207. }
  1208. static int kxcjk1013_remove(struct i2c_client *client)
  1209. {
  1210. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1211. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1212. iio_device_unregister(indio_dev);
  1213. pm_runtime_disable(&client->dev);
  1214. pm_runtime_set_suspended(&client->dev);
  1215. pm_runtime_put_noidle(&client->dev);
  1216. if (data->dready_trig) {
  1217. iio_triggered_buffer_cleanup(indio_dev);
  1218. iio_trigger_unregister(data->dready_trig);
  1219. iio_trigger_unregister(data->motion_trig);
  1220. }
  1221. mutex_lock(&data->mutex);
  1222. kxcjk1013_set_mode(data, STANDBY);
  1223. mutex_unlock(&data->mutex);
  1224. return 0;
  1225. }
  1226. #ifdef CONFIG_PM_SLEEP
  1227. static int kxcjk1013_suspend(struct device *dev)
  1228. {
  1229. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1230. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1231. int ret;
  1232. mutex_lock(&data->mutex);
  1233. ret = kxcjk1013_set_mode(data, STANDBY);
  1234. mutex_unlock(&data->mutex);
  1235. return ret;
  1236. }
  1237. static int kxcjk1013_resume(struct device *dev)
  1238. {
  1239. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1240. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1241. int ret = 0;
  1242. mutex_lock(&data->mutex);
  1243. ret = kxcjk1013_set_mode(data, OPERATION);
  1244. if (ret == 0)
  1245. ret = kxcjk1013_set_range(data, data->range);
  1246. mutex_unlock(&data->mutex);
  1247. return ret;
  1248. }
  1249. #endif
  1250. #ifdef CONFIG_PM
  1251. static int kxcjk1013_runtime_suspend(struct device *dev)
  1252. {
  1253. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1254. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1255. int ret;
  1256. ret = kxcjk1013_set_mode(data, STANDBY);
  1257. if (ret < 0) {
  1258. dev_err(&data->client->dev, "powering off device failed\n");
  1259. return -EAGAIN;
  1260. }
  1261. return 0;
  1262. }
  1263. static int kxcjk1013_runtime_resume(struct device *dev)
  1264. {
  1265. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1266. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1267. int ret;
  1268. int sleep_val;
  1269. ret = kxcjk1013_set_mode(data, OPERATION);
  1270. if (ret < 0)
  1271. return ret;
  1272. sleep_val = kxcjk1013_get_startup_times(data);
  1273. if (sleep_val < 20000)
  1274. usleep_range(sleep_val, 20000);
  1275. else
  1276. msleep_interruptible(sleep_val/1000);
  1277. return 0;
  1278. }
  1279. #endif
  1280. static const struct dev_pm_ops kxcjk1013_pm_ops = {
  1281. SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
  1282. SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
  1283. kxcjk1013_runtime_resume, NULL)
  1284. };
  1285. static const struct acpi_device_id kx_acpi_match[] = {
  1286. {"KXCJ1013", KXCJK1013},
  1287. {"KXCJ1008", KXCJ91008},
  1288. {"KXCJ9000", KXCJ91008},
  1289. {"KIOX000A", KXCJ91008},
  1290. {"KIOX010A", KXCJ91008}, /* KXCJ91008 inside the display of a 2-in-1 */
  1291. {"KXTJ1009", KXTJ21009},
  1292. {"SMO8500", KXCJ91008},
  1293. { },
  1294. };
  1295. MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
  1296. static const struct i2c_device_id kxcjk1013_id[] = {
  1297. {"kxcjk1013", KXCJK1013},
  1298. {"kxcj91008", KXCJ91008},
  1299. {"kxtj21009", KXTJ21009},
  1300. {"kxtf9", KXTF9},
  1301. {"SMO8500", KXCJ91008},
  1302. {}
  1303. };
  1304. MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
  1305. static struct i2c_driver kxcjk1013_driver = {
  1306. .driver = {
  1307. .name = KXCJK1013_DRV_NAME,
  1308. .acpi_match_table = ACPI_PTR(kx_acpi_match),
  1309. .pm = &kxcjk1013_pm_ops,
  1310. },
  1311. .probe = kxcjk1013_probe,
  1312. .remove = kxcjk1013_remove,
  1313. .id_table = kxcjk1013_id,
  1314. };
  1315. module_i2c_driver(kxcjk1013_driver);
  1316. MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
  1317. MODULE_LICENSE("GPL v2");
  1318. MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");