ti-adc0832.c 8.5 KB

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  1. /*
  2. * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
  3. *
  4. * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
  5. *
  6. * This file is subject to the terms and conditions of version 2 of
  7. * the GNU General Public License. See the file COPYING in the main
  8. * directory of this archive for more details.
  9. *
  10. * Datasheet: http://www.ti.com/lit/ds/symlink/adc0832-n.pdf
  11. */
  12. #include <linux/module.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/iio/iio.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/iio/buffer.h>
  17. #include <linux/iio/trigger.h>
  18. #include <linux/iio/triggered_buffer.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. enum {
  21. adc0831,
  22. adc0832,
  23. adc0834,
  24. adc0838,
  25. };
  26. struct adc0832 {
  27. struct spi_device *spi;
  28. struct regulator *reg;
  29. struct mutex lock;
  30. u8 mux_bits;
  31. /*
  32. * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
  33. * May be shorter if not all channels are enabled subject
  34. * to the timestamp remaining 8 byte aligned.
  35. */
  36. u8 data[24] __aligned(8);
  37. u8 tx_buf[2] ____cacheline_aligned;
  38. u8 rx_buf[2];
  39. };
  40. #define ADC0832_VOLTAGE_CHANNEL(chan) \
  41. { \
  42. .type = IIO_VOLTAGE, \
  43. .indexed = 1, \
  44. .channel = chan, \
  45. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  46. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  47. .scan_index = chan, \
  48. .scan_type = { \
  49. .sign = 'u', \
  50. .realbits = 8, \
  51. .storagebits = 8, \
  52. }, \
  53. }
  54. #define ADC0832_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
  55. { \
  56. .type = IIO_VOLTAGE, \
  57. .indexed = 1, \
  58. .channel = (chan1), \
  59. .channel2 = (chan2), \
  60. .differential = 1, \
  61. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  62. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  63. .scan_index = si, \
  64. .scan_type = { \
  65. .sign = 'u', \
  66. .realbits = 8, \
  67. .storagebits = 8, \
  68. }, \
  69. }
  70. static const struct iio_chan_spec adc0831_channels[] = {
  71. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 0),
  72. IIO_CHAN_SOFT_TIMESTAMP(1),
  73. };
  74. static const struct iio_chan_spec adc0832_channels[] = {
  75. ADC0832_VOLTAGE_CHANNEL(0),
  76. ADC0832_VOLTAGE_CHANNEL(1),
  77. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
  78. ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
  79. IIO_CHAN_SOFT_TIMESTAMP(4),
  80. };
  81. static const struct iio_chan_spec adc0834_channels[] = {
  82. ADC0832_VOLTAGE_CHANNEL(0),
  83. ADC0832_VOLTAGE_CHANNEL(1),
  84. ADC0832_VOLTAGE_CHANNEL(2),
  85. ADC0832_VOLTAGE_CHANNEL(3),
  86. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 4),
  87. ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 5),
  88. ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 6),
  89. ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 7),
  90. IIO_CHAN_SOFT_TIMESTAMP(8),
  91. };
  92. static const struct iio_chan_spec adc0838_channels[] = {
  93. ADC0832_VOLTAGE_CHANNEL(0),
  94. ADC0832_VOLTAGE_CHANNEL(1),
  95. ADC0832_VOLTAGE_CHANNEL(2),
  96. ADC0832_VOLTAGE_CHANNEL(3),
  97. ADC0832_VOLTAGE_CHANNEL(4),
  98. ADC0832_VOLTAGE_CHANNEL(5),
  99. ADC0832_VOLTAGE_CHANNEL(6),
  100. ADC0832_VOLTAGE_CHANNEL(7),
  101. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
  102. ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
  103. ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
  104. ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
  105. ADC0832_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
  106. ADC0832_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
  107. ADC0832_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
  108. ADC0832_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
  109. IIO_CHAN_SOFT_TIMESTAMP(16),
  110. };
  111. static int adc0831_adc_conversion(struct adc0832 *adc)
  112. {
  113. struct spi_device *spi = adc->spi;
  114. int ret;
  115. ret = spi_read(spi, &adc->rx_buf, 2);
  116. if (ret)
  117. return ret;
  118. /*
  119. * Skip TRI-STATE and a leading zero
  120. */
  121. return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6);
  122. }
  123. static int adc0832_adc_conversion(struct adc0832 *adc, int channel,
  124. bool differential)
  125. {
  126. struct spi_device *spi = adc->spi;
  127. struct spi_transfer xfer = {
  128. .tx_buf = adc->tx_buf,
  129. .rx_buf = adc->rx_buf,
  130. .len = 2,
  131. };
  132. int ret;
  133. if (!adc->mux_bits)
  134. return adc0831_adc_conversion(adc);
  135. /* start bit */
  136. adc->tx_buf[0] = 1 << (adc->mux_bits + 1);
  137. /* single-ended or differential */
  138. adc->tx_buf[0] |= differential ? 0 : (1 << adc->mux_bits);
  139. /* odd / sign */
  140. adc->tx_buf[0] |= (channel % 2) << (adc->mux_bits - 1);
  141. /* select */
  142. if (adc->mux_bits > 1)
  143. adc->tx_buf[0] |= channel / 2;
  144. /* align Data output BIT7 (MSB) to 8-bit boundary */
  145. adc->tx_buf[0] <<= 1;
  146. ret = spi_sync_transfer(spi, &xfer, 1);
  147. if (ret)
  148. return ret;
  149. return adc->rx_buf[1];
  150. }
  151. static int adc0832_read_raw(struct iio_dev *iio,
  152. struct iio_chan_spec const *channel, int *value,
  153. int *shift, long mask)
  154. {
  155. struct adc0832 *adc = iio_priv(iio);
  156. switch (mask) {
  157. case IIO_CHAN_INFO_RAW:
  158. mutex_lock(&adc->lock);
  159. *value = adc0832_adc_conversion(adc, channel->channel,
  160. channel->differential);
  161. mutex_unlock(&adc->lock);
  162. if (*value < 0)
  163. return *value;
  164. return IIO_VAL_INT;
  165. case IIO_CHAN_INFO_SCALE:
  166. *value = regulator_get_voltage(adc->reg);
  167. if (*value < 0)
  168. return *value;
  169. /* convert regulator output voltage to mV */
  170. *value /= 1000;
  171. *shift = 8;
  172. return IIO_VAL_FRACTIONAL_LOG2;
  173. }
  174. return -EINVAL;
  175. }
  176. static const struct iio_info adc0832_info = {
  177. .read_raw = adc0832_read_raw,
  178. };
  179. static irqreturn_t adc0832_trigger_handler(int irq, void *p)
  180. {
  181. struct iio_poll_func *pf = p;
  182. struct iio_dev *indio_dev = pf->indio_dev;
  183. struct adc0832 *adc = iio_priv(indio_dev);
  184. int scan_index;
  185. int i = 0;
  186. mutex_lock(&adc->lock);
  187. for_each_set_bit(scan_index, indio_dev->active_scan_mask,
  188. indio_dev->masklength) {
  189. const struct iio_chan_spec *scan_chan =
  190. &indio_dev->channels[scan_index];
  191. int ret = adc0832_adc_conversion(adc, scan_chan->channel,
  192. scan_chan->differential);
  193. if (ret < 0) {
  194. dev_warn(&adc->spi->dev,
  195. "failed to get conversion data\n");
  196. goto out;
  197. }
  198. adc->data[i] = ret;
  199. i++;
  200. }
  201. iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
  202. iio_get_time_ns(indio_dev));
  203. out:
  204. mutex_unlock(&adc->lock);
  205. iio_trigger_notify_done(indio_dev->trig);
  206. return IRQ_HANDLED;
  207. }
  208. static int adc0832_probe(struct spi_device *spi)
  209. {
  210. struct iio_dev *indio_dev;
  211. struct adc0832 *adc;
  212. int ret;
  213. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
  214. if (!indio_dev)
  215. return -ENOMEM;
  216. adc = iio_priv(indio_dev);
  217. adc->spi = spi;
  218. mutex_init(&adc->lock);
  219. indio_dev->name = spi_get_device_id(spi)->name;
  220. indio_dev->dev.parent = &spi->dev;
  221. indio_dev->dev.of_node = spi->dev.of_node;
  222. indio_dev->info = &adc0832_info;
  223. indio_dev->modes = INDIO_DIRECT_MODE;
  224. switch (spi_get_device_id(spi)->driver_data) {
  225. case adc0831:
  226. adc->mux_bits = 0;
  227. indio_dev->channels = adc0831_channels;
  228. indio_dev->num_channels = ARRAY_SIZE(adc0831_channels);
  229. break;
  230. case adc0832:
  231. adc->mux_bits = 1;
  232. indio_dev->channels = adc0832_channels;
  233. indio_dev->num_channels = ARRAY_SIZE(adc0832_channels);
  234. break;
  235. case adc0834:
  236. adc->mux_bits = 2;
  237. indio_dev->channels = adc0834_channels;
  238. indio_dev->num_channels = ARRAY_SIZE(adc0834_channels);
  239. break;
  240. case adc0838:
  241. adc->mux_bits = 3;
  242. indio_dev->channels = adc0838_channels;
  243. indio_dev->num_channels = ARRAY_SIZE(adc0838_channels);
  244. break;
  245. default:
  246. return -EINVAL;
  247. }
  248. adc->reg = devm_regulator_get(&spi->dev, "vref");
  249. if (IS_ERR(adc->reg))
  250. return PTR_ERR(adc->reg);
  251. ret = regulator_enable(adc->reg);
  252. if (ret)
  253. return ret;
  254. spi_set_drvdata(spi, indio_dev);
  255. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  256. adc0832_trigger_handler, NULL);
  257. if (ret)
  258. goto err_reg_disable;
  259. ret = iio_device_register(indio_dev);
  260. if (ret)
  261. goto err_buffer_cleanup;
  262. return 0;
  263. err_buffer_cleanup:
  264. iio_triggered_buffer_cleanup(indio_dev);
  265. err_reg_disable:
  266. regulator_disable(adc->reg);
  267. return ret;
  268. }
  269. static int adc0832_remove(struct spi_device *spi)
  270. {
  271. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  272. struct adc0832 *adc = iio_priv(indio_dev);
  273. iio_device_unregister(indio_dev);
  274. iio_triggered_buffer_cleanup(indio_dev);
  275. regulator_disable(adc->reg);
  276. return 0;
  277. }
  278. #ifdef CONFIG_OF
  279. static const struct of_device_id adc0832_dt_ids[] = {
  280. { .compatible = "ti,adc0831", },
  281. { .compatible = "ti,adc0832", },
  282. { .compatible = "ti,adc0834", },
  283. { .compatible = "ti,adc0838", },
  284. {}
  285. };
  286. MODULE_DEVICE_TABLE(of, adc0832_dt_ids);
  287. #endif
  288. static const struct spi_device_id adc0832_id[] = {
  289. { "adc0831", adc0831 },
  290. { "adc0832", adc0832 },
  291. { "adc0834", adc0834 },
  292. { "adc0838", adc0838 },
  293. {}
  294. };
  295. MODULE_DEVICE_TABLE(spi, adc0832_id);
  296. static struct spi_driver adc0832_driver = {
  297. .driver = {
  298. .name = "adc0832",
  299. .of_match_table = of_match_ptr(adc0832_dt_ids),
  300. },
  301. .probe = adc0832_probe,
  302. .remove = adc0832_remove,
  303. .id_table = adc0832_id,
  304. };
  305. module_spi_driver(adc0832_driver);
  306. MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
  307. MODULE_DESCRIPTION("ADC0831/ADC0832/ADC0834/ADC0838 driver");
  308. MODULE_LICENSE("GPL v2");