Kconfig 7.0 KB

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  1. menuconfig MAILBOX
  2. bool "Mailbox Hardware Support"
  3. help
  4. Mailbox is a framework to control hardware communication between
  5. on-chip processors through queued messages and interrupt driven
  6. signals. Say Y if your platform supports hardware mailboxes.
  7. if MAILBOX
  8. config ARM_MHU
  9. tristate "ARM MHU Mailbox"
  10. depends on ARM_AMBA
  11. help
  12. Say Y here if you want to build the ARM MHU controller driver.
  13. The controller has 3 mailbox channels, the last of which can be
  14. used in Secure mode only.
  15. config IMX_MBOX
  16. tristate "i.MX Mailbox"
  17. depends on ARCH_MXC || COMPILE_TEST
  18. help
  19. Mailbox implementation for i.MX Messaging Unit (MU).
  20. config PLATFORM_MHU
  21. tristate "Platform MHU Mailbox"
  22. depends on OF
  23. depends on HAS_IOMEM
  24. help
  25. Say Y here if you want to build a platform specific variant MHU
  26. controller driver.
  27. The controller has a maximum of 3 mailbox channels, the last of
  28. which can be used in Secure mode only.
  29. config PL320_MBOX
  30. bool "ARM PL320 Mailbox"
  31. depends on ARM_AMBA
  32. help
  33. An implementation of the ARM PL320 Interprocessor Communication
  34. Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
  35. send short messages between Highbank's A9 cores and the EnergyCore
  36. Management Engine, primarily for cpufreq. Say Y here if you want
  37. to use the PL320 IPCM support.
  38. config OMAP2PLUS_MBOX
  39. tristate "OMAP2+ Mailbox framework support"
  40. depends on ARCH_OMAP2PLUS
  41. help
  42. Mailbox implementation for OMAP family chips with hardware for
  43. interprocessor communication involving DSP, IVA1.0 and IVA2 in
  44. OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
  45. want to use OMAP2+ Mailbox framework support.
  46. config OMAP_MBOX_KFIFO_SIZE
  47. int "Mailbox kfifo default buffer size (bytes)"
  48. depends on OMAP2PLUS_MBOX
  49. default 256
  50. help
  51. Specify the default size of mailbox's kfifo buffers (bytes).
  52. This can also be changed at runtime (via the mbox_kfifo_size
  53. module parameter).
  54. config ROCKCHIP_MBOX
  55. bool "Rockchip Soc Intergrated Mailbox Support"
  56. depends on ARCH_ROCKCHIP || COMPILE_TEST
  57. help
  58. This driver provides support for inter-processor communication
  59. between CPU cores and MCU processor on Some Rockchip SOCs.
  60. Please check it that the Soc you use have Mailbox hardware.
  61. Say Y here if you want to use the Rockchip Mailbox support.
  62. config PCC
  63. bool "Platform Communication Channel Driver"
  64. depends on ACPI
  65. default n
  66. help
  67. ACPI 5.0+ spec defines a generic mode of communication
  68. between the OS and a platform such as the BMC. This medium
  69. (PCC) is typically used by CPPC (ACPI CPU Performance management),
  70. RAS (ACPI reliability protocol) and MPST (ACPI Memory power
  71. states). Select this driver if your platform implements the
  72. PCC clients mentioned above.
  73. config ALTERA_MBOX
  74. tristate "Altera Mailbox"
  75. depends on HAS_IOMEM
  76. help
  77. An implementation of the Altera Mailbox soft core. It is used
  78. to send message between processors. Say Y here if you want to use the
  79. Altera mailbox support.
  80. config BCM2835_MBOX
  81. tristate "BCM2835 Mailbox"
  82. depends on ARCH_BCM2835
  83. help
  84. An implementation of the BCM2385 Mailbox. It is used to invoke
  85. the services of the Videocore. Say Y here if you want to use the
  86. BCM2835 Mailbox.
  87. config STI_MBOX
  88. tristate "STI Mailbox framework support"
  89. depends on ARCH_STI && OF
  90. help
  91. Mailbox implementation for STMicroelectonics family chips with
  92. hardware for interprocessor communication.
  93. config TI_MESSAGE_MANAGER
  94. tristate "Texas Instruments Message Manager Driver"
  95. depends on ARCH_KEYSTONE
  96. help
  97. An implementation of Message Manager slave driver for Keystone
  98. architecture SoCs from Texas Instruments. Message Manager is a
  99. communication entity found on few of Texas Instrument's keystone
  100. architecture SoCs. These may be used for communication between
  101. multiple processors within the SoC. Select this driver if your
  102. platform has support for the hardware block.
  103. config HI3660_MBOX
  104. tristate "Hi3660 Mailbox" if EXPERT
  105. depends on (ARCH_HISI || COMPILE_TEST)
  106. depends on OF
  107. default ARCH_HISI
  108. help
  109. An implementation of the hi3660 mailbox. It is used to send message
  110. between application processors and other processors/MCU/DSP. Select
  111. Y here if you want to use Hi3660 mailbox controller.
  112. config HI6220_MBOX
  113. tristate "Hi6220 Mailbox" if EXPERT
  114. depends on (ARCH_HISI || COMPILE_TEST)
  115. depends on OF
  116. default ARCH_HISI
  117. help
  118. An implementation of the hi6220 mailbox. It is used to send message
  119. between application processors and MCU. Say Y here if you want to
  120. build Hi6220 mailbox controller driver.
  121. config MAILBOX_TEST
  122. tristate "Mailbox Test Client"
  123. depends on OF
  124. depends on HAS_IOMEM
  125. help
  126. Test client to help with testing new Controller driver
  127. implementations.
  128. config QCOM_APCS_IPC
  129. tristate "Qualcomm APCS IPC driver"
  130. depends on ARCH_QCOM || COMPILE_TEST
  131. help
  132. Say y here to enable support for the APCS IPC mailbox driver,
  133. providing an interface for invoking the inter-process communication
  134. signals from the application processor to other masters.
  135. config TEGRA_HSP_MBOX
  136. bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
  137. depends on ARCH_TEGRA
  138. help
  139. The Tegra HSP driver is used for the interprocessor communication
  140. between different remote processors and host processors on Tegra186
  141. and later SoCs. Say Y here if you want to have this support.
  142. If unsure say N.
  143. config XGENE_SLIMPRO_MBOX
  144. tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
  145. depends on ARCH_XGENE
  146. help
  147. An implementation of the APM X-Gene Interprocessor Communication
  148. Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
  149. It is used to send short messages between ARM64-bit cores and
  150. the SLIMpro Management Engine, primarily for PM. Say Y here if you
  151. want to use the APM X-Gene SLIMpro IPCM support.
  152. config BCM_PDC_MBOX
  153. tristate "Broadcom FlexSparx DMA Mailbox"
  154. depends on ARCH_BCM_IPROC || COMPILE_TEST
  155. help
  156. Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
  157. which provides access to various offload engines on Broadcom
  158. SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
  159. config BCM_FLEXRM_MBOX
  160. tristate "Broadcom FlexRM Mailbox"
  161. depends on ARM64
  162. depends on ARCH_BCM_IPROC || COMPILE_TEST
  163. select GENERIC_MSI_IRQ_DOMAIN
  164. default m if ARCH_BCM_IPROC
  165. help
  166. Mailbox implementation of the Broadcom FlexRM ring manager,
  167. which provides access to various offload engines on Broadcom
  168. SoCs. Say Y here if you want to use the Broadcom FlexRM.
  169. config STM32_IPCC
  170. tristate "STM32 IPCC Mailbox"
  171. depends on MACH_STM32MP157
  172. help
  173. Mailbox implementation for STMicroelectonics STM32 family chips
  174. with hardware for Inter-Processor Communication Controller (IPCC)
  175. between processors. Say Y here if you want to have this support.
  176. config MTK_CMDQ_MBOX
  177. tristate "MediaTek CMDQ Mailbox Support"
  178. depends on ARCH_MEDIATEK || COMPILE_TEST
  179. select MTK_INFRACFG
  180. help
  181. Say yes here to add support for the MediaTek Command Queue (CMDQ)
  182. mailbox driver. The CMDQ is used to help read/write registers with
  183. critical time limitation, such as updating display configuration
  184. during the vblank.
  185. endif