ov5645.c 31 KB

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  1. /*
  2. * Driver for the OV5645 camera sensor.
  3. *
  4. * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
  5. * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
  6. * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  7. *
  8. * Based on:
  9. * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
  10. * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
  11. * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
  12. * - the OV5640 driver posted on linux-media:
  13. * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
  14. */
  15. /*
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. */
  25. #include <linux/bitops.h>
  26. #include <linux/clk.h>
  27. #include <linux/delay.h>
  28. #include <linux/device.h>
  29. #include <linux/gpio/consumer.h>
  30. #include <linux/i2c.h>
  31. #include <linux/init.h>
  32. #include <linux/module.h>
  33. #include <linux/of.h>
  34. #include <linux/of_graph.h>
  35. #include <linux/regulator/consumer.h>
  36. #include <linux/slab.h>
  37. #include <linux/types.h>
  38. #include <media/v4l2-ctrls.h>
  39. #include <media/v4l2-fwnode.h>
  40. #include <media/v4l2-subdev.h>
  41. #define OV5645_VOLTAGE_ANALOG 2800000
  42. #define OV5645_VOLTAGE_DIGITAL_CORE 1500000
  43. #define OV5645_VOLTAGE_DIGITAL_IO 1800000
  44. #define OV5645_SYSTEM_CTRL0 0x3008
  45. #define OV5645_SYSTEM_CTRL0_START 0x02
  46. #define OV5645_SYSTEM_CTRL0_STOP 0x42
  47. #define OV5645_CHIP_ID_HIGH 0x300a
  48. #define OV5645_CHIP_ID_HIGH_BYTE 0x56
  49. #define OV5645_CHIP_ID_LOW 0x300b
  50. #define OV5645_CHIP_ID_LOW_BYTE 0x45
  51. #define OV5645_IO_MIPI_CTRL00 0x300e
  52. #define OV5645_PAD_OUTPUT00 0x3019
  53. #define OV5645_AWB_MANUAL_CONTROL 0x3406
  54. #define OV5645_AWB_MANUAL_ENABLE BIT(0)
  55. #define OV5645_AEC_PK_MANUAL 0x3503
  56. #define OV5645_AEC_MANUAL_ENABLE BIT(0)
  57. #define OV5645_AGC_MANUAL_ENABLE BIT(1)
  58. #define OV5645_TIMING_TC_REG20 0x3820
  59. #define OV5645_SENSOR_VFLIP BIT(1)
  60. #define OV5645_ISP_VFLIP BIT(2)
  61. #define OV5645_TIMING_TC_REG21 0x3821
  62. #define OV5645_SENSOR_MIRROR BIT(1)
  63. #define OV5645_MIPI_CTRL00 0x4800
  64. #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
  65. #define OV5645_TEST_PATTERN_MASK 0x3
  66. #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
  67. #define OV5645_TEST_PATTERN_ENABLE BIT(7)
  68. #define OV5645_SDE_SAT_U 0x5583
  69. #define OV5645_SDE_SAT_V 0x5584
  70. struct reg_value {
  71. u16 reg;
  72. u8 val;
  73. };
  74. struct ov5645_mode_info {
  75. u32 width;
  76. u32 height;
  77. const struct reg_value *data;
  78. u32 data_size;
  79. u32 pixel_clock;
  80. u32 link_freq;
  81. };
  82. struct ov5645 {
  83. struct i2c_client *i2c_client;
  84. struct device *dev;
  85. struct v4l2_subdev sd;
  86. struct media_pad pad;
  87. struct v4l2_fwnode_endpoint ep;
  88. struct v4l2_mbus_framefmt fmt;
  89. struct v4l2_rect crop;
  90. struct clk *xclk;
  91. struct regulator *io_regulator;
  92. struct regulator *core_regulator;
  93. struct regulator *analog_regulator;
  94. const struct ov5645_mode_info *current_mode;
  95. struct v4l2_ctrl_handler ctrls;
  96. struct v4l2_ctrl *pixel_clock;
  97. struct v4l2_ctrl *link_freq;
  98. /* Cached register values */
  99. u8 aec_pk_manual;
  100. u8 timing_tc_reg20;
  101. u8 timing_tc_reg21;
  102. struct mutex power_lock; /* lock to protect power state */
  103. int power_count;
  104. struct gpio_desc *enable_gpio;
  105. struct gpio_desc *rst_gpio;
  106. };
  107. static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
  108. {
  109. return container_of(sd, struct ov5645, sd);
  110. }
  111. static const struct reg_value ov5645_global_init_setting[] = {
  112. { 0x3103, 0x11 },
  113. { 0x3008, 0x82 },
  114. { 0x3008, 0x42 },
  115. { 0x3103, 0x03 },
  116. { 0x3503, 0x07 },
  117. { 0x3002, 0x1c },
  118. { 0x3006, 0xc3 },
  119. { 0x3017, 0x00 },
  120. { 0x3018, 0x00 },
  121. { 0x302e, 0x0b },
  122. { 0x3037, 0x13 },
  123. { 0x3108, 0x01 },
  124. { 0x3611, 0x06 },
  125. { 0x3500, 0x00 },
  126. { 0x3501, 0x01 },
  127. { 0x3502, 0x00 },
  128. { 0x350a, 0x00 },
  129. { 0x350b, 0x3f },
  130. { 0x3620, 0x33 },
  131. { 0x3621, 0xe0 },
  132. { 0x3622, 0x01 },
  133. { 0x3630, 0x2e },
  134. { 0x3631, 0x00 },
  135. { 0x3632, 0x32 },
  136. { 0x3633, 0x52 },
  137. { 0x3634, 0x70 },
  138. { 0x3635, 0x13 },
  139. { 0x3636, 0x03 },
  140. { 0x3703, 0x5a },
  141. { 0x3704, 0xa0 },
  142. { 0x3705, 0x1a },
  143. { 0x3709, 0x12 },
  144. { 0x370b, 0x61 },
  145. { 0x370f, 0x10 },
  146. { 0x3715, 0x78 },
  147. { 0x3717, 0x01 },
  148. { 0x371b, 0x20 },
  149. { 0x3731, 0x12 },
  150. { 0x3901, 0x0a },
  151. { 0x3905, 0x02 },
  152. { 0x3906, 0x10 },
  153. { 0x3719, 0x86 },
  154. { 0x3810, 0x00 },
  155. { 0x3811, 0x10 },
  156. { 0x3812, 0x00 },
  157. { 0x3821, 0x01 },
  158. { 0x3824, 0x01 },
  159. { 0x3826, 0x03 },
  160. { 0x3828, 0x08 },
  161. { 0x3a19, 0xf8 },
  162. { 0x3c01, 0x34 },
  163. { 0x3c04, 0x28 },
  164. { 0x3c05, 0x98 },
  165. { 0x3c07, 0x07 },
  166. { 0x3c09, 0xc2 },
  167. { 0x3c0a, 0x9c },
  168. { 0x3c0b, 0x40 },
  169. { 0x3c01, 0x34 },
  170. { 0x4001, 0x02 },
  171. { 0x4514, 0x00 },
  172. { 0x4520, 0xb0 },
  173. { 0x460b, 0x37 },
  174. { 0x460c, 0x20 },
  175. { 0x4818, 0x01 },
  176. { 0x481d, 0xf0 },
  177. { 0x481f, 0x50 },
  178. { 0x4823, 0x70 },
  179. { 0x4831, 0x14 },
  180. { 0x5000, 0xa7 },
  181. { 0x5001, 0x83 },
  182. { 0x501d, 0x00 },
  183. { 0x501f, 0x00 },
  184. { 0x503d, 0x00 },
  185. { 0x505c, 0x30 },
  186. { 0x5181, 0x59 },
  187. { 0x5183, 0x00 },
  188. { 0x5191, 0xf0 },
  189. { 0x5192, 0x03 },
  190. { 0x5684, 0x10 },
  191. { 0x5685, 0xa0 },
  192. { 0x5686, 0x0c },
  193. { 0x5687, 0x78 },
  194. { 0x5a00, 0x08 },
  195. { 0x5a21, 0x00 },
  196. { 0x5a24, 0x00 },
  197. { 0x3008, 0x02 },
  198. { 0x3503, 0x00 },
  199. { 0x5180, 0xff },
  200. { 0x5181, 0xf2 },
  201. { 0x5182, 0x00 },
  202. { 0x5183, 0x14 },
  203. { 0x5184, 0x25 },
  204. { 0x5185, 0x24 },
  205. { 0x5186, 0x09 },
  206. { 0x5187, 0x09 },
  207. { 0x5188, 0x0a },
  208. { 0x5189, 0x75 },
  209. { 0x518a, 0x52 },
  210. { 0x518b, 0xea },
  211. { 0x518c, 0xa8 },
  212. { 0x518d, 0x42 },
  213. { 0x518e, 0x38 },
  214. { 0x518f, 0x56 },
  215. { 0x5190, 0x42 },
  216. { 0x5191, 0xf8 },
  217. { 0x5192, 0x04 },
  218. { 0x5193, 0x70 },
  219. { 0x5194, 0xf0 },
  220. { 0x5195, 0xf0 },
  221. { 0x5196, 0x03 },
  222. { 0x5197, 0x01 },
  223. { 0x5198, 0x04 },
  224. { 0x5199, 0x12 },
  225. { 0x519a, 0x04 },
  226. { 0x519b, 0x00 },
  227. { 0x519c, 0x06 },
  228. { 0x519d, 0x82 },
  229. { 0x519e, 0x38 },
  230. { 0x5381, 0x1e },
  231. { 0x5382, 0x5b },
  232. { 0x5383, 0x08 },
  233. { 0x5384, 0x0a },
  234. { 0x5385, 0x7e },
  235. { 0x5386, 0x88 },
  236. { 0x5387, 0x7c },
  237. { 0x5388, 0x6c },
  238. { 0x5389, 0x10 },
  239. { 0x538a, 0x01 },
  240. { 0x538b, 0x98 },
  241. { 0x5300, 0x08 },
  242. { 0x5301, 0x30 },
  243. { 0x5302, 0x10 },
  244. { 0x5303, 0x00 },
  245. { 0x5304, 0x08 },
  246. { 0x5305, 0x30 },
  247. { 0x5306, 0x08 },
  248. { 0x5307, 0x16 },
  249. { 0x5309, 0x08 },
  250. { 0x530a, 0x30 },
  251. { 0x530b, 0x04 },
  252. { 0x530c, 0x06 },
  253. { 0x5480, 0x01 },
  254. { 0x5481, 0x08 },
  255. { 0x5482, 0x14 },
  256. { 0x5483, 0x28 },
  257. { 0x5484, 0x51 },
  258. { 0x5485, 0x65 },
  259. { 0x5486, 0x71 },
  260. { 0x5487, 0x7d },
  261. { 0x5488, 0x87 },
  262. { 0x5489, 0x91 },
  263. { 0x548a, 0x9a },
  264. { 0x548b, 0xaa },
  265. { 0x548c, 0xb8 },
  266. { 0x548d, 0xcd },
  267. { 0x548e, 0xdd },
  268. { 0x548f, 0xea },
  269. { 0x5490, 0x1d },
  270. { 0x5580, 0x02 },
  271. { 0x5583, 0x40 },
  272. { 0x5584, 0x10 },
  273. { 0x5589, 0x10 },
  274. { 0x558a, 0x00 },
  275. { 0x558b, 0xf8 },
  276. { 0x5800, 0x3f },
  277. { 0x5801, 0x16 },
  278. { 0x5802, 0x0e },
  279. { 0x5803, 0x0d },
  280. { 0x5804, 0x17 },
  281. { 0x5805, 0x3f },
  282. { 0x5806, 0x0b },
  283. { 0x5807, 0x06 },
  284. { 0x5808, 0x04 },
  285. { 0x5809, 0x04 },
  286. { 0x580a, 0x06 },
  287. { 0x580b, 0x0b },
  288. { 0x580c, 0x09 },
  289. { 0x580d, 0x03 },
  290. { 0x580e, 0x00 },
  291. { 0x580f, 0x00 },
  292. { 0x5810, 0x03 },
  293. { 0x5811, 0x08 },
  294. { 0x5812, 0x0a },
  295. { 0x5813, 0x03 },
  296. { 0x5814, 0x00 },
  297. { 0x5815, 0x00 },
  298. { 0x5816, 0x04 },
  299. { 0x5817, 0x09 },
  300. { 0x5818, 0x0f },
  301. { 0x5819, 0x08 },
  302. { 0x581a, 0x06 },
  303. { 0x581b, 0x06 },
  304. { 0x581c, 0x08 },
  305. { 0x581d, 0x0c },
  306. { 0x581e, 0x3f },
  307. { 0x581f, 0x1e },
  308. { 0x5820, 0x12 },
  309. { 0x5821, 0x13 },
  310. { 0x5822, 0x21 },
  311. { 0x5823, 0x3f },
  312. { 0x5824, 0x68 },
  313. { 0x5825, 0x28 },
  314. { 0x5826, 0x2c },
  315. { 0x5827, 0x28 },
  316. { 0x5828, 0x08 },
  317. { 0x5829, 0x48 },
  318. { 0x582a, 0x64 },
  319. { 0x582b, 0x62 },
  320. { 0x582c, 0x64 },
  321. { 0x582d, 0x28 },
  322. { 0x582e, 0x46 },
  323. { 0x582f, 0x62 },
  324. { 0x5830, 0x60 },
  325. { 0x5831, 0x62 },
  326. { 0x5832, 0x26 },
  327. { 0x5833, 0x48 },
  328. { 0x5834, 0x66 },
  329. { 0x5835, 0x44 },
  330. { 0x5836, 0x64 },
  331. { 0x5837, 0x28 },
  332. { 0x5838, 0x66 },
  333. { 0x5839, 0x48 },
  334. { 0x583a, 0x2c },
  335. { 0x583b, 0x28 },
  336. { 0x583c, 0x26 },
  337. { 0x583d, 0xae },
  338. { 0x5025, 0x00 },
  339. { 0x3a0f, 0x30 },
  340. { 0x3a10, 0x28 },
  341. { 0x3a1b, 0x30 },
  342. { 0x3a1e, 0x26 },
  343. { 0x3a11, 0x60 },
  344. { 0x3a1f, 0x14 },
  345. { 0x0601, 0x02 },
  346. { 0x3008, 0x42 },
  347. { 0x3008, 0x02 },
  348. { OV5645_IO_MIPI_CTRL00, 0x40 },
  349. { OV5645_MIPI_CTRL00, 0x24 },
  350. { OV5645_PAD_OUTPUT00, 0x70 }
  351. };
  352. static const struct reg_value ov5645_setting_sxga[] = {
  353. { 0x3612, 0xa9 },
  354. { 0x3614, 0x50 },
  355. { 0x3618, 0x00 },
  356. { 0x3034, 0x18 },
  357. { 0x3035, 0x21 },
  358. { 0x3036, 0x70 },
  359. { 0x3600, 0x09 },
  360. { 0x3601, 0x43 },
  361. { 0x3708, 0x66 },
  362. { 0x370c, 0xc3 },
  363. { 0x3800, 0x00 },
  364. { 0x3801, 0x00 },
  365. { 0x3802, 0x00 },
  366. { 0x3803, 0x06 },
  367. { 0x3804, 0x0a },
  368. { 0x3805, 0x3f },
  369. { 0x3806, 0x07 },
  370. { 0x3807, 0x9d },
  371. { 0x3808, 0x05 },
  372. { 0x3809, 0x00 },
  373. { 0x380a, 0x03 },
  374. { 0x380b, 0xc0 },
  375. { 0x380c, 0x07 },
  376. { 0x380d, 0x68 },
  377. { 0x380e, 0x03 },
  378. { 0x380f, 0xd8 },
  379. { 0x3813, 0x06 },
  380. { 0x3814, 0x31 },
  381. { 0x3815, 0x31 },
  382. { 0x3820, 0x47 },
  383. { 0x3a02, 0x03 },
  384. { 0x3a03, 0xd8 },
  385. { 0x3a08, 0x01 },
  386. { 0x3a09, 0xf8 },
  387. { 0x3a0a, 0x01 },
  388. { 0x3a0b, 0xa4 },
  389. { 0x3a0e, 0x02 },
  390. { 0x3a0d, 0x02 },
  391. { 0x3a14, 0x03 },
  392. { 0x3a15, 0xd8 },
  393. { 0x3a18, 0x00 },
  394. { 0x4004, 0x02 },
  395. { 0x4005, 0x18 },
  396. { 0x4300, 0x32 },
  397. { 0x4202, 0x00 }
  398. };
  399. static const struct reg_value ov5645_setting_1080p[] = {
  400. { 0x3612, 0xab },
  401. { 0x3614, 0x50 },
  402. { 0x3618, 0x04 },
  403. { 0x3034, 0x18 },
  404. { 0x3035, 0x11 },
  405. { 0x3036, 0x54 },
  406. { 0x3600, 0x08 },
  407. { 0x3601, 0x33 },
  408. { 0x3708, 0x63 },
  409. { 0x370c, 0xc0 },
  410. { 0x3800, 0x01 },
  411. { 0x3801, 0x50 },
  412. { 0x3802, 0x01 },
  413. { 0x3803, 0xb2 },
  414. { 0x3804, 0x08 },
  415. { 0x3805, 0xef },
  416. { 0x3806, 0x05 },
  417. { 0x3807, 0xf1 },
  418. { 0x3808, 0x07 },
  419. { 0x3809, 0x80 },
  420. { 0x380a, 0x04 },
  421. { 0x380b, 0x38 },
  422. { 0x380c, 0x09 },
  423. { 0x380d, 0xc4 },
  424. { 0x380e, 0x04 },
  425. { 0x380f, 0x60 },
  426. { 0x3813, 0x04 },
  427. { 0x3814, 0x11 },
  428. { 0x3815, 0x11 },
  429. { 0x3820, 0x47 },
  430. { 0x4514, 0x88 },
  431. { 0x3a02, 0x04 },
  432. { 0x3a03, 0x60 },
  433. { 0x3a08, 0x01 },
  434. { 0x3a09, 0x50 },
  435. { 0x3a0a, 0x01 },
  436. { 0x3a0b, 0x18 },
  437. { 0x3a0e, 0x03 },
  438. { 0x3a0d, 0x04 },
  439. { 0x3a14, 0x04 },
  440. { 0x3a15, 0x60 },
  441. { 0x3a18, 0x00 },
  442. { 0x4004, 0x06 },
  443. { 0x4005, 0x18 },
  444. { 0x4300, 0x32 },
  445. { 0x4202, 0x00 },
  446. { 0x4837, 0x0b }
  447. };
  448. static const struct reg_value ov5645_setting_full[] = {
  449. { 0x3612, 0xab },
  450. { 0x3614, 0x50 },
  451. { 0x3618, 0x04 },
  452. { 0x3034, 0x18 },
  453. { 0x3035, 0x11 },
  454. { 0x3036, 0x54 },
  455. { 0x3600, 0x08 },
  456. { 0x3601, 0x33 },
  457. { 0x3708, 0x63 },
  458. { 0x370c, 0xc0 },
  459. { 0x3800, 0x00 },
  460. { 0x3801, 0x00 },
  461. { 0x3802, 0x00 },
  462. { 0x3803, 0x00 },
  463. { 0x3804, 0x0a },
  464. { 0x3805, 0x3f },
  465. { 0x3806, 0x07 },
  466. { 0x3807, 0x9f },
  467. { 0x3808, 0x0a },
  468. { 0x3809, 0x20 },
  469. { 0x380a, 0x07 },
  470. { 0x380b, 0x98 },
  471. { 0x380c, 0x0b },
  472. { 0x380d, 0x1c },
  473. { 0x380e, 0x07 },
  474. { 0x380f, 0xb0 },
  475. { 0x3813, 0x06 },
  476. { 0x3814, 0x11 },
  477. { 0x3815, 0x11 },
  478. { 0x3820, 0x47 },
  479. { 0x4514, 0x88 },
  480. { 0x3a02, 0x07 },
  481. { 0x3a03, 0xb0 },
  482. { 0x3a08, 0x01 },
  483. { 0x3a09, 0x27 },
  484. { 0x3a0a, 0x00 },
  485. { 0x3a0b, 0xf6 },
  486. { 0x3a0e, 0x06 },
  487. { 0x3a0d, 0x08 },
  488. { 0x3a14, 0x07 },
  489. { 0x3a15, 0xb0 },
  490. { 0x3a18, 0x01 },
  491. { 0x4004, 0x06 },
  492. { 0x4005, 0x18 },
  493. { 0x4300, 0x32 },
  494. { 0x4837, 0x0b },
  495. { 0x4202, 0x00 }
  496. };
  497. static const s64 link_freq[] = {
  498. 224000000,
  499. 336000000
  500. };
  501. static const struct ov5645_mode_info ov5645_mode_info_data[] = {
  502. {
  503. .width = 1280,
  504. .height = 960,
  505. .data = ov5645_setting_sxga,
  506. .data_size = ARRAY_SIZE(ov5645_setting_sxga),
  507. .pixel_clock = 112000000,
  508. .link_freq = 0 /* an index in link_freq[] */
  509. },
  510. {
  511. .width = 1920,
  512. .height = 1080,
  513. .data = ov5645_setting_1080p,
  514. .data_size = ARRAY_SIZE(ov5645_setting_1080p),
  515. .pixel_clock = 168000000,
  516. .link_freq = 1 /* an index in link_freq[] */
  517. },
  518. {
  519. .width = 2592,
  520. .height = 1944,
  521. .data = ov5645_setting_full,
  522. .data_size = ARRAY_SIZE(ov5645_setting_full),
  523. .pixel_clock = 168000000,
  524. .link_freq = 1 /* an index in link_freq[] */
  525. },
  526. };
  527. static int ov5645_regulators_enable(struct ov5645 *ov5645)
  528. {
  529. int ret;
  530. ret = regulator_enable(ov5645->io_regulator);
  531. if (ret < 0) {
  532. dev_err(ov5645->dev, "set io voltage failed\n");
  533. return ret;
  534. }
  535. ret = regulator_enable(ov5645->analog_regulator);
  536. if (ret) {
  537. dev_err(ov5645->dev, "set analog voltage failed\n");
  538. goto err_disable_io;
  539. }
  540. ret = regulator_enable(ov5645->core_regulator);
  541. if (ret) {
  542. dev_err(ov5645->dev, "set core voltage failed\n");
  543. goto err_disable_analog;
  544. }
  545. return 0;
  546. err_disable_analog:
  547. regulator_disable(ov5645->analog_regulator);
  548. err_disable_io:
  549. regulator_disable(ov5645->io_regulator);
  550. return ret;
  551. }
  552. static void ov5645_regulators_disable(struct ov5645 *ov5645)
  553. {
  554. int ret;
  555. ret = regulator_disable(ov5645->core_regulator);
  556. if (ret < 0)
  557. dev_err(ov5645->dev, "core regulator disable failed\n");
  558. ret = regulator_disable(ov5645->analog_regulator);
  559. if (ret < 0)
  560. dev_err(ov5645->dev, "analog regulator disable failed\n");
  561. ret = regulator_disable(ov5645->io_regulator);
  562. if (ret < 0)
  563. dev_err(ov5645->dev, "io regulator disable failed\n");
  564. }
  565. static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
  566. {
  567. u8 regbuf[3];
  568. int ret;
  569. regbuf[0] = reg >> 8;
  570. regbuf[1] = reg & 0xff;
  571. regbuf[2] = val;
  572. ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
  573. if (ret < 0) {
  574. dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
  575. __func__, ret, reg, val);
  576. return ret;
  577. }
  578. return 0;
  579. }
  580. static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
  581. {
  582. u8 regbuf[2];
  583. int ret;
  584. regbuf[0] = reg >> 8;
  585. regbuf[1] = reg & 0xff;
  586. ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
  587. if (ret < 0) {
  588. dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
  589. __func__, ret, reg);
  590. return ret;
  591. }
  592. ret = i2c_master_recv(ov5645->i2c_client, val, 1);
  593. if (ret < 0) {
  594. dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
  595. __func__, ret, reg);
  596. return ret;
  597. }
  598. return 0;
  599. }
  600. static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
  601. {
  602. u8 val = ov5645->aec_pk_manual;
  603. int ret;
  604. if (mode == V4L2_EXPOSURE_AUTO)
  605. val &= ~OV5645_AEC_MANUAL_ENABLE;
  606. else /* V4L2_EXPOSURE_MANUAL */
  607. val |= OV5645_AEC_MANUAL_ENABLE;
  608. ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
  609. if (!ret)
  610. ov5645->aec_pk_manual = val;
  611. return ret;
  612. }
  613. static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
  614. {
  615. u8 val = ov5645->aec_pk_manual;
  616. int ret;
  617. if (enable)
  618. val &= ~OV5645_AGC_MANUAL_ENABLE;
  619. else
  620. val |= OV5645_AGC_MANUAL_ENABLE;
  621. ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
  622. if (!ret)
  623. ov5645->aec_pk_manual = val;
  624. return ret;
  625. }
  626. static int ov5645_set_register_array(struct ov5645 *ov5645,
  627. const struct reg_value *settings,
  628. unsigned int num_settings)
  629. {
  630. unsigned int i;
  631. int ret;
  632. for (i = 0; i < num_settings; ++i, ++settings) {
  633. ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
  634. if (ret < 0)
  635. return ret;
  636. }
  637. return 0;
  638. }
  639. static int ov5645_set_power_on(struct ov5645 *ov5645)
  640. {
  641. int ret;
  642. ret = ov5645_regulators_enable(ov5645);
  643. if (ret < 0) {
  644. return ret;
  645. }
  646. ret = clk_prepare_enable(ov5645->xclk);
  647. if (ret < 0) {
  648. dev_err(ov5645->dev, "clk prepare enable failed\n");
  649. ov5645_regulators_disable(ov5645);
  650. return ret;
  651. }
  652. usleep_range(5000, 15000);
  653. gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
  654. usleep_range(1000, 2000);
  655. gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
  656. msleep(20);
  657. return 0;
  658. }
  659. static void ov5645_set_power_off(struct ov5645 *ov5645)
  660. {
  661. gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
  662. gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
  663. clk_disable_unprepare(ov5645->xclk);
  664. ov5645_regulators_disable(ov5645);
  665. }
  666. static int ov5645_s_power(struct v4l2_subdev *sd, int on)
  667. {
  668. struct ov5645 *ov5645 = to_ov5645(sd);
  669. int ret = 0;
  670. mutex_lock(&ov5645->power_lock);
  671. /* If the power count is modified from 0 to != 0 or from != 0 to 0,
  672. * update the power state.
  673. */
  674. if (ov5645->power_count == !on) {
  675. if (on) {
  676. ret = ov5645_set_power_on(ov5645);
  677. if (ret < 0)
  678. goto exit;
  679. ret = ov5645_set_register_array(ov5645,
  680. ov5645_global_init_setting,
  681. ARRAY_SIZE(ov5645_global_init_setting));
  682. if (ret < 0) {
  683. dev_err(ov5645->dev,
  684. "could not set init registers\n");
  685. ov5645_set_power_off(ov5645);
  686. goto exit;
  687. }
  688. usleep_range(500, 1000);
  689. } else {
  690. ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
  691. ov5645_set_power_off(ov5645);
  692. }
  693. }
  694. /* Update the power count. */
  695. ov5645->power_count += on ? 1 : -1;
  696. WARN_ON(ov5645->power_count < 0);
  697. exit:
  698. mutex_unlock(&ov5645->power_lock);
  699. return ret;
  700. }
  701. static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
  702. {
  703. u32 reg_value = (value * 0x10) + 0x40;
  704. int ret;
  705. ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
  706. if (ret < 0)
  707. return ret;
  708. return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
  709. }
  710. static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
  711. {
  712. u8 val = ov5645->timing_tc_reg21;
  713. int ret;
  714. if (value == 0)
  715. val &= ~(OV5645_SENSOR_MIRROR);
  716. else
  717. val |= (OV5645_SENSOR_MIRROR);
  718. ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
  719. if (!ret)
  720. ov5645->timing_tc_reg21 = val;
  721. return ret;
  722. }
  723. static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
  724. {
  725. u8 val = ov5645->timing_tc_reg20;
  726. int ret;
  727. if (value == 0)
  728. val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
  729. else
  730. val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
  731. ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
  732. if (!ret)
  733. ov5645->timing_tc_reg20 = val;
  734. return ret;
  735. }
  736. static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
  737. {
  738. u8 val = 0;
  739. if (value) {
  740. val = OV5645_SET_TEST_PATTERN(value - 1);
  741. val |= OV5645_TEST_PATTERN_ENABLE;
  742. }
  743. return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
  744. }
  745. static const char * const ov5645_test_pattern_menu[] = {
  746. "Disabled",
  747. "Vertical Color Bars",
  748. "Pseudo-Random Data",
  749. "Color Square",
  750. "Black Image",
  751. };
  752. static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
  753. {
  754. u8 val = 0;
  755. if (!enable_auto)
  756. val = OV5645_AWB_MANUAL_ENABLE;
  757. return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
  758. }
  759. static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
  760. {
  761. struct ov5645 *ov5645 = container_of(ctrl->handler,
  762. struct ov5645, ctrls);
  763. int ret;
  764. mutex_lock(&ov5645->power_lock);
  765. if (!ov5645->power_count) {
  766. mutex_unlock(&ov5645->power_lock);
  767. return 0;
  768. }
  769. switch (ctrl->id) {
  770. case V4L2_CID_SATURATION:
  771. ret = ov5645_set_saturation(ov5645, ctrl->val);
  772. break;
  773. case V4L2_CID_AUTO_WHITE_BALANCE:
  774. ret = ov5645_set_awb(ov5645, ctrl->val);
  775. break;
  776. case V4L2_CID_AUTOGAIN:
  777. ret = ov5645_set_agc_mode(ov5645, ctrl->val);
  778. break;
  779. case V4L2_CID_EXPOSURE_AUTO:
  780. ret = ov5645_set_aec_mode(ov5645, ctrl->val);
  781. break;
  782. case V4L2_CID_TEST_PATTERN:
  783. ret = ov5645_set_test_pattern(ov5645, ctrl->val);
  784. break;
  785. case V4L2_CID_HFLIP:
  786. ret = ov5645_set_hflip(ov5645, ctrl->val);
  787. break;
  788. case V4L2_CID_VFLIP:
  789. ret = ov5645_set_vflip(ov5645, ctrl->val);
  790. break;
  791. default:
  792. ret = -EINVAL;
  793. break;
  794. }
  795. mutex_unlock(&ov5645->power_lock);
  796. return ret;
  797. }
  798. static struct v4l2_ctrl_ops ov5645_ctrl_ops = {
  799. .s_ctrl = ov5645_s_ctrl,
  800. };
  801. static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
  802. struct v4l2_subdev_pad_config *cfg,
  803. struct v4l2_subdev_mbus_code_enum *code)
  804. {
  805. if (code->index > 0)
  806. return -EINVAL;
  807. code->code = MEDIA_BUS_FMT_UYVY8_2X8;
  808. return 0;
  809. }
  810. static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
  811. struct v4l2_subdev_pad_config *cfg,
  812. struct v4l2_subdev_frame_size_enum *fse)
  813. {
  814. if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
  815. return -EINVAL;
  816. if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
  817. return -EINVAL;
  818. fse->min_width = ov5645_mode_info_data[fse->index].width;
  819. fse->max_width = ov5645_mode_info_data[fse->index].width;
  820. fse->min_height = ov5645_mode_info_data[fse->index].height;
  821. fse->max_height = ov5645_mode_info_data[fse->index].height;
  822. return 0;
  823. }
  824. static struct v4l2_mbus_framefmt *
  825. __ov5645_get_pad_format(struct ov5645 *ov5645,
  826. struct v4l2_subdev_pad_config *cfg,
  827. unsigned int pad,
  828. enum v4l2_subdev_format_whence which)
  829. {
  830. switch (which) {
  831. case V4L2_SUBDEV_FORMAT_TRY:
  832. return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad);
  833. case V4L2_SUBDEV_FORMAT_ACTIVE:
  834. return &ov5645->fmt;
  835. default:
  836. return NULL;
  837. }
  838. }
  839. static int ov5645_get_format(struct v4l2_subdev *sd,
  840. struct v4l2_subdev_pad_config *cfg,
  841. struct v4l2_subdev_format *format)
  842. {
  843. struct ov5645 *ov5645 = to_ov5645(sd);
  844. format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad,
  845. format->which);
  846. return 0;
  847. }
  848. static struct v4l2_rect *
  849. __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
  850. unsigned int pad, enum v4l2_subdev_format_whence which)
  851. {
  852. switch (which) {
  853. case V4L2_SUBDEV_FORMAT_TRY:
  854. return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad);
  855. case V4L2_SUBDEV_FORMAT_ACTIVE:
  856. return &ov5645->crop;
  857. default:
  858. return NULL;
  859. }
  860. }
  861. static int ov5645_set_format(struct v4l2_subdev *sd,
  862. struct v4l2_subdev_pad_config *cfg,
  863. struct v4l2_subdev_format *format)
  864. {
  865. struct ov5645 *ov5645 = to_ov5645(sd);
  866. struct v4l2_mbus_framefmt *__format;
  867. struct v4l2_rect *__crop;
  868. const struct ov5645_mode_info *new_mode;
  869. int ret;
  870. __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad,
  871. format->which);
  872. new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
  873. ARRAY_SIZE(ov5645_mode_info_data),
  874. width, height,
  875. format->format.width, format->format.height);
  876. __crop->width = new_mode->width;
  877. __crop->height = new_mode->height;
  878. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  879. ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
  880. new_mode->pixel_clock);
  881. if (ret < 0)
  882. return ret;
  883. ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
  884. new_mode->link_freq);
  885. if (ret < 0)
  886. return ret;
  887. ov5645->current_mode = new_mode;
  888. }
  889. __format = __ov5645_get_pad_format(ov5645, cfg, format->pad,
  890. format->which);
  891. __format->width = __crop->width;
  892. __format->height = __crop->height;
  893. __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
  894. __format->field = V4L2_FIELD_NONE;
  895. __format->colorspace = V4L2_COLORSPACE_SRGB;
  896. format->format = *__format;
  897. return 0;
  898. }
  899. static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
  900. struct v4l2_subdev_pad_config *cfg)
  901. {
  902. struct v4l2_subdev_format fmt = { 0 };
  903. fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  904. fmt.format.width = 1920;
  905. fmt.format.height = 1080;
  906. ov5645_set_format(subdev, cfg, &fmt);
  907. return 0;
  908. }
  909. static int ov5645_get_selection(struct v4l2_subdev *sd,
  910. struct v4l2_subdev_pad_config *cfg,
  911. struct v4l2_subdev_selection *sel)
  912. {
  913. struct ov5645 *ov5645 = to_ov5645(sd);
  914. if (sel->target != V4L2_SEL_TGT_CROP)
  915. return -EINVAL;
  916. sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
  917. sel->which);
  918. return 0;
  919. }
  920. static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
  921. {
  922. struct ov5645 *ov5645 = to_ov5645(subdev);
  923. int ret;
  924. if (enable) {
  925. ret = ov5645_set_register_array(ov5645,
  926. ov5645->current_mode->data,
  927. ov5645->current_mode->data_size);
  928. if (ret < 0) {
  929. dev_err(ov5645->dev, "could not set mode %dx%d\n",
  930. ov5645->current_mode->width,
  931. ov5645->current_mode->height);
  932. return ret;
  933. }
  934. ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
  935. if (ret < 0) {
  936. dev_err(ov5645->dev, "could not sync v4l2 controls\n");
  937. return ret;
  938. }
  939. ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
  940. if (ret < 0)
  941. return ret;
  942. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  943. OV5645_SYSTEM_CTRL0_START);
  944. if (ret < 0)
  945. return ret;
  946. } else {
  947. ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
  948. if (ret < 0)
  949. return ret;
  950. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  951. OV5645_SYSTEM_CTRL0_STOP);
  952. if (ret < 0)
  953. return ret;
  954. }
  955. return 0;
  956. }
  957. static const struct v4l2_subdev_core_ops ov5645_core_ops = {
  958. .s_power = ov5645_s_power,
  959. };
  960. static const struct v4l2_subdev_video_ops ov5645_video_ops = {
  961. .s_stream = ov5645_s_stream,
  962. };
  963. static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
  964. .init_cfg = ov5645_entity_init_cfg,
  965. .enum_mbus_code = ov5645_enum_mbus_code,
  966. .enum_frame_size = ov5645_enum_frame_size,
  967. .get_fmt = ov5645_get_format,
  968. .set_fmt = ov5645_set_format,
  969. .get_selection = ov5645_get_selection,
  970. };
  971. static const struct v4l2_subdev_ops ov5645_subdev_ops = {
  972. .core = &ov5645_core_ops,
  973. .video = &ov5645_video_ops,
  974. .pad = &ov5645_subdev_pad_ops,
  975. };
  976. static int ov5645_probe(struct i2c_client *client,
  977. const struct i2c_device_id *id)
  978. {
  979. struct device *dev = &client->dev;
  980. struct device_node *endpoint;
  981. struct ov5645 *ov5645;
  982. u8 chip_id_high, chip_id_low;
  983. u32 xclk_freq;
  984. int ret;
  985. ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
  986. if (!ov5645)
  987. return -ENOMEM;
  988. ov5645->i2c_client = client;
  989. ov5645->dev = dev;
  990. endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
  991. if (!endpoint) {
  992. dev_err(dev, "endpoint node not found\n");
  993. return -EINVAL;
  994. }
  995. ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
  996. &ov5645->ep);
  997. of_node_put(endpoint);
  998. if (ret < 0) {
  999. dev_err(dev, "parsing endpoint node failed\n");
  1000. return ret;
  1001. }
  1002. if (ov5645->ep.bus_type != V4L2_MBUS_CSI2) {
  1003. dev_err(dev, "invalid bus type, must be CSI2\n");
  1004. return -EINVAL;
  1005. }
  1006. /* get system clock (xclk) */
  1007. ov5645->xclk = devm_clk_get(dev, "xclk");
  1008. if (IS_ERR(ov5645->xclk)) {
  1009. dev_err(dev, "could not get xclk");
  1010. return PTR_ERR(ov5645->xclk);
  1011. }
  1012. ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
  1013. if (ret) {
  1014. dev_err(dev, "could not get xclk frequency\n");
  1015. return ret;
  1016. }
  1017. /* external clock must be 24MHz, allow 1% tolerance */
  1018. if (xclk_freq < 23760000 || xclk_freq > 24240000) {
  1019. dev_err(dev, "external clock frequency %u is not supported\n",
  1020. xclk_freq);
  1021. return -EINVAL;
  1022. }
  1023. ret = clk_set_rate(ov5645->xclk, xclk_freq);
  1024. if (ret) {
  1025. dev_err(dev, "could not set xclk frequency\n");
  1026. return ret;
  1027. }
  1028. ov5645->io_regulator = devm_regulator_get(dev, "vdddo");
  1029. if (IS_ERR(ov5645->io_regulator)) {
  1030. dev_err(dev, "cannot get io regulator\n");
  1031. return PTR_ERR(ov5645->io_regulator);
  1032. }
  1033. ret = regulator_set_voltage(ov5645->io_regulator,
  1034. OV5645_VOLTAGE_DIGITAL_IO,
  1035. OV5645_VOLTAGE_DIGITAL_IO);
  1036. if (ret < 0) {
  1037. dev_err(dev, "cannot set io voltage\n");
  1038. return ret;
  1039. }
  1040. ov5645->core_regulator = devm_regulator_get(dev, "vddd");
  1041. if (IS_ERR(ov5645->core_regulator)) {
  1042. dev_err(dev, "cannot get core regulator\n");
  1043. return PTR_ERR(ov5645->core_regulator);
  1044. }
  1045. ret = regulator_set_voltage(ov5645->core_regulator,
  1046. OV5645_VOLTAGE_DIGITAL_CORE,
  1047. OV5645_VOLTAGE_DIGITAL_CORE);
  1048. if (ret < 0) {
  1049. dev_err(dev, "cannot set core voltage\n");
  1050. return ret;
  1051. }
  1052. ov5645->analog_regulator = devm_regulator_get(dev, "vdda");
  1053. if (IS_ERR(ov5645->analog_regulator)) {
  1054. dev_err(dev, "cannot get analog regulator\n");
  1055. return PTR_ERR(ov5645->analog_regulator);
  1056. }
  1057. ret = regulator_set_voltage(ov5645->analog_regulator,
  1058. OV5645_VOLTAGE_ANALOG,
  1059. OV5645_VOLTAGE_ANALOG);
  1060. if (ret < 0) {
  1061. dev_err(dev, "cannot set analog voltage\n");
  1062. return ret;
  1063. }
  1064. ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
  1065. if (IS_ERR(ov5645->enable_gpio)) {
  1066. dev_err(dev, "cannot get enable gpio\n");
  1067. return PTR_ERR(ov5645->enable_gpio);
  1068. }
  1069. ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  1070. if (IS_ERR(ov5645->rst_gpio)) {
  1071. dev_err(dev, "cannot get reset gpio\n");
  1072. return PTR_ERR(ov5645->rst_gpio);
  1073. }
  1074. mutex_init(&ov5645->power_lock);
  1075. v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
  1076. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1077. V4L2_CID_SATURATION, -4, 4, 1, 0);
  1078. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1079. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1080. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1081. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1082. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1083. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  1084. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1085. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  1086. v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
  1087. V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
  1088. 0, V4L2_EXPOSURE_AUTO);
  1089. v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
  1090. V4L2_CID_TEST_PATTERN,
  1091. ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
  1092. 0, 0, ov5645_test_pattern_menu);
  1093. ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
  1094. &ov5645_ctrl_ops,
  1095. V4L2_CID_PIXEL_RATE,
  1096. 1, INT_MAX, 1, 1);
  1097. ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
  1098. &ov5645_ctrl_ops,
  1099. V4L2_CID_LINK_FREQ,
  1100. ARRAY_SIZE(link_freq) - 1,
  1101. 0, link_freq);
  1102. if (ov5645->link_freq)
  1103. ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1104. ov5645->sd.ctrl_handler = &ov5645->ctrls;
  1105. if (ov5645->ctrls.error) {
  1106. dev_err(dev, "%s: control initialization error %d\n",
  1107. __func__, ov5645->ctrls.error);
  1108. ret = ov5645->ctrls.error;
  1109. goto free_ctrl;
  1110. }
  1111. v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
  1112. ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1113. ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
  1114. ov5645->sd.dev = &client->dev;
  1115. ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1116. ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
  1117. if (ret < 0) {
  1118. dev_err(dev, "could not register media entity\n");
  1119. goto free_ctrl;
  1120. }
  1121. ret = ov5645_s_power(&ov5645->sd, true);
  1122. if (ret < 0) {
  1123. dev_err(dev, "could not power up OV5645\n");
  1124. goto free_entity;
  1125. }
  1126. ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
  1127. if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
  1128. dev_err(dev, "could not read ID high\n");
  1129. ret = -ENODEV;
  1130. goto power_down;
  1131. }
  1132. ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
  1133. if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
  1134. dev_err(dev, "could not read ID low\n");
  1135. ret = -ENODEV;
  1136. goto power_down;
  1137. }
  1138. dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
  1139. ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
  1140. &ov5645->aec_pk_manual);
  1141. if (ret < 0) {
  1142. dev_err(dev, "could not read AEC/AGC mode\n");
  1143. ret = -ENODEV;
  1144. goto power_down;
  1145. }
  1146. ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
  1147. &ov5645->timing_tc_reg20);
  1148. if (ret < 0) {
  1149. dev_err(dev, "could not read vflip value\n");
  1150. ret = -ENODEV;
  1151. goto power_down;
  1152. }
  1153. ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
  1154. &ov5645->timing_tc_reg21);
  1155. if (ret < 0) {
  1156. dev_err(dev, "could not read hflip value\n");
  1157. ret = -ENODEV;
  1158. goto power_down;
  1159. }
  1160. ov5645_s_power(&ov5645->sd, false);
  1161. ret = v4l2_async_register_subdev(&ov5645->sd);
  1162. if (ret < 0) {
  1163. dev_err(dev, "could not register v4l2 device\n");
  1164. goto free_entity;
  1165. }
  1166. ov5645_entity_init_cfg(&ov5645->sd, NULL);
  1167. return 0;
  1168. power_down:
  1169. ov5645_s_power(&ov5645->sd, false);
  1170. free_entity:
  1171. media_entity_cleanup(&ov5645->sd.entity);
  1172. free_ctrl:
  1173. v4l2_ctrl_handler_free(&ov5645->ctrls);
  1174. mutex_destroy(&ov5645->power_lock);
  1175. return ret;
  1176. }
  1177. static int ov5645_remove(struct i2c_client *client)
  1178. {
  1179. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1180. struct ov5645 *ov5645 = to_ov5645(sd);
  1181. v4l2_async_unregister_subdev(&ov5645->sd);
  1182. media_entity_cleanup(&ov5645->sd.entity);
  1183. v4l2_ctrl_handler_free(&ov5645->ctrls);
  1184. mutex_destroy(&ov5645->power_lock);
  1185. return 0;
  1186. }
  1187. static const struct i2c_device_id ov5645_id[] = {
  1188. { "ov5645", 0 },
  1189. {}
  1190. };
  1191. MODULE_DEVICE_TABLE(i2c, ov5645_id);
  1192. static const struct of_device_id ov5645_of_match[] = {
  1193. { .compatible = "ovti,ov5645" },
  1194. { /* sentinel */ }
  1195. };
  1196. MODULE_DEVICE_TABLE(of, ov5645_of_match);
  1197. static struct i2c_driver ov5645_i2c_driver = {
  1198. .driver = {
  1199. .of_match_table = of_match_ptr(ov5645_of_match),
  1200. .name = "ov5645",
  1201. },
  1202. .probe = ov5645_probe,
  1203. .remove = ov5645_remove,
  1204. .id_table = ov5645_id,
  1205. };
  1206. module_i2c_driver(ov5645_i2c_driver);
  1207. MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
  1208. MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
  1209. MODULE_LICENSE("GPL v2");