rj54n1cb0c.c 35 KB

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  1. /*
  2. * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
  3. *
  4. * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/i2c.h>
  12. #include <linux/slab.h>
  13. #include <linux/v4l2-mediabus.h>
  14. #include <linux/videodev2.h>
  15. #include <linux/module.h>
  16. #include <media/i2c/rj54n1cb0c.h>
  17. #include <media/soc_camera.h>
  18. #include <media/v4l2-clk.h>
  19. #include <media/v4l2-subdev.h>
  20. #include <media/v4l2-ctrls.h>
  21. #define RJ54N1_DEV_CODE 0x0400
  22. #define RJ54N1_DEV_CODE2 0x0401
  23. #define RJ54N1_OUT_SEL 0x0403
  24. #define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404
  25. #define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405
  26. #define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406
  27. #define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407
  28. #define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408
  29. #define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409
  30. #define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a
  31. #define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b
  32. #define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c
  33. #define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d
  34. #define RJ54N1_RESIZE_N 0x040e
  35. #define RJ54N1_RESIZE_N_STEP 0x040f
  36. #define RJ54N1_RESIZE_STEP 0x0410
  37. #define RJ54N1_RESIZE_HOLD_H 0x0411
  38. #define RJ54N1_RESIZE_HOLD_L 0x0412
  39. #define RJ54N1_H_OBEN_OFS 0x0413
  40. #define RJ54N1_V_OBEN_OFS 0x0414
  41. #define RJ54N1_RESIZE_CONTROL 0x0415
  42. #define RJ54N1_STILL_CONTROL 0x0417
  43. #define RJ54N1_INC_USE_SEL_H 0x0425
  44. #define RJ54N1_INC_USE_SEL_L 0x0426
  45. #define RJ54N1_MIRROR_STILL_MODE 0x0427
  46. #define RJ54N1_INIT_START 0x0428
  47. #define RJ54N1_SCALE_1_2_LEV 0x0429
  48. #define RJ54N1_SCALE_4_LEV 0x042a
  49. #define RJ54N1_Y_GAIN 0x04d8
  50. #define RJ54N1_APT_GAIN_UP 0x04fa
  51. #define RJ54N1_RA_SEL_UL 0x0530
  52. #define RJ54N1_BYTE_SWAP 0x0531
  53. #define RJ54N1_OUT_SIGPO 0x053b
  54. #define RJ54N1_WB_SEL_WEIGHT_I 0x054e
  55. #define RJ54N1_BIT8_WB 0x0569
  56. #define RJ54N1_HCAPS_WB 0x056a
  57. #define RJ54N1_VCAPS_WB 0x056b
  58. #define RJ54N1_HCAPE_WB 0x056c
  59. #define RJ54N1_VCAPE_WB 0x056d
  60. #define RJ54N1_EXPOSURE_CONTROL 0x058c
  61. #define RJ54N1_FRAME_LENGTH_S_H 0x0595
  62. #define RJ54N1_FRAME_LENGTH_S_L 0x0596
  63. #define RJ54N1_FRAME_LENGTH_P_H 0x0597
  64. #define RJ54N1_FRAME_LENGTH_P_L 0x0598
  65. #define RJ54N1_PEAK_H 0x05b7
  66. #define RJ54N1_PEAK_50 0x05b8
  67. #define RJ54N1_PEAK_60 0x05b9
  68. #define RJ54N1_PEAK_DIFF 0x05ba
  69. #define RJ54N1_IOC 0x05ef
  70. #define RJ54N1_TG_BYPASS 0x0700
  71. #define RJ54N1_PLL_L 0x0701
  72. #define RJ54N1_PLL_N 0x0702
  73. #define RJ54N1_PLL_EN 0x0704
  74. #define RJ54N1_RATIO_TG 0x0706
  75. #define RJ54N1_RATIO_T 0x0707
  76. #define RJ54N1_RATIO_R 0x0708
  77. #define RJ54N1_RAMP_TGCLK_EN 0x0709
  78. #define RJ54N1_OCLK_DSP 0x0710
  79. #define RJ54N1_RATIO_OP 0x0711
  80. #define RJ54N1_RATIO_O 0x0712
  81. #define RJ54N1_OCLK_SEL_EN 0x0713
  82. #define RJ54N1_CLK_RST 0x0717
  83. #define RJ54N1_RESET_STANDBY 0x0718
  84. #define RJ54N1_FWFLG 0x07fe
  85. #define E_EXCLK (1 << 7)
  86. #define SOFT_STDBY (1 << 4)
  87. #define SEN_RSTX (1 << 2)
  88. #define TG_RSTX (1 << 1)
  89. #define DSP_RSTX (1 << 0)
  90. #define RESIZE_HOLD_SEL (1 << 2)
  91. #define RESIZE_GO (1 << 1)
  92. /*
  93. * When cropping, the camera automatically centers the cropped region, there
  94. * doesn't seem to be a way to specify an explicit location of the rectangle.
  95. */
  96. #define RJ54N1_COLUMN_SKIP 0
  97. #define RJ54N1_ROW_SKIP 0
  98. #define RJ54N1_MAX_WIDTH 1600
  99. #define RJ54N1_MAX_HEIGHT 1200
  100. #define PLL_L 2
  101. #define PLL_N 0x31
  102. /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
  103. /* RJ54N1CB0C has only one fixed colorspace per pixelcode */
  104. struct rj54n1_datafmt {
  105. u32 code;
  106. enum v4l2_colorspace colorspace;
  107. };
  108. /* Find a data format by a pixel code in an array */
  109. static const struct rj54n1_datafmt *rj54n1_find_datafmt(
  110. u32 code, const struct rj54n1_datafmt *fmt,
  111. int n)
  112. {
  113. int i;
  114. for (i = 0; i < n; i++)
  115. if (fmt[i].code == code)
  116. return fmt + i;
  117. return NULL;
  118. }
  119. static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
  120. {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  121. {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  122. {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  123. {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  124. {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  125. {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
  126. {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  127. {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
  128. {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
  129. };
  130. struct rj54n1_clock_div {
  131. u8 ratio_tg; /* can be 0 or an odd number */
  132. u8 ratio_t;
  133. u8 ratio_r;
  134. u8 ratio_op;
  135. u8 ratio_o;
  136. };
  137. struct rj54n1 {
  138. struct v4l2_subdev subdev;
  139. struct v4l2_ctrl_handler hdl;
  140. struct v4l2_clk *clk;
  141. struct rj54n1_clock_div clk_div;
  142. const struct rj54n1_datafmt *fmt;
  143. struct v4l2_rect rect; /* Sensor window */
  144. unsigned int tgclk_mhz;
  145. bool auto_wb;
  146. unsigned short width; /* Output window */
  147. unsigned short height;
  148. unsigned short resize; /* Sensor * 1024 / resize = Output */
  149. unsigned short scale;
  150. u8 bank;
  151. };
  152. struct rj54n1_reg_val {
  153. u16 reg;
  154. u8 val;
  155. };
  156. static const struct rj54n1_reg_val bank_4[] = {
  157. {0x417, 0},
  158. {0x42c, 0},
  159. {0x42d, 0xf0},
  160. {0x42e, 0},
  161. {0x42f, 0x50},
  162. {0x430, 0xf5},
  163. {0x431, 0x16},
  164. {0x432, 0x20},
  165. {0x433, 0},
  166. {0x434, 0xc8},
  167. {0x43c, 8},
  168. {0x43e, 0x90},
  169. {0x445, 0x83},
  170. {0x4ba, 0x58},
  171. {0x4bb, 4},
  172. {0x4bc, 0x20},
  173. {0x4db, 4},
  174. {0x4fe, 2},
  175. };
  176. static const struct rj54n1_reg_val bank_5[] = {
  177. {0x514, 0},
  178. {0x516, 0},
  179. {0x518, 0},
  180. {0x51a, 0},
  181. {0x51d, 0xff},
  182. {0x56f, 0x28},
  183. {0x575, 0x40},
  184. {0x5bc, 0x48},
  185. {0x5c1, 6},
  186. {0x5e5, 0x11},
  187. {0x5e6, 0x43},
  188. {0x5e7, 0x33},
  189. {0x5e8, 0x21},
  190. {0x5e9, 0x30},
  191. {0x5ea, 0x0},
  192. {0x5eb, 0xa5},
  193. {0x5ec, 0xff},
  194. {0x5fe, 2},
  195. };
  196. static const struct rj54n1_reg_val bank_7[] = {
  197. {0x70a, 0},
  198. {0x714, 0xff},
  199. {0x715, 0xff},
  200. {0x716, 0x1f},
  201. {0x7FE, 2},
  202. };
  203. static const struct rj54n1_reg_val bank_8[] = {
  204. {0x800, 0x00},
  205. {0x801, 0x01},
  206. {0x802, 0x61},
  207. {0x805, 0x00},
  208. {0x806, 0x00},
  209. {0x807, 0x00},
  210. {0x808, 0x00},
  211. {0x809, 0x01},
  212. {0x80A, 0x61},
  213. {0x80B, 0x00},
  214. {0x80C, 0x01},
  215. {0x80D, 0x00},
  216. {0x80E, 0x00},
  217. {0x80F, 0x00},
  218. {0x810, 0x00},
  219. {0x811, 0x01},
  220. {0x812, 0x61},
  221. {0x813, 0x00},
  222. {0x814, 0x11},
  223. {0x815, 0x00},
  224. {0x816, 0x41},
  225. {0x817, 0x00},
  226. {0x818, 0x51},
  227. {0x819, 0x01},
  228. {0x81A, 0x1F},
  229. {0x81B, 0x00},
  230. {0x81C, 0x01},
  231. {0x81D, 0x00},
  232. {0x81E, 0x11},
  233. {0x81F, 0x00},
  234. {0x820, 0x41},
  235. {0x821, 0x00},
  236. {0x822, 0x51},
  237. {0x823, 0x00},
  238. {0x824, 0x00},
  239. {0x825, 0x00},
  240. {0x826, 0x47},
  241. {0x827, 0x01},
  242. {0x828, 0x4F},
  243. {0x829, 0x00},
  244. {0x82A, 0x00},
  245. {0x82B, 0x00},
  246. {0x82C, 0x30},
  247. {0x82D, 0x00},
  248. {0x82E, 0x40},
  249. {0x82F, 0x00},
  250. {0x830, 0xB3},
  251. {0x831, 0x00},
  252. {0x832, 0xE3},
  253. {0x833, 0x00},
  254. {0x834, 0x00},
  255. {0x835, 0x00},
  256. {0x836, 0x00},
  257. {0x837, 0x00},
  258. {0x838, 0x00},
  259. {0x839, 0x01},
  260. {0x83A, 0x61},
  261. {0x83B, 0x00},
  262. {0x83C, 0x01},
  263. {0x83D, 0x00},
  264. {0x83E, 0x00},
  265. {0x83F, 0x00},
  266. {0x840, 0x00},
  267. {0x841, 0x01},
  268. {0x842, 0x61},
  269. {0x843, 0x00},
  270. {0x844, 0x1D},
  271. {0x845, 0x00},
  272. {0x846, 0x00},
  273. {0x847, 0x00},
  274. {0x848, 0x00},
  275. {0x849, 0x01},
  276. {0x84A, 0x1F},
  277. {0x84B, 0x00},
  278. {0x84C, 0x05},
  279. {0x84D, 0x00},
  280. {0x84E, 0x19},
  281. {0x84F, 0x01},
  282. {0x850, 0x21},
  283. {0x851, 0x01},
  284. {0x852, 0x5D},
  285. {0x853, 0x00},
  286. {0x854, 0x00},
  287. {0x855, 0x00},
  288. {0x856, 0x19},
  289. {0x857, 0x01},
  290. {0x858, 0x21},
  291. {0x859, 0x00},
  292. {0x85A, 0x00},
  293. {0x85B, 0x00},
  294. {0x85C, 0x00},
  295. {0x85D, 0x00},
  296. {0x85E, 0x00},
  297. {0x85F, 0x00},
  298. {0x860, 0xB3},
  299. {0x861, 0x00},
  300. {0x862, 0xE3},
  301. {0x863, 0x00},
  302. {0x864, 0x00},
  303. {0x865, 0x00},
  304. {0x866, 0x00},
  305. {0x867, 0x00},
  306. {0x868, 0x00},
  307. {0x869, 0xE2},
  308. {0x86A, 0x00},
  309. {0x86B, 0x01},
  310. {0x86C, 0x06},
  311. {0x86D, 0x00},
  312. {0x86E, 0x00},
  313. {0x86F, 0x00},
  314. {0x870, 0x60},
  315. {0x871, 0x8C},
  316. {0x872, 0x10},
  317. {0x873, 0x00},
  318. {0x874, 0xE0},
  319. {0x875, 0x00},
  320. {0x876, 0x27},
  321. {0x877, 0x01},
  322. {0x878, 0x00},
  323. {0x879, 0x00},
  324. {0x87A, 0x00},
  325. {0x87B, 0x03},
  326. {0x87C, 0x00},
  327. {0x87D, 0x00},
  328. {0x87E, 0x00},
  329. {0x87F, 0x00},
  330. {0x880, 0x00},
  331. {0x881, 0x00},
  332. {0x882, 0x00},
  333. {0x883, 0x00},
  334. {0x884, 0x00},
  335. {0x885, 0x00},
  336. {0x886, 0xF8},
  337. {0x887, 0x00},
  338. {0x888, 0x03},
  339. {0x889, 0x00},
  340. {0x88A, 0x64},
  341. {0x88B, 0x00},
  342. {0x88C, 0x03},
  343. {0x88D, 0x00},
  344. {0x88E, 0xB1},
  345. {0x88F, 0x00},
  346. {0x890, 0x03},
  347. {0x891, 0x01},
  348. {0x892, 0x1D},
  349. {0x893, 0x00},
  350. {0x894, 0x03},
  351. {0x895, 0x01},
  352. {0x896, 0x4B},
  353. {0x897, 0x00},
  354. {0x898, 0xE5},
  355. {0x899, 0x00},
  356. {0x89A, 0x01},
  357. {0x89B, 0x00},
  358. {0x89C, 0x01},
  359. {0x89D, 0x04},
  360. {0x89E, 0xC8},
  361. {0x89F, 0x00},
  362. {0x8A0, 0x01},
  363. {0x8A1, 0x01},
  364. {0x8A2, 0x61},
  365. {0x8A3, 0x00},
  366. {0x8A4, 0x01},
  367. {0x8A5, 0x00},
  368. {0x8A6, 0x00},
  369. {0x8A7, 0x00},
  370. {0x8A8, 0x00},
  371. {0x8A9, 0x00},
  372. {0x8AA, 0x7F},
  373. {0x8AB, 0x03},
  374. {0x8AC, 0x00},
  375. {0x8AD, 0x00},
  376. {0x8AE, 0x00},
  377. {0x8AF, 0x00},
  378. {0x8B0, 0x00},
  379. {0x8B1, 0x00},
  380. {0x8B6, 0x00},
  381. {0x8B7, 0x01},
  382. {0x8B8, 0x00},
  383. {0x8B9, 0x00},
  384. {0x8BA, 0x02},
  385. {0x8BB, 0x00},
  386. {0x8BC, 0xFF},
  387. {0x8BD, 0x00},
  388. {0x8FE, 2},
  389. };
  390. static const struct rj54n1_reg_val bank_10[] = {
  391. {0x10bf, 0x69}
  392. };
  393. /* Clock dividers - these are default register values, divider = register + 1 */
  394. static const struct rj54n1_clock_div clk_div = {
  395. .ratio_tg = 3 /* default: 5 */,
  396. .ratio_t = 4 /* default: 1 */,
  397. .ratio_r = 4 /* default: 0 */,
  398. .ratio_op = 1 /* default: 5 */,
  399. .ratio_o = 9 /* default: 0 */,
  400. };
  401. static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
  402. {
  403. return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
  404. }
  405. static int reg_read(struct i2c_client *client, const u16 reg)
  406. {
  407. struct rj54n1 *rj54n1 = to_rj54n1(client);
  408. int ret;
  409. /* set bank */
  410. if (rj54n1->bank != reg >> 8) {
  411. dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
  412. ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
  413. if (ret < 0)
  414. return ret;
  415. rj54n1->bank = reg >> 8;
  416. }
  417. return i2c_smbus_read_byte_data(client, reg & 0xff);
  418. }
  419. static int reg_write(struct i2c_client *client, const u16 reg,
  420. const u8 data)
  421. {
  422. struct rj54n1 *rj54n1 = to_rj54n1(client);
  423. int ret;
  424. /* set bank */
  425. if (rj54n1->bank != reg >> 8) {
  426. dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
  427. ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
  428. if (ret < 0)
  429. return ret;
  430. rj54n1->bank = reg >> 8;
  431. }
  432. dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
  433. return i2c_smbus_write_byte_data(client, reg & 0xff, data);
  434. }
  435. static int reg_set(struct i2c_client *client, const u16 reg,
  436. const u8 data, const u8 mask)
  437. {
  438. int ret;
  439. ret = reg_read(client, reg);
  440. if (ret < 0)
  441. return ret;
  442. return reg_write(client, reg, (ret & ~mask) | (data & mask));
  443. }
  444. static int reg_write_multiple(struct i2c_client *client,
  445. const struct rj54n1_reg_val *rv, const int n)
  446. {
  447. int i, ret;
  448. for (i = 0; i < n; i++) {
  449. ret = reg_write(client, rv->reg, rv->val);
  450. if (ret < 0)
  451. return ret;
  452. rv++;
  453. }
  454. return 0;
  455. }
  456. static int rj54n1_enum_mbus_code(struct v4l2_subdev *sd,
  457. struct v4l2_subdev_pad_config *cfg,
  458. struct v4l2_subdev_mbus_code_enum *code)
  459. {
  460. if (code->pad || code->index >= ARRAY_SIZE(rj54n1_colour_fmts))
  461. return -EINVAL;
  462. code->code = rj54n1_colour_fmts[code->index].code;
  463. return 0;
  464. }
  465. static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
  466. {
  467. struct i2c_client *client = v4l2_get_subdevdata(sd);
  468. /* Switch between preview and still shot modes */
  469. return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
  470. }
  471. static int rj54n1_set_rect(struct i2c_client *client,
  472. u16 reg_x, u16 reg_y, u16 reg_xy,
  473. u32 width, u32 height)
  474. {
  475. int ret;
  476. ret = reg_write(client, reg_xy,
  477. ((width >> 4) & 0x70) |
  478. ((height >> 8) & 7));
  479. if (!ret)
  480. ret = reg_write(client, reg_x, width & 0xff);
  481. if (!ret)
  482. ret = reg_write(client, reg_y, height & 0xff);
  483. return ret;
  484. }
  485. /*
  486. * Some commands, specifically certain initialisation sequences, require
  487. * a commit operation.
  488. */
  489. static int rj54n1_commit(struct i2c_client *client)
  490. {
  491. int ret = reg_write(client, RJ54N1_INIT_START, 1);
  492. msleep(10);
  493. if (!ret)
  494. ret = reg_write(client, RJ54N1_INIT_START, 0);
  495. return ret;
  496. }
  497. static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
  498. s32 *out_w, s32 *out_h);
  499. static int rj54n1_set_selection(struct v4l2_subdev *sd,
  500. struct v4l2_subdev_pad_config *cfg,
  501. struct v4l2_subdev_selection *sel)
  502. {
  503. struct i2c_client *client = v4l2_get_subdevdata(sd);
  504. struct rj54n1 *rj54n1 = to_rj54n1(client);
  505. const struct v4l2_rect *rect = &sel->r;
  506. int dummy = 0, output_w, output_h,
  507. input_w = rect->width, input_h = rect->height;
  508. int ret;
  509. if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
  510. sel->target != V4L2_SEL_TGT_CROP)
  511. return -EINVAL;
  512. /* arbitrary minimum width and height, edges unimportant */
  513. soc_camera_limit_side(&dummy, &input_w,
  514. RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH);
  515. soc_camera_limit_side(&dummy, &input_h,
  516. RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT);
  517. output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
  518. output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
  519. dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
  520. input_w, input_h, rj54n1->resize, output_w, output_h);
  521. ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
  522. if (ret < 0)
  523. return ret;
  524. rj54n1->width = output_w;
  525. rj54n1->height = output_h;
  526. rj54n1->resize = ret;
  527. rj54n1->rect.width = input_w;
  528. rj54n1->rect.height = input_h;
  529. return 0;
  530. }
  531. static int rj54n1_get_selection(struct v4l2_subdev *sd,
  532. struct v4l2_subdev_pad_config *cfg,
  533. struct v4l2_subdev_selection *sel)
  534. {
  535. struct i2c_client *client = v4l2_get_subdevdata(sd);
  536. struct rj54n1 *rj54n1 = to_rj54n1(client);
  537. if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
  538. return -EINVAL;
  539. switch (sel->target) {
  540. case V4L2_SEL_TGT_CROP_BOUNDS:
  541. case V4L2_SEL_TGT_CROP_DEFAULT:
  542. sel->r.left = RJ54N1_COLUMN_SKIP;
  543. sel->r.top = RJ54N1_ROW_SKIP;
  544. sel->r.width = RJ54N1_MAX_WIDTH;
  545. sel->r.height = RJ54N1_MAX_HEIGHT;
  546. return 0;
  547. case V4L2_SEL_TGT_CROP:
  548. sel->r = rj54n1->rect;
  549. return 0;
  550. default:
  551. return -EINVAL;
  552. }
  553. }
  554. static int rj54n1_get_fmt(struct v4l2_subdev *sd,
  555. struct v4l2_subdev_pad_config *cfg,
  556. struct v4l2_subdev_format *format)
  557. {
  558. struct v4l2_mbus_framefmt *mf = &format->format;
  559. struct i2c_client *client = v4l2_get_subdevdata(sd);
  560. struct rj54n1 *rj54n1 = to_rj54n1(client);
  561. if (format->pad)
  562. return -EINVAL;
  563. mf->code = rj54n1->fmt->code;
  564. mf->colorspace = rj54n1->fmt->colorspace;
  565. mf->field = V4L2_FIELD_NONE;
  566. mf->width = rj54n1->width;
  567. mf->height = rj54n1->height;
  568. return 0;
  569. }
  570. /*
  571. * The actual geometry configuration routine. It scales the input window into
  572. * the output one, updates the window sizes and returns an error or the resize
  573. * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
  574. */
  575. static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
  576. s32 *out_w, s32 *out_h)
  577. {
  578. struct i2c_client *client = v4l2_get_subdevdata(sd);
  579. struct rj54n1 *rj54n1 = to_rj54n1(client);
  580. unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
  581. output_w = *out_w, output_h = *out_h;
  582. u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
  583. unsigned int peak, peak_50, peak_60;
  584. int ret;
  585. /*
  586. * We have a problem with crops, where the window is larger than 512x384
  587. * and output window is larger than a half of the input one. In this
  588. * case we have to either reduce the input window to equal or below
  589. * 512x384 or the output window to equal or below 1/2 of the input.
  590. */
  591. if (output_w > max(512U, input_w / 2)) {
  592. if (2 * output_w > RJ54N1_MAX_WIDTH) {
  593. input_w = RJ54N1_MAX_WIDTH;
  594. output_w = RJ54N1_MAX_WIDTH / 2;
  595. } else {
  596. input_w = output_w * 2;
  597. }
  598. dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
  599. input_w, output_w);
  600. }
  601. if (output_h > max(384U, input_h / 2)) {
  602. if (2 * output_h > RJ54N1_MAX_HEIGHT) {
  603. input_h = RJ54N1_MAX_HEIGHT;
  604. output_h = RJ54N1_MAX_HEIGHT / 2;
  605. } else {
  606. input_h = output_h * 2;
  607. }
  608. dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
  609. input_h, output_h);
  610. }
  611. /* Idea: use the read mode for snapshots, handle separate geometries */
  612. ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
  613. RJ54N1_Y_OUTPUT_SIZE_S_L,
  614. RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
  615. if (!ret)
  616. ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
  617. RJ54N1_Y_OUTPUT_SIZE_P_L,
  618. RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
  619. if (ret < 0)
  620. return ret;
  621. if (output_w > input_w && output_h > input_h) {
  622. input_w = output_w;
  623. input_h = output_h;
  624. resize = 1024;
  625. } else {
  626. unsigned int resize_x, resize_y;
  627. resize_x = (input_w * 1024 + output_w / 2) / output_w;
  628. resize_y = (input_h * 1024 + output_h / 2) / output_h;
  629. /* We want max(resize_x, resize_y), check if it still fits */
  630. if (resize_x > resize_y &&
  631. (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
  632. resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
  633. output_h;
  634. else if (resize_y > resize_x &&
  635. (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
  636. resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
  637. output_w;
  638. else
  639. resize = max(resize_x, resize_y);
  640. /* Prohibited value ranges */
  641. switch (resize) {
  642. case 2040 ... 2047:
  643. resize = 2039;
  644. break;
  645. case 4080 ... 4095:
  646. resize = 4079;
  647. break;
  648. case 8160 ... 8191:
  649. resize = 8159;
  650. break;
  651. case 16320 ... 16384:
  652. resize = 16319;
  653. }
  654. }
  655. /* Set scaling */
  656. ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
  657. if (!ret)
  658. ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
  659. if (ret < 0)
  660. return ret;
  661. /*
  662. * Configure a skipping bitmask. The sensor will select a skipping value
  663. * among set bits automatically. This is very unclear in the datasheet
  664. * too. I was told, in this register one enables all skipping values,
  665. * that are required for a specific resize, and the camera selects
  666. * automatically, which ones to use. But it is unclear how to identify,
  667. * which cropping values are needed. Secondly, why don't we just set all
  668. * bits and let the camera choose? Would it increase processing time and
  669. * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
  670. * improve the image quality or stability for larger frames (see comment
  671. * above), but I didn't check the framerate.
  672. */
  673. skip = min(resize / 1024, 15U);
  674. inc_sel = 1 << skip;
  675. if (inc_sel <= 2)
  676. inc_sel = 0xc;
  677. else if (resize & 1023 && skip < 15)
  678. inc_sel |= 1 << (skip + 1);
  679. ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
  680. if (!ret)
  681. ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
  682. if (!rj54n1->auto_wb) {
  683. /* Auto white balance window */
  684. wb_left = output_w / 16;
  685. wb_right = (3 * output_w / 4 - 3) / 4;
  686. wb_top = output_h / 16;
  687. wb_bottom = (3 * output_h / 4 - 3) / 4;
  688. wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
  689. ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
  690. if (!ret)
  691. ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
  692. if (!ret)
  693. ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
  694. if (!ret)
  695. ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
  696. if (!ret)
  697. ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
  698. if (!ret)
  699. ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
  700. }
  701. /* Antiflicker */
  702. peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
  703. 10000;
  704. peak_50 = peak / 6;
  705. peak_60 = peak / 5;
  706. if (!ret)
  707. ret = reg_write(client, RJ54N1_PEAK_H,
  708. ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
  709. if (!ret)
  710. ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
  711. if (!ret)
  712. ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
  713. if (!ret)
  714. ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
  715. /* Start resizing */
  716. if (!ret)
  717. ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
  718. RESIZE_HOLD_SEL | RESIZE_GO | 1);
  719. if (ret < 0)
  720. return ret;
  721. /* Constant taken from manufacturer's example */
  722. msleep(230);
  723. ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
  724. if (ret < 0)
  725. return ret;
  726. *in_w = (output_w * resize + 512) / 1024;
  727. *in_h = (output_h * resize + 512) / 1024;
  728. *out_w = output_w;
  729. *out_h = output_h;
  730. dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
  731. *in_w, *in_h, resize, output_w, output_h, skip);
  732. return resize;
  733. }
  734. static int rj54n1_set_clock(struct i2c_client *client)
  735. {
  736. struct rj54n1 *rj54n1 = to_rj54n1(client);
  737. int ret;
  738. /* Enable external clock */
  739. ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
  740. /* Leave stand-by. Note: use this when implementing suspend / resume */
  741. if (!ret)
  742. ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
  743. if (!ret)
  744. ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
  745. if (!ret)
  746. ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
  747. /* TGCLK dividers */
  748. if (!ret)
  749. ret = reg_write(client, RJ54N1_RATIO_TG,
  750. rj54n1->clk_div.ratio_tg);
  751. if (!ret)
  752. ret = reg_write(client, RJ54N1_RATIO_T,
  753. rj54n1->clk_div.ratio_t);
  754. if (!ret)
  755. ret = reg_write(client, RJ54N1_RATIO_R,
  756. rj54n1->clk_div.ratio_r);
  757. /* Enable TGCLK & RAMP */
  758. if (!ret)
  759. ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
  760. /* Disable clock output */
  761. if (!ret)
  762. ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
  763. /* Set divisors */
  764. if (!ret)
  765. ret = reg_write(client, RJ54N1_RATIO_OP,
  766. rj54n1->clk_div.ratio_op);
  767. if (!ret)
  768. ret = reg_write(client, RJ54N1_RATIO_O,
  769. rj54n1->clk_div.ratio_o);
  770. /* Enable OCLK */
  771. if (!ret)
  772. ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
  773. /* Use PLL for Timing Generator, write 2 to reserved bits */
  774. if (!ret)
  775. ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
  776. /* Take sensor out of reset */
  777. if (!ret)
  778. ret = reg_write(client, RJ54N1_RESET_STANDBY,
  779. E_EXCLK | SEN_RSTX);
  780. /* Enable PLL */
  781. if (!ret)
  782. ret = reg_write(client, RJ54N1_PLL_EN, 1);
  783. /* Wait for PLL to stabilise */
  784. msleep(10);
  785. /* Enable clock to frequency divider */
  786. if (!ret)
  787. ret = reg_write(client, RJ54N1_CLK_RST, 1);
  788. if (!ret)
  789. ret = reg_read(client, RJ54N1_CLK_RST);
  790. if (ret != 1) {
  791. dev_err(&client->dev,
  792. "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
  793. return -EIO;
  794. }
  795. /* Start the PLL */
  796. ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
  797. /* Enable OCLK */
  798. if (!ret)
  799. ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
  800. return ret;
  801. }
  802. static int rj54n1_reg_init(struct i2c_client *client)
  803. {
  804. struct rj54n1 *rj54n1 = to_rj54n1(client);
  805. int ret = rj54n1_set_clock(client);
  806. if (!ret)
  807. ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
  808. if (!ret)
  809. ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
  810. /* Set binning divisors */
  811. if (!ret)
  812. ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
  813. if (!ret)
  814. ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
  815. /* Switch to fixed resize mode */
  816. if (!ret)
  817. ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
  818. RESIZE_HOLD_SEL | 1);
  819. /* Set gain */
  820. if (!ret)
  821. ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
  822. /*
  823. * Mirror the image back: default is upside down and left-to-right...
  824. * Set manual preview / still shot switching
  825. */
  826. if (!ret)
  827. ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
  828. if (!ret)
  829. ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
  830. /* Auto exposure area */
  831. if (!ret)
  832. ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
  833. /* Check current auto WB config */
  834. if (!ret)
  835. ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
  836. if (ret >= 0) {
  837. rj54n1->auto_wb = ret & 0x80;
  838. ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
  839. }
  840. if (!ret)
  841. ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
  842. if (!ret)
  843. ret = reg_write(client, RJ54N1_RESET_STANDBY,
  844. E_EXCLK | DSP_RSTX | SEN_RSTX);
  845. /* Commit init */
  846. if (!ret)
  847. ret = rj54n1_commit(client);
  848. /* Take DSP, TG, sensor out of reset */
  849. if (!ret)
  850. ret = reg_write(client, RJ54N1_RESET_STANDBY,
  851. E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
  852. /* Start register update? Same register as 0x?FE in many bank_* sets */
  853. if (!ret)
  854. ret = reg_write(client, RJ54N1_FWFLG, 2);
  855. /* Constant taken from manufacturer's example */
  856. msleep(700);
  857. return ret;
  858. }
  859. static int rj54n1_set_fmt(struct v4l2_subdev *sd,
  860. struct v4l2_subdev_pad_config *cfg,
  861. struct v4l2_subdev_format *format)
  862. {
  863. struct v4l2_mbus_framefmt *mf = &format->format;
  864. struct i2c_client *client = v4l2_get_subdevdata(sd);
  865. struct rj54n1 *rj54n1 = to_rj54n1(client);
  866. const struct rj54n1_datafmt *fmt;
  867. int output_w, output_h, max_w, max_h,
  868. input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
  869. int align = mf->code == MEDIA_BUS_FMT_SBGGR10_1X10 ||
  870. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE ||
  871. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE ||
  872. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE ||
  873. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE;
  874. int ret;
  875. if (format->pad)
  876. return -EINVAL;
  877. dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
  878. __func__, mf->code, mf->width, mf->height);
  879. fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
  880. ARRAY_SIZE(rj54n1_colour_fmts));
  881. if (!fmt) {
  882. fmt = rj54n1->fmt;
  883. mf->code = fmt->code;
  884. }
  885. mf->field = V4L2_FIELD_NONE;
  886. mf->colorspace = fmt->colorspace;
  887. v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
  888. &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
  889. if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
  890. cfg->try_fmt = *mf;
  891. return 0;
  892. }
  893. /*
  894. * Verify if the sensor has just been powered on. TODO: replace this
  895. * with proper PM, when a suitable API is available.
  896. */
  897. ret = reg_read(client, RJ54N1_RESET_STANDBY);
  898. if (ret < 0)
  899. return ret;
  900. if (!(ret & E_EXCLK)) {
  901. ret = rj54n1_reg_init(client);
  902. if (ret < 0)
  903. return ret;
  904. }
  905. /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
  906. switch (mf->code) {
  907. case MEDIA_BUS_FMT_YUYV8_2X8:
  908. ret = reg_write(client, RJ54N1_OUT_SEL, 0);
  909. if (!ret)
  910. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  911. break;
  912. case MEDIA_BUS_FMT_YVYU8_2X8:
  913. ret = reg_write(client, RJ54N1_OUT_SEL, 0);
  914. if (!ret)
  915. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  916. break;
  917. case MEDIA_BUS_FMT_RGB565_2X8_LE:
  918. ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
  919. if (!ret)
  920. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  921. break;
  922. case MEDIA_BUS_FMT_RGB565_2X8_BE:
  923. ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
  924. if (!ret)
  925. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  926. break;
  927. case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE:
  928. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  929. if (!ret)
  930. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  931. if (!ret)
  932. ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
  933. break;
  934. case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE:
  935. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  936. if (!ret)
  937. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  938. if (!ret)
  939. ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
  940. break;
  941. case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE:
  942. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  943. if (!ret)
  944. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  945. if (!ret)
  946. ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
  947. break;
  948. case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
  949. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  950. if (!ret)
  951. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  952. if (!ret)
  953. ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
  954. break;
  955. case MEDIA_BUS_FMT_SBGGR10_1X10:
  956. ret = reg_write(client, RJ54N1_OUT_SEL, 5);
  957. break;
  958. default:
  959. ret = -EINVAL;
  960. }
  961. /* Special case: a raw mode with 10 bits of data per clock tick */
  962. if (!ret)
  963. ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
  964. (mf->code == MEDIA_BUS_FMT_SBGGR10_1X10) << 1, 2);
  965. if (ret < 0)
  966. return ret;
  967. /* Supported scales 1:1 >= scale > 1:16 */
  968. max_w = mf->width * (16 * 1024 - 1) / 1024;
  969. if (input_w > max_w)
  970. input_w = max_w;
  971. max_h = mf->height * (16 * 1024 - 1) / 1024;
  972. if (input_h > max_h)
  973. input_h = max_h;
  974. output_w = mf->width;
  975. output_h = mf->height;
  976. ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
  977. if (ret < 0)
  978. return ret;
  979. fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
  980. ARRAY_SIZE(rj54n1_colour_fmts));
  981. rj54n1->fmt = fmt;
  982. rj54n1->resize = ret;
  983. rj54n1->rect.width = input_w;
  984. rj54n1->rect.height = input_h;
  985. rj54n1->width = output_w;
  986. rj54n1->height = output_h;
  987. mf->width = output_w;
  988. mf->height = output_h;
  989. mf->field = V4L2_FIELD_NONE;
  990. mf->colorspace = fmt->colorspace;
  991. return 0;
  992. }
  993. #ifdef CONFIG_VIDEO_ADV_DEBUG
  994. static int rj54n1_g_register(struct v4l2_subdev *sd,
  995. struct v4l2_dbg_register *reg)
  996. {
  997. struct i2c_client *client = v4l2_get_subdevdata(sd);
  998. if (reg->reg < 0x400 || reg->reg > 0x1fff)
  999. /* Registers > 0x0800 are only available from Sharp support */
  1000. return -EINVAL;
  1001. reg->size = 1;
  1002. reg->val = reg_read(client, reg->reg);
  1003. if (reg->val > 0xff)
  1004. return -EIO;
  1005. return 0;
  1006. }
  1007. static int rj54n1_s_register(struct v4l2_subdev *sd,
  1008. const struct v4l2_dbg_register *reg)
  1009. {
  1010. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1011. if (reg->reg < 0x400 || reg->reg > 0x1fff)
  1012. /* Registers >= 0x0800 are only available from Sharp support */
  1013. return -EINVAL;
  1014. if (reg_write(client, reg->reg, reg->val) < 0)
  1015. return -EIO;
  1016. return 0;
  1017. }
  1018. #endif
  1019. static int rj54n1_s_power(struct v4l2_subdev *sd, int on)
  1020. {
  1021. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1022. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  1023. struct rj54n1 *rj54n1 = to_rj54n1(client);
  1024. return soc_camera_set_power(&client->dev, ssdd, rj54n1->clk, on);
  1025. }
  1026. static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl)
  1027. {
  1028. struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl);
  1029. struct v4l2_subdev *sd = &rj54n1->subdev;
  1030. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1031. int data;
  1032. switch (ctrl->id) {
  1033. case V4L2_CID_VFLIP:
  1034. if (ctrl->val)
  1035. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
  1036. else
  1037. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
  1038. if (data < 0)
  1039. return -EIO;
  1040. return 0;
  1041. case V4L2_CID_HFLIP:
  1042. if (ctrl->val)
  1043. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
  1044. else
  1045. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
  1046. if (data < 0)
  1047. return -EIO;
  1048. return 0;
  1049. case V4L2_CID_GAIN:
  1050. if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0)
  1051. return -EIO;
  1052. return 0;
  1053. case V4L2_CID_AUTO_WHITE_BALANCE:
  1054. /* Auto WB area - whole image */
  1055. if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7,
  1056. 0x80) < 0)
  1057. return -EIO;
  1058. rj54n1->auto_wb = ctrl->val;
  1059. return 0;
  1060. }
  1061. return -EINVAL;
  1062. }
  1063. static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = {
  1064. .s_ctrl = rj54n1_s_ctrl,
  1065. };
  1066. static const struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
  1067. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1068. .g_register = rj54n1_g_register,
  1069. .s_register = rj54n1_s_register,
  1070. #endif
  1071. .s_power = rj54n1_s_power,
  1072. };
  1073. static int rj54n1_g_mbus_config(struct v4l2_subdev *sd,
  1074. struct v4l2_mbus_config *cfg)
  1075. {
  1076. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1077. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  1078. cfg->flags =
  1079. V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
  1080. V4L2_MBUS_MASTER | V4L2_MBUS_DATA_ACTIVE_HIGH |
  1081. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  1082. cfg->type = V4L2_MBUS_PARALLEL;
  1083. cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
  1084. return 0;
  1085. }
  1086. static int rj54n1_s_mbus_config(struct v4l2_subdev *sd,
  1087. const struct v4l2_mbus_config *cfg)
  1088. {
  1089. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1090. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  1091. /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */
  1092. if (soc_camera_apply_board_flags(ssdd, cfg) &
  1093. V4L2_MBUS_PCLK_SAMPLE_RISING)
  1094. return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4);
  1095. else
  1096. return reg_write(client, RJ54N1_OUT_SIGPO, 0);
  1097. }
  1098. static const struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
  1099. .s_stream = rj54n1_s_stream,
  1100. .g_mbus_config = rj54n1_g_mbus_config,
  1101. .s_mbus_config = rj54n1_s_mbus_config,
  1102. };
  1103. static const struct v4l2_subdev_pad_ops rj54n1_subdev_pad_ops = {
  1104. .enum_mbus_code = rj54n1_enum_mbus_code,
  1105. .get_selection = rj54n1_get_selection,
  1106. .set_selection = rj54n1_set_selection,
  1107. .get_fmt = rj54n1_get_fmt,
  1108. .set_fmt = rj54n1_set_fmt,
  1109. };
  1110. static const struct v4l2_subdev_ops rj54n1_subdev_ops = {
  1111. .core = &rj54n1_subdev_core_ops,
  1112. .video = &rj54n1_subdev_video_ops,
  1113. .pad = &rj54n1_subdev_pad_ops,
  1114. };
  1115. /*
  1116. * Interface active, can use i2c. If it fails, it can indeed mean, that
  1117. * this wasn't our capture interface, so, we wait for the right one
  1118. */
  1119. static int rj54n1_video_probe(struct i2c_client *client,
  1120. struct rj54n1_pdata *priv)
  1121. {
  1122. struct rj54n1 *rj54n1 = to_rj54n1(client);
  1123. int data1, data2;
  1124. int ret;
  1125. ret = rj54n1_s_power(&rj54n1->subdev, 1);
  1126. if (ret < 0)
  1127. return ret;
  1128. /* Read out the chip version register */
  1129. data1 = reg_read(client, RJ54N1_DEV_CODE);
  1130. data2 = reg_read(client, RJ54N1_DEV_CODE2);
  1131. if (data1 != 0x51 || data2 != 0x10) {
  1132. ret = -ENODEV;
  1133. dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
  1134. data1, data2);
  1135. goto done;
  1136. }
  1137. /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
  1138. ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
  1139. if (ret < 0)
  1140. goto done;
  1141. dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
  1142. data1, data2);
  1143. ret = v4l2_ctrl_handler_setup(&rj54n1->hdl);
  1144. done:
  1145. rj54n1_s_power(&rj54n1->subdev, 0);
  1146. return ret;
  1147. }
  1148. static int rj54n1_probe(struct i2c_client *client,
  1149. const struct i2c_device_id *did)
  1150. {
  1151. struct rj54n1 *rj54n1;
  1152. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  1153. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  1154. struct rj54n1_pdata *rj54n1_priv;
  1155. int ret;
  1156. if (!ssdd || !ssdd->drv_priv) {
  1157. dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
  1158. return -EINVAL;
  1159. }
  1160. rj54n1_priv = ssdd->drv_priv;
  1161. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  1162. dev_warn(&adapter->dev,
  1163. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
  1164. return -EIO;
  1165. }
  1166. rj54n1 = devm_kzalloc(&client->dev, sizeof(struct rj54n1), GFP_KERNEL);
  1167. if (!rj54n1)
  1168. return -ENOMEM;
  1169. v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
  1170. v4l2_ctrl_handler_init(&rj54n1->hdl, 4);
  1171. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1172. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1173. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1174. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1175. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1176. V4L2_CID_GAIN, 0, 127, 1, 66);
  1177. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1178. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  1179. rj54n1->subdev.ctrl_handler = &rj54n1->hdl;
  1180. if (rj54n1->hdl.error)
  1181. return rj54n1->hdl.error;
  1182. rj54n1->clk_div = clk_div;
  1183. rj54n1->rect.left = RJ54N1_COLUMN_SKIP;
  1184. rj54n1->rect.top = RJ54N1_ROW_SKIP;
  1185. rj54n1->rect.width = RJ54N1_MAX_WIDTH;
  1186. rj54n1->rect.height = RJ54N1_MAX_HEIGHT;
  1187. rj54n1->width = RJ54N1_MAX_WIDTH;
  1188. rj54n1->height = RJ54N1_MAX_HEIGHT;
  1189. rj54n1->fmt = &rj54n1_colour_fmts[0];
  1190. rj54n1->resize = 1024;
  1191. rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
  1192. (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
  1193. rj54n1->clk = v4l2_clk_get(&client->dev, "mclk");
  1194. if (IS_ERR(rj54n1->clk)) {
  1195. ret = PTR_ERR(rj54n1->clk);
  1196. goto eclkget;
  1197. }
  1198. ret = rj54n1_video_probe(client, rj54n1_priv);
  1199. if (ret < 0) {
  1200. v4l2_clk_put(rj54n1->clk);
  1201. eclkget:
  1202. v4l2_ctrl_handler_free(&rj54n1->hdl);
  1203. }
  1204. return ret;
  1205. }
  1206. static int rj54n1_remove(struct i2c_client *client)
  1207. {
  1208. struct rj54n1 *rj54n1 = to_rj54n1(client);
  1209. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  1210. v4l2_clk_put(rj54n1->clk);
  1211. v4l2_device_unregister_subdev(&rj54n1->subdev);
  1212. if (ssdd->free_bus)
  1213. ssdd->free_bus(ssdd);
  1214. v4l2_ctrl_handler_free(&rj54n1->hdl);
  1215. return 0;
  1216. }
  1217. static const struct i2c_device_id rj54n1_id[] = {
  1218. { "rj54n1cb0c", 0 },
  1219. { }
  1220. };
  1221. MODULE_DEVICE_TABLE(i2c, rj54n1_id);
  1222. static struct i2c_driver rj54n1_i2c_driver = {
  1223. .driver = {
  1224. .name = "rj54n1cb0c",
  1225. },
  1226. .probe = rj54n1_probe,
  1227. .remove = rj54n1_remove,
  1228. .id_table = rj54n1_id,
  1229. };
  1230. module_i2c_driver(rj54n1_i2c_driver);
  1231. MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
  1232. MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
  1233. MODULE_LICENSE("GPL v2");