vpx3220.c 14 KB

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  1. /*
  2. * vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
  3. *
  4. * Copyright (C) 2001 Laurent Pinchart <lpinchart@freegates.be>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/delay.h>
  19. #include <linux/types.h>
  20. #include <linux/slab.h>
  21. #include <linux/uaccess.h>
  22. #include <linux/i2c.h>
  23. #include <linux/videodev2.h>
  24. #include <media/v4l2-device.h>
  25. #include <media/v4l2-ctrls.h>
  26. MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
  27. MODULE_AUTHOR("Laurent Pinchart");
  28. MODULE_LICENSE("GPL");
  29. static int debug;
  30. module_param(debug, int, 0);
  31. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  32. #define VPX_TIMEOUT_COUNT 10
  33. /* ----------------------------------------------------------------------- */
  34. struct vpx3220 {
  35. struct v4l2_subdev sd;
  36. struct v4l2_ctrl_handler hdl;
  37. unsigned char reg[255];
  38. v4l2_std_id norm;
  39. int input;
  40. int enable;
  41. };
  42. static inline struct vpx3220 *to_vpx3220(struct v4l2_subdev *sd)
  43. {
  44. return container_of(sd, struct vpx3220, sd);
  45. }
  46. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  47. {
  48. return &container_of(ctrl->handler, struct vpx3220, hdl)->sd;
  49. }
  50. static char *inputs[] = { "internal", "composite", "svideo" };
  51. /* ----------------------------------------------------------------------- */
  52. static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  53. {
  54. struct i2c_client *client = v4l2_get_subdevdata(sd);
  55. struct vpx3220 *decoder = i2c_get_clientdata(client);
  56. decoder->reg[reg] = value;
  57. return i2c_smbus_write_byte_data(client, reg, value);
  58. }
  59. static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
  60. {
  61. struct i2c_client *client = v4l2_get_subdevdata(sd);
  62. return i2c_smbus_read_byte_data(client, reg);
  63. }
  64. static int vpx3220_fp_status(struct v4l2_subdev *sd)
  65. {
  66. unsigned char status;
  67. unsigned int i;
  68. for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
  69. status = vpx3220_read(sd, 0x29);
  70. if (!(status & 4))
  71. return 0;
  72. udelay(10);
  73. if (need_resched())
  74. cond_resched();
  75. }
  76. return -1;
  77. }
  78. static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
  79. {
  80. struct i2c_client *client = v4l2_get_subdevdata(sd);
  81. /* Write the 16-bit address to the FPWR register */
  82. if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
  83. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  84. return -1;
  85. }
  86. if (vpx3220_fp_status(sd) < 0)
  87. return -1;
  88. /* Write the 16-bit data to the FPDAT register */
  89. if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
  90. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  91. return -1;
  92. }
  93. return 0;
  94. }
  95. static int vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
  96. {
  97. struct i2c_client *client = v4l2_get_subdevdata(sd);
  98. s16 data;
  99. /* Write the 16-bit address to the FPRD register */
  100. if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
  101. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  102. return -1;
  103. }
  104. if (vpx3220_fp_status(sd) < 0)
  105. return -1;
  106. /* Read the 16-bit data from the FPDAT register */
  107. data = i2c_smbus_read_word_data(client, 0x28);
  108. if (data == -1) {
  109. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  110. return -1;
  111. }
  112. return swab16(data);
  113. }
  114. static int vpx3220_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
  115. {
  116. u8 reg;
  117. int ret = -1;
  118. while (len >= 2) {
  119. reg = *data++;
  120. ret = vpx3220_write(sd, reg, *data++);
  121. if (ret < 0)
  122. break;
  123. len -= 2;
  124. }
  125. return ret;
  126. }
  127. static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
  128. const u16 *data, unsigned int len)
  129. {
  130. u8 reg;
  131. int ret = 0;
  132. while (len > 1) {
  133. reg = *data++;
  134. ret |= vpx3220_fp_write(sd, reg, *data++);
  135. len -= 2;
  136. }
  137. return ret;
  138. }
  139. /* ---------------------------------------------------------------------- */
  140. static const unsigned short init_ntsc[] = {
  141. 0x1c, 0x00, /* NTSC tint angle */
  142. 0x88, 17, /* Window 1 vertical */
  143. 0x89, 240, /* Vertical lines in */
  144. 0x8a, 240, /* Vertical lines out */
  145. 0x8b, 000, /* Horizontal begin */
  146. 0x8c, 640, /* Horizontal length */
  147. 0x8d, 640, /* Number of pixels */
  148. 0x8f, 0xc00, /* Disable window 2 */
  149. 0xf0, 0x73, /* 13.5 MHz transport, Forced
  150. * mode, latch windows */
  151. 0xf2, 0x13, /* NTSC M, composite input */
  152. 0xe7, 0x1e1, /* Enable vertical standard
  153. * locking @ 240 lines */
  154. };
  155. static const unsigned short init_pal[] = {
  156. 0x88, 23, /* Window 1 vertical begin */
  157. 0x89, 288, /* Vertical lines in (16 lines
  158. * skipped by the VFE) */
  159. 0x8a, 288, /* Vertical lines out (16 lines
  160. * skipped by the VFE) */
  161. 0x8b, 16, /* Horizontal begin */
  162. 0x8c, 768, /* Horizontal length */
  163. 0x8d, 784, /* Number of pixels
  164. * Must be >= Horizontal begin + Horizontal length */
  165. 0x8f, 0xc00, /* Disable window 2 */
  166. 0xf0, 0x77, /* 13.5 MHz transport, Forced
  167. * mode, latch windows */
  168. 0xf2, 0x3d1, /* PAL B,G,H,I, composite input */
  169. 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
  170. };
  171. static const unsigned short init_secam[] = {
  172. 0x88, 23, /* Window 1 vertical begin */
  173. 0x89, 288, /* Vertical lines in (16 lines
  174. * skipped by the VFE) */
  175. 0x8a, 288, /* Vertical lines out (16 lines
  176. * skipped by the VFE) */
  177. 0x8b, 16, /* Horizontal begin */
  178. 0x8c, 768, /* Horizontal length */
  179. 0x8d, 784, /* Number of pixels
  180. * Must be >= Horizontal begin + Horizontal length */
  181. 0x8f, 0xc00, /* Disable window 2 */
  182. 0xf0, 0x77, /* 13.5 MHz transport, Forced
  183. * mode, latch windows */
  184. 0xf2, 0x3d5, /* SECAM, composite input */
  185. 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
  186. };
  187. static const unsigned char init_common[] = {
  188. 0xf2, 0x00, /* Disable all outputs */
  189. 0x33, 0x0d, /* Luma : VIN2, Chroma : CIN
  190. * (clamp off) */
  191. 0xd8, 0xa8, /* HREF/VREF active high, VREF
  192. * pulse = 2, Odd/Even flag */
  193. 0x20, 0x03, /* IF compensation 0dB/oct */
  194. 0xe0, 0xff, /* Open up all comparators */
  195. 0xe1, 0x00,
  196. 0xe2, 0x7f,
  197. 0xe3, 0x80,
  198. 0xe4, 0x7f,
  199. 0xe5, 0x80,
  200. 0xe6, 0x00, /* Brightness set to 0 */
  201. 0xe7, 0xe0, /* Contrast to 1.0, noise shaping
  202. * 10 to 8 2-bit error diffusion */
  203. 0xe8, 0xf8, /* YUV422, CbCr binary offset,
  204. * ... (p.32) */
  205. 0xea, 0x18, /* LLC2 connected, output FIFO
  206. * reset with VACTintern */
  207. 0xf0, 0x8a, /* Half full level to 10, bus
  208. * shuffler [7:0, 23:16, 15:8] */
  209. 0xf1, 0x18, /* Single clock, sync mode, no
  210. * FE delay, no HLEN counter */
  211. 0xf8, 0x12, /* Port A, PIXCLK, HF# & FE#
  212. * strength to 2 */
  213. 0xf9, 0x24, /* Port B, HREF, VREF, PREF &
  214. * ALPHA strength to 4 */
  215. };
  216. static const unsigned short init_fp[] = {
  217. 0x59, 0,
  218. 0xa0, 2070, /* ACC reference */
  219. 0xa3, 0,
  220. 0xa4, 0,
  221. 0xa8, 30,
  222. 0xb2, 768,
  223. 0xbe, 27,
  224. 0x58, 0,
  225. 0x26, 0,
  226. 0x4b, 0x298, /* PLL gain */
  227. };
  228. static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
  229. {
  230. struct vpx3220 *decoder = to_vpx3220(sd);
  231. vpx3220_write_block(sd, init_common, sizeof(init_common));
  232. vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
  233. if (decoder->norm & V4L2_STD_NTSC)
  234. vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
  235. else if (decoder->norm & V4L2_STD_PAL)
  236. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  237. else if (decoder->norm & V4L2_STD_SECAM)
  238. vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
  239. else
  240. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  241. return 0;
  242. }
  243. static int vpx3220_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
  244. {
  245. int res = V4L2_IN_ST_NO_SIGNAL, status;
  246. v4l2_std_id std = pstd ? *pstd : V4L2_STD_ALL;
  247. status = vpx3220_fp_read(sd, 0x0f3);
  248. v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);
  249. if (status < 0)
  250. return status;
  251. if ((status & 0x20) == 0) {
  252. res = 0;
  253. switch (status & 0x18) {
  254. case 0x00:
  255. case 0x10:
  256. case 0x14:
  257. case 0x18:
  258. std &= V4L2_STD_PAL;
  259. break;
  260. case 0x08:
  261. std &= V4L2_STD_SECAM;
  262. break;
  263. case 0x04:
  264. case 0x0c:
  265. case 0x1c:
  266. std &= V4L2_STD_NTSC;
  267. break;
  268. }
  269. } else {
  270. std = V4L2_STD_UNKNOWN;
  271. }
  272. if (pstd)
  273. *pstd = std;
  274. if (pstatus)
  275. *pstatus = res;
  276. return 0;
  277. }
  278. static int vpx3220_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
  279. {
  280. v4l2_dbg(1, debug, sd, "querystd\n");
  281. return vpx3220_status(sd, NULL, std);
  282. }
  283. static int vpx3220_g_input_status(struct v4l2_subdev *sd, u32 *status)
  284. {
  285. v4l2_dbg(1, debug, sd, "g_input_status\n");
  286. return vpx3220_status(sd, status, NULL);
  287. }
  288. static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  289. {
  290. struct vpx3220 *decoder = to_vpx3220(sd);
  291. int temp_input;
  292. /* Here we back up the input selection because it gets
  293. overwritten when we fill the registers with the
  294. chosen video norm */
  295. temp_input = vpx3220_fp_read(sd, 0xf2);
  296. v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
  297. if (std & V4L2_STD_NTSC) {
  298. vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
  299. v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
  300. } else if (std & V4L2_STD_PAL) {
  301. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  302. v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
  303. } else if (std & V4L2_STD_SECAM) {
  304. vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
  305. v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
  306. } else {
  307. return -EINVAL;
  308. }
  309. decoder->norm = std;
  310. /* And here we set the backed up video input again */
  311. vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);
  312. udelay(10);
  313. return 0;
  314. }
  315. static int vpx3220_s_routing(struct v4l2_subdev *sd,
  316. u32 input, u32 output, u32 config)
  317. {
  318. int data;
  319. /* RJ: input = 0: ST8 (PCTV) input
  320. input = 1: COMPOSITE input
  321. input = 2: SVHS input */
  322. const int input_vals[3][2] = {
  323. {0x0c, 0},
  324. {0x0d, 0},
  325. {0x0e, 1}
  326. };
  327. if (input > 2)
  328. return -EINVAL;
  329. v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[input]);
  330. vpx3220_write(sd, 0x33, input_vals[input][0]);
  331. data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
  332. if (data < 0)
  333. return data;
  334. /* 0x0010 is required to latch the setting */
  335. vpx3220_fp_write(sd, 0xf2,
  336. data | (input_vals[input][1] << 5) | 0x0010);
  337. udelay(10);
  338. return 0;
  339. }
  340. static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
  341. {
  342. v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");
  343. vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
  344. return 0;
  345. }
  346. static int vpx3220_s_ctrl(struct v4l2_ctrl *ctrl)
  347. {
  348. struct v4l2_subdev *sd = to_sd(ctrl);
  349. switch (ctrl->id) {
  350. case V4L2_CID_BRIGHTNESS:
  351. vpx3220_write(sd, 0xe6, ctrl->val);
  352. return 0;
  353. case V4L2_CID_CONTRAST:
  354. /* Bit 7 and 8 is for noise shaping */
  355. vpx3220_write(sd, 0xe7, ctrl->val + 192);
  356. return 0;
  357. case V4L2_CID_SATURATION:
  358. vpx3220_fp_write(sd, 0xa0, ctrl->val);
  359. return 0;
  360. case V4L2_CID_HUE:
  361. vpx3220_fp_write(sd, 0x1c, ctrl->val);
  362. return 0;
  363. }
  364. return -EINVAL;
  365. }
  366. /* ----------------------------------------------------------------------- */
  367. static const struct v4l2_ctrl_ops vpx3220_ctrl_ops = {
  368. .s_ctrl = vpx3220_s_ctrl,
  369. };
  370. static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
  371. .init = vpx3220_init,
  372. };
  373. static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
  374. .s_std = vpx3220_s_std,
  375. .s_routing = vpx3220_s_routing,
  376. .s_stream = vpx3220_s_stream,
  377. .querystd = vpx3220_querystd,
  378. .g_input_status = vpx3220_g_input_status,
  379. };
  380. static const struct v4l2_subdev_ops vpx3220_ops = {
  381. .core = &vpx3220_core_ops,
  382. .video = &vpx3220_video_ops,
  383. };
  384. /* -----------------------------------------------------------------------
  385. * Client management code
  386. */
  387. static int vpx3220_probe(struct i2c_client *client,
  388. const struct i2c_device_id *id)
  389. {
  390. struct vpx3220 *decoder;
  391. struct v4l2_subdev *sd;
  392. const char *name = NULL;
  393. u8 ver;
  394. u16 pn;
  395. /* Check if the adapter supports the needed features */
  396. if (!i2c_check_functionality(client->adapter,
  397. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
  398. return -ENODEV;
  399. decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
  400. if (decoder == NULL)
  401. return -ENOMEM;
  402. sd = &decoder->sd;
  403. v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
  404. decoder->norm = V4L2_STD_PAL;
  405. decoder->input = 0;
  406. decoder->enable = 1;
  407. v4l2_ctrl_handler_init(&decoder->hdl, 4);
  408. v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
  409. V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
  410. v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
  411. V4L2_CID_CONTRAST, 0, 63, 1, 32);
  412. v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
  413. V4L2_CID_SATURATION, 0, 4095, 1, 2048);
  414. v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
  415. V4L2_CID_HUE, -512, 511, 1, 0);
  416. sd->ctrl_handler = &decoder->hdl;
  417. if (decoder->hdl.error) {
  418. int err = decoder->hdl.error;
  419. v4l2_ctrl_handler_free(&decoder->hdl);
  420. return err;
  421. }
  422. v4l2_ctrl_handler_setup(&decoder->hdl);
  423. ver = i2c_smbus_read_byte_data(client, 0x00);
  424. pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
  425. i2c_smbus_read_byte_data(client, 0x01);
  426. if (ver == 0xec) {
  427. switch (pn) {
  428. case 0x4680:
  429. name = "vpx3220a";
  430. break;
  431. case 0x4260:
  432. name = "vpx3216b";
  433. break;
  434. case 0x4280:
  435. name = "vpx3214c";
  436. break;
  437. }
  438. }
  439. if (name)
  440. v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
  441. client->addr << 1, client->adapter->name);
  442. else
  443. v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
  444. ver, pn, client->addr << 1, client->adapter->name);
  445. vpx3220_write_block(sd, init_common, sizeof(init_common));
  446. vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
  447. /* Default to PAL */
  448. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  449. return 0;
  450. }
  451. static int vpx3220_remove(struct i2c_client *client)
  452. {
  453. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  454. struct vpx3220 *decoder = to_vpx3220(sd);
  455. v4l2_device_unregister_subdev(sd);
  456. v4l2_ctrl_handler_free(&decoder->hdl);
  457. return 0;
  458. }
  459. static const struct i2c_device_id vpx3220_id[] = {
  460. { "vpx3220a", 0 },
  461. { "vpx3216b", 0 },
  462. { "vpx3214c", 0 },
  463. { }
  464. };
  465. MODULE_DEVICE_TABLE(i2c, vpx3220_id);
  466. static struct i2c_driver vpx3220_driver = {
  467. .driver = {
  468. .name = "vpx3220",
  469. },
  470. .probe = vpx3220_probe,
  471. .remove = vpx3220_remove,
  472. .id_table = vpx3220_id,
  473. };
  474. module_i2c_driver(vpx3220_driver);