mtk_jpeg_hw.c 12 KB

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  1. /*
  2. * Copyright (c) 2016 MediaTek Inc.
  3. * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
  4. * Rick Chang <rick.chang@mediatek.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/io.h>
  16. #include <linux/kernel.h>
  17. #include <media/videobuf2-core.h>
  18. #include "mtk_jpeg_hw.h"
  19. #define MTK_JPEG_DUNUM_MASK(val) (((val) - 1) & 0x3)
  20. enum mtk_jpeg_color {
  21. MTK_JPEG_COLOR_420 = 0x00221111,
  22. MTK_JPEG_COLOR_422 = 0x00211111,
  23. MTK_JPEG_COLOR_444 = 0x00111111,
  24. MTK_JPEG_COLOR_422V = 0x00121111,
  25. MTK_JPEG_COLOR_422X2 = 0x00412121,
  26. MTK_JPEG_COLOR_422VX2 = 0x00222121,
  27. MTK_JPEG_COLOR_400 = 0x00110000
  28. };
  29. static inline int mtk_jpeg_verify_align(u32 val, int align, u32 reg)
  30. {
  31. if (val & (align - 1)) {
  32. pr_err("mtk-jpeg: write reg %x without %d align\n", reg, align);
  33. return -1;
  34. }
  35. return 0;
  36. }
  37. static int mtk_jpeg_decide_format(struct mtk_jpeg_dec_param *param)
  38. {
  39. param->src_color = (param->sampling_w[0] << 20) |
  40. (param->sampling_h[0] << 16) |
  41. (param->sampling_w[1] << 12) |
  42. (param->sampling_h[1] << 8) |
  43. (param->sampling_w[2] << 4) |
  44. (param->sampling_h[2]);
  45. param->uv_brz_w = 0;
  46. switch (param->src_color) {
  47. case MTK_JPEG_COLOR_444:
  48. param->uv_brz_w = 1;
  49. param->dst_fourcc = V4L2_PIX_FMT_YUV422M;
  50. break;
  51. case MTK_JPEG_COLOR_422X2:
  52. case MTK_JPEG_COLOR_422:
  53. param->dst_fourcc = V4L2_PIX_FMT_YUV422M;
  54. break;
  55. case MTK_JPEG_COLOR_422V:
  56. case MTK_JPEG_COLOR_422VX2:
  57. param->uv_brz_w = 1;
  58. param->dst_fourcc = V4L2_PIX_FMT_YUV420M;
  59. break;
  60. case MTK_JPEG_COLOR_420:
  61. param->dst_fourcc = V4L2_PIX_FMT_YUV420M;
  62. break;
  63. case MTK_JPEG_COLOR_400:
  64. param->dst_fourcc = V4L2_PIX_FMT_GREY;
  65. break;
  66. default:
  67. param->dst_fourcc = 0;
  68. return -1;
  69. }
  70. return 0;
  71. }
  72. static void mtk_jpeg_calc_mcu(struct mtk_jpeg_dec_param *param)
  73. {
  74. u32 factor_w, factor_h;
  75. u32 i, comp, blk;
  76. factor_w = 2 + param->sampling_w[0];
  77. factor_h = 2 + param->sampling_h[0];
  78. param->mcu_w = (param->pic_w + (1 << factor_w) - 1) >> factor_w;
  79. param->mcu_h = (param->pic_h + (1 << factor_h) - 1) >> factor_h;
  80. param->total_mcu = param->mcu_w * param->mcu_h;
  81. param->unit_num = ((param->pic_w + 7) >> 3) * ((param->pic_h + 7) >> 3);
  82. param->blk_num = 0;
  83. for (i = 0; i < MTK_JPEG_COMP_MAX; i++) {
  84. param->blk_comp[i] = 0;
  85. if (i >= param->comp_num)
  86. continue;
  87. param->blk_comp[i] = param->sampling_w[i] *
  88. param->sampling_h[i];
  89. param->blk_num += param->blk_comp[i];
  90. }
  91. param->membership = 0;
  92. for (i = 0, blk = 0, comp = 0; i < MTK_JPEG_BLOCK_MAX; i++) {
  93. if (i < param->blk_num && comp < param->comp_num) {
  94. u32 tmp;
  95. tmp = (0x04 + (comp & 0x3));
  96. param->membership |= tmp << (i * 3);
  97. if (++blk == param->blk_comp[comp]) {
  98. comp++;
  99. blk = 0;
  100. }
  101. } else {
  102. param->membership |= 7 << (i * 3);
  103. }
  104. }
  105. }
  106. static void mtk_jpeg_calc_dma_group(struct mtk_jpeg_dec_param *param)
  107. {
  108. u32 factor_mcu = 3;
  109. if (param->src_color == MTK_JPEG_COLOR_444 &&
  110. param->dst_fourcc == V4L2_PIX_FMT_YUV422M)
  111. factor_mcu = 4;
  112. else if (param->src_color == MTK_JPEG_COLOR_422V &&
  113. param->dst_fourcc == V4L2_PIX_FMT_YUV420M)
  114. factor_mcu = 4;
  115. else if (param->src_color == MTK_JPEG_COLOR_422X2 &&
  116. param->dst_fourcc == V4L2_PIX_FMT_YUV422M)
  117. factor_mcu = 2;
  118. else if (param->src_color == MTK_JPEG_COLOR_400 ||
  119. (param->src_color & 0x0FFFF) == 0)
  120. factor_mcu = 4;
  121. param->dma_mcu = 1 << factor_mcu;
  122. param->dma_group = param->mcu_w / param->dma_mcu;
  123. param->dma_last_mcu = param->mcu_w % param->dma_mcu;
  124. if (param->dma_last_mcu)
  125. param->dma_group++;
  126. else
  127. param->dma_last_mcu = param->dma_mcu;
  128. }
  129. static int mtk_jpeg_calc_dst_size(struct mtk_jpeg_dec_param *param)
  130. {
  131. u32 i, padding_w;
  132. u32 ds_row_h[3];
  133. u32 brz_w[3];
  134. brz_w[0] = 0;
  135. brz_w[1] = param->uv_brz_w;
  136. brz_w[2] = brz_w[1];
  137. for (i = 0; i < param->comp_num; i++) {
  138. if (brz_w[i] > 3)
  139. return -1;
  140. padding_w = param->mcu_w * MTK_JPEG_DCTSIZE *
  141. param->sampling_w[i];
  142. /* output format is 420/422 */
  143. param->comp_w[i] = padding_w >> brz_w[i];
  144. param->comp_w[i] = mtk_jpeg_align(param->comp_w[i],
  145. MTK_JPEG_DCTSIZE);
  146. param->img_stride[i] = i ? mtk_jpeg_align(param->comp_w[i], 16)
  147. : mtk_jpeg_align(param->comp_w[i], 32);
  148. ds_row_h[i] = (MTK_JPEG_DCTSIZE * param->sampling_h[i]);
  149. }
  150. param->dec_w = param->img_stride[0];
  151. param->dec_h = ds_row_h[0] * param->mcu_h;
  152. for (i = 0; i < MTK_JPEG_COMP_MAX; i++) {
  153. /* They must be equal in frame mode. */
  154. param->mem_stride[i] = param->img_stride[i];
  155. param->comp_size[i] = param->mem_stride[i] * ds_row_h[i] *
  156. param->mcu_h;
  157. }
  158. param->y_size = param->comp_size[0];
  159. param->uv_size = param->comp_size[1];
  160. param->dec_size = param->y_size + (param->uv_size << 1);
  161. return 0;
  162. }
  163. int mtk_jpeg_dec_fill_param(struct mtk_jpeg_dec_param *param)
  164. {
  165. if (mtk_jpeg_decide_format(param))
  166. return -1;
  167. mtk_jpeg_calc_mcu(param);
  168. mtk_jpeg_calc_dma_group(param);
  169. if (mtk_jpeg_calc_dst_size(param))
  170. return -2;
  171. return 0;
  172. }
  173. u32 mtk_jpeg_dec_get_int_status(void __iomem *base)
  174. {
  175. u32 ret;
  176. ret = readl(base + JPGDEC_REG_INTERRUPT_STATUS) & BIT_INQST_MASK_ALLIRQ;
  177. if (ret)
  178. writel(ret, base + JPGDEC_REG_INTERRUPT_STATUS);
  179. return ret;
  180. }
  181. u32 mtk_jpeg_dec_enum_result(u32 irq_result)
  182. {
  183. if (irq_result & BIT_INQST_MASK_EOF)
  184. return MTK_JPEG_DEC_RESULT_EOF_DONE;
  185. if (irq_result & BIT_INQST_MASK_PAUSE)
  186. return MTK_JPEG_DEC_RESULT_PAUSE;
  187. if (irq_result & BIT_INQST_MASK_UNDERFLOW)
  188. return MTK_JPEG_DEC_RESULT_UNDERFLOW;
  189. if (irq_result & BIT_INQST_MASK_OVERFLOW)
  190. return MTK_JPEG_DEC_RESULT_OVERFLOW;
  191. if (irq_result & BIT_INQST_MASK_ERROR_BS)
  192. return MTK_JPEG_DEC_RESULT_ERROR_BS;
  193. return MTK_JPEG_DEC_RESULT_ERROR_UNKNOWN;
  194. }
  195. void mtk_jpeg_dec_start(void __iomem *base)
  196. {
  197. writel(0, base + JPGDEC_REG_TRIG);
  198. }
  199. static void mtk_jpeg_dec_soft_reset(void __iomem *base)
  200. {
  201. writel(0x0000FFFF, base + JPGDEC_REG_INTERRUPT_STATUS);
  202. writel(0x00, base + JPGDEC_REG_RESET);
  203. writel(0x01, base + JPGDEC_REG_RESET);
  204. }
  205. static void mtk_jpeg_dec_hard_reset(void __iomem *base)
  206. {
  207. writel(0x00, base + JPGDEC_REG_RESET);
  208. writel(0x10, base + JPGDEC_REG_RESET);
  209. }
  210. void mtk_jpeg_dec_reset(void __iomem *base)
  211. {
  212. mtk_jpeg_dec_soft_reset(base);
  213. mtk_jpeg_dec_hard_reset(base);
  214. }
  215. static void mtk_jpeg_dec_set_brz_factor(void __iomem *base, u8 yscale_w,
  216. u8 yscale_h, u8 uvscale_w, u8 uvscale_h)
  217. {
  218. u32 val;
  219. val = (uvscale_h << 12) | (uvscale_w << 8) |
  220. (yscale_h << 4) | yscale_w;
  221. writel(val, base + JPGDEC_REG_BRZ_FACTOR);
  222. }
  223. static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, u32 addr_y,
  224. u32 addr_u, u32 addr_v)
  225. {
  226. mtk_jpeg_verify_align(addr_y, 16, JPGDEC_REG_DEST_ADDR0_Y);
  227. writel(addr_y, base + JPGDEC_REG_DEST_ADDR0_Y);
  228. mtk_jpeg_verify_align(addr_u, 16, JPGDEC_REG_DEST_ADDR0_U);
  229. writel(addr_u, base + JPGDEC_REG_DEST_ADDR0_U);
  230. mtk_jpeg_verify_align(addr_v, 16, JPGDEC_REG_DEST_ADDR0_V);
  231. writel(addr_v, base + JPGDEC_REG_DEST_ADDR0_V);
  232. }
  233. static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, u32 addr_y,
  234. u32 addr_u, u32 addr_v)
  235. {
  236. writel(addr_y, base + JPGDEC_REG_DEST_ADDR1_Y);
  237. writel(addr_u, base + JPGDEC_REG_DEST_ADDR1_U);
  238. writel(addr_v, base + JPGDEC_REG_DEST_ADDR1_V);
  239. }
  240. static void mtk_jpeg_dec_set_mem_stride(void __iomem *base, u32 stride_y,
  241. u32 stride_uv)
  242. {
  243. writel((stride_y & 0xFFFF), base + JPGDEC_REG_STRIDE_Y);
  244. writel((stride_uv & 0xFFFF), base + JPGDEC_REG_STRIDE_UV);
  245. }
  246. static void mtk_jpeg_dec_set_img_stride(void __iomem *base, u32 stride_y,
  247. u32 stride_uv)
  248. {
  249. writel((stride_y & 0xFFFF), base + JPGDEC_REG_IMG_STRIDE_Y);
  250. writel((stride_uv & 0xFFFF), base + JPGDEC_REG_IMG_STRIDE_UV);
  251. }
  252. static void mtk_jpeg_dec_set_pause_mcu_idx(void __iomem *base, u32 idx)
  253. {
  254. writel(idx & 0x0003FFFFFF, base + JPGDEC_REG_PAUSE_MCU_NUM);
  255. }
  256. static void mtk_jpeg_dec_set_dec_mode(void __iomem *base, u32 mode)
  257. {
  258. writel(mode & 0x03, base + JPGDEC_REG_OPERATION_MODE);
  259. }
  260. static void mtk_jpeg_dec_set_bs_write_ptr(void __iomem *base, u32 ptr)
  261. {
  262. mtk_jpeg_verify_align(ptr, 16, JPGDEC_REG_FILE_BRP);
  263. writel(ptr, base + JPGDEC_REG_FILE_BRP);
  264. }
  265. static void mtk_jpeg_dec_set_bs_info(void __iomem *base, u32 addr, u32 size)
  266. {
  267. mtk_jpeg_verify_align(addr, 16, JPGDEC_REG_FILE_ADDR);
  268. mtk_jpeg_verify_align(size, 128, JPGDEC_REG_FILE_TOTAL_SIZE);
  269. writel(addr, base + JPGDEC_REG_FILE_ADDR);
  270. writel(size, base + JPGDEC_REG_FILE_TOTAL_SIZE);
  271. }
  272. static void mtk_jpeg_dec_set_comp_id(void __iomem *base, u32 id_y, u32 id_u,
  273. u32 id_v)
  274. {
  275. u32 val;
  276. val = ((id_y & 0x00FF) << 24) | ((id_u & 0x00FF) << 16) |
  277. ((id_v & 0x00FF) << 8);
  278. writel(val, base + JPGDEC_REG_COMP_ID);
  279. }
  280. static void mtk_jpeg_dec_set_total_mcu(void __iomem *base, u32 num)
  281. {
  282. writel(num - 1, base + JPGDEC_REG_TOTAL_MCU_NUM);
  283. }
  284. static void mtk_jpeg_dec_set_comp0_du(void __iomem *base, u32 num)
  285. {
  286. writel(num - 1, base + JPGDEC_REG_COMP0_DATA_UNIT_NUM);
  287. }
  288. static void mtk_jpeg_dec_set_du_membership(void __iomem *base, u32 member,
  289. u32 gmc, u32 isgray)
  290. {
  291. if (isgray)
  292. member = 0x3FFFFFFC;
  293. member |= (isgray << 31) | (gmc << 30);
  294. writel(member, base + JPGDEC_REG_DU_CTRL);
  295. }
  296. static void mtk_jpeg_dec_set_q_table(void __iomem *base, u32 id0, u32 id1,
  297. u32 id2)
  298. {
  299. u32 val;
  300. val = ((id0 & 0x0f) << 8) | ((id1 & 0x0f) << 4) | ((id2 & 0x0f) << 0);
  301. writel(val, base + JPGDEC_REG_QT_ID);
  302. }
  303. static void mtk_jpeg_dec_set_dma_group(void __iomem *base, u32 mcu_group,
  304. u32 group_num, u32 last_mcu)
  305. {
  306. u32 val;
  307. val = (((mcu_group - 1) & 0x00FF) << 16) |
  308. (((group_num - 1) & 0x007F) << 8) |
  309. ((last_mcu - 1) & 0x00FF);
  310. writel(val, base + JPGDEC_REG_WDMA_CTRL);
  311. }
  312. static void mtk_jpeg_dec_set_sampling_factor(void __iomem *base, u32 comp_num,
  313. u32 y_w, u32 y_h, u32 u_w,
  314. u32 u_h, u32 v_w, u32 v_h)
  315. {
  316. u32 val;
  317. u32 y_wh = (MTK_JPEG_DUNUM_MASK(y_w) << 2) | MTK_JPEG_DUNUM_MASK(y_h);
  318. u32 u_wh = (MTK_JPEG_DUNUM_MASK(u_w) << 2) | MTK_JPEG_DUNUM_MASK(u_h);
  319. u32 v_wh = (MTK_JPEG_DUNUM_MASK(v_w) << 2) | MTK_JPEG_DUNUM_MASK(v_h);
  320. if (comp_num == 1)
  321. val = 0;
  322. else
  323. val = (y_wh << 8) | (u_wh << 4) | v_wh;
  324. writel(val, base + JPGDEC_REG_DU_NUM);
  325. }
  326. void mtk_jpeg_dec_set_config(void __iomem *base,
  327. struct mtk_jpeg_dec_param *config,
  328. struct mtk_jpeg_bs *bs,
  329. struct mtk_jpeg_fb *fb)
  330. {
  331. mtk_jpeg_dec_set_brz_factor(base, 0, 0, config->uv_brz_w, 0);
  332. mtk_jpeg_dec_set_dec_mode(base, 0);
  333. mtk_jpeg_dec_set_comp0_du(base, config->unit_num);
  334. mtk_jpeg_dec_set_total_mcu(base, config->total_mcu);
  335. mtk_jpeg_dec_set_bs_info(base, bs->str_addr, bs->size);
  336. mtk_jpeg_dec_set_bs_write_ptr(base, bs->end_addr);
  337. mtk_jpeg_dec_set_du_membership(base, config->membership, 1,
  338. (config->comp_num == 1) ? 1 : 0);
  339. mtk_jpeg_dec_set_comp_id(base, config->comp_id[0], config->comp_id[1],
  340. config->comp_id[2]);
  341. mtk_jpeg_dec_set_q_table(base, config->qtbl_num[0],
  342. config->qtbl_num[1], config->qtbl_num[2]);
  343. mtk_jpeg_dec_set_sampling_factor(base, config->comp_num,
  344. config->sampling_w[0],
  345. config->sampling_h[0],
  346. config->sampling_w[1],
  347. config->sampling_h[1],
  348. config->sampling_w[2],
  349. config->sampling_h[2]);
  350. mtk_jpeg_dec_set_mem_stride(base, config->mem_stride[0],
  351. config->mem_stride[1]);
  352. mtk_jpeg_dec_set_img_stride(base, config->img_stride[0],
  353. config->img_stride[1]);
  354. mtk_jpeg_dec_set_dst_bank0(base, fb->plane_addr[0],
  355. fb->plane_addr[1], fb->plane_addr[2]);
  356. mtk_jpeg_dec_set_dst_bank1(base, 0, 0, 0);
  357. mtk_jpeg_dec_set_dma_group(base, config->dma_mcu, config->dma_group,
  358. config->dma_last_mcu);
  359. mtk_jpeg_dec_set_pause_mcu_idx(base, config->total_mcu);
  360. }