ams-delta.c 6.9 KB

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  1. /*
  2. * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
  3. *
  4. * Derived from drivers/mtd/nand/toto.c (removed in v2.6.28)
  5. * Copyright (c) 2003 Texas Instruments
  6. * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
  7. *
  8. * Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
  9. * Partially stolen from plat_nand.c
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. *
  15. * Overview:
  16. * This is a device driver for the NAND flash device found on the
  17. * Amstrad E3 (Delta).
  18. */
  19. #include <linux/slab.h>
  20. #include <linux/module.h>
  21. #include <linux/delay.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/rawnand.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/gpio.h>
  26. #include <linux/platform_data/gpio-omap.h>
  27. #include <asm/io.h>
  28. #include <asm/sizes.h>
  29. #include <mach/board-ams-delta.h>
  30. #include <mach/hardware.h>
  31. /*
  32. * MTD structure for E3 (Delta)
  33. */
  34. static struct mtd_info *ams_delta_mtd = NULL;
  35. /*
  36. * Define partitions for flash devices
  37. */
  38. static const struct mtd_partition partition_info[] = {
  39. { .name = "Kernel",
  40. .offset = 0,
  41. .size = 3 * SZ_1M + SZ_512K },
  42. { .name = "u-boot",
  43. .offset = 3 * SZ_1M + SZ_512K,
  44. .size = SZ_256K },
  45. { .name = "u-boot params",
  46. .offset = 3 * SZ_1M + SZ_512K + SZ_256K,
  47. .size = SZ_256K },
  48. { .name = "Amstrad LDR",
  49. .offset = 4 * SZ_1M,
  50. .size = SZ_256K },
  51. { .name = "File system",
  52. .offset = 4 * SZ_1M + 1 * SZ_256K,
  53. .size = 27 * SZ_1M },
  54. { .name = "PBL reserved",
  55. .offset = 32 * SZ_1M - 3 * SZ_256K,
  56. .size = 3 * SZ_256K },
  57. };
  58. static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
  59. {
  60. struct nand_chip *this = mtd_to_nand(mtd);
  61. void __iomem *io_base = (void __iomem *)nand_get_controller_data(this);
  62. writew(0, io_base + OMAP_MPUIO_IO_CNTL);
  63. writew(byte, this->IO_ADDR_W);
  64. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
  65. ndelay(40);
  66. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
  67. }
  68. static u_char ams_delta_read_byte(struct mtd_info *mtd)
  69. {
  70. u_char res;
  71. struct nand_chip *this = mtd_to_nand(mtd);
  72. void __iomem *io_base = (void __iomem *)nand_get_controller_data(this);
  73. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
  74. ndelay(40);
  75. writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
  76. res = readw(this->IO_ADDR_R);
  77. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
  78. return res;
  79. }
  80. static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
  81. int len)
  82. {
  83. int i;
  84. for (i=0; i<len; i++)
  85. ams_delta_write_byte(mtd, buf[i]);
  86. }
  87. static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
  88. {
  89. int i;
  90. for (i=0; i<len; i++)
  91. buf[i] = ams_delta_read_byte(mtd);
  92. }
  93. /*
  94. * Command control function
  95. *
  96. * ctrl:
  97. * NAND_NCE: bit 0 -> bit 2
  98. * NAND_CLE: bit 1 -> bit 7
  99. * NAND_ALE: bit 2 -> bit 6
  100. */
  101. static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
  102. unsigned int ctrl)
  103. {
  104. if (ctrl & NAND_CTRL_CHANGE) {
  105. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
  106. (ctrl & NAND_NCE) == 0);
  107. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
  108. (ctrl & NAND_CLE) != 0);
  109. gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
  110. (ctrl & NAND_ALE) != 0);
  111. }
  112. if (cmd != NAND_CMD_NONE)
  113. ams_delta_write_byte(mtd, cmd);
  114. }
  115. static int ams_delta_nand_ready(struct mtd_info *mtd)
  116. {
  117. return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
  118. }
  119. static const struct gpio _mandatory_gpio[] = {
  120. {
  121. .gpio = AMS_DELTA_GPIO_PIN_NAND_NCE,
  122. .flags = GPIOF_OUT_INIT_HIGH,
  123. .label = "nand_nce",
  124. },
  125. {
  126. .gpio = AMS_DELTA_GPIO_PIN_NAND_NRE,
  127. .flags = GPIOF_OUT_INIT_HIGH,
  128. .label = "nand_nre",
  129. },
  130. {
  131. .gpio = AMS_DELTA_GPIO_PIN_NAND_NWP,
  132. .flags = GPIOF_OUT_INIT_HIGH,
  133. .label = "nand_nwp",
  134. },
  135. {
  136. .gpio = AMS_DELTA_GPIO_PIN_NAND_NWE,
  137. .flags = GPIOF_OUT_INIT_HIGH,
  138. .label = "nand_nwe",
  139. },
  140. {
  141. .gpio = AMS_DELTA_GPIO_PIN_NAND_ALE,
  142. .flags = GPIOF_OUT_INIT_LOW,
  143. .label = "nand_ale",
  144. },
  145. {
  146. .gpio = AMS_DELTA_GPIO_PIN_NAND_CLE,
  147. .flags = GPIOF_OUT_INIT_LOW,
  148. .label = "nand_cle",
  149. },
  150. };
  151. /*
  152. * Main initialization routine
  153. */
  154. static int ams_delta_init(struct platform_device *pdev)
  155. {
  156. struct nand_chip *this;
  157. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  158. void __iomem *io_base;
  159. int err = 0;
  160. if (!res)
  161. return -ENXIO;
  162. /* Allocate memory for MTD device structure and private data */
  163. this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
  164. if (!this) {
  165. pr_warn("Unable to allocate E3 NAND MTD device structure.\n");
  166. err = -ENOMEM;
  167. goto out;
  168. }
  169. ams_delta_mtd = nand_to_mtd(this);
  170. ams_delta_mtd->owner = THIS_MODULE;
  171. /*
  172. * Don't try to request the memory region from here,
  173. * it should have been already requested from the
  174. * gpio-omap driver and requesting it again would fail.
  175. */
  176. io_base = ioremap(res->start, resource_size(res));
  177. if (io_base == NULL) {
  178. dev_err(&pdev->dev, "ioremap failed\n");
  179. err = -EIO;
  180. goto out_free;
  181. }
  182. nand_set_controller_data(this, (void *)io_base);
  183. /* Set address of NAND IO lines */
  184. this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
  185. this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
  186. this->read_byte = ams_delta_read_byte;
  187. this->write_buf = ams_delta_write_buf;
  188. this->read_buf = ams_delta_read_buf;
  189. this->cmd_ctrl = ams_delta_hwcontrol;
  190. if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
  191. this->dev_ready = ams_delta_nand_ready;
  192. } else {
  193. this->dev_ready = NULL;
  194. pr_notice("Couldn't request gpio for Delta NAND ready.\n");
  195. }
  196. /* 25 us command delay time */
  197. this->chip_delay = 30;
  198. this->ecc.mode = NAND_ECC_SOFT;
  199. this->ecc.algo = NAND_ECC_HAMMING;
  200. platform_set_drvdata(pdev, io_base);
  201. /* Set chip enabled, but */
  202. err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
  203. if (err)
  204. goto out_gpio;
  205. /* Scan to find existence of the device */
  206. err = nand_scan(this, 1);
  207. if (err)
  208. goto out_mtd;
  209. /* Register the partitions */
  210. mtd_device_register(ams_delta_mtd, partition_info,
  211. ARRAY_SIZE(partition_info));
  212. goto out;
  213. out_mtd:
  214. gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
  215. out_gpio:
  216. gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
  217. iounmap(io_base);
  218. out_free:
  219. kfree(this);
  220. out:
  221. return err;
  222. }
  223. /*
  224. * Clean up routine
  225. */
  226. static int ams_delta_cleanup(struct platform_device *pdev)
  227. {
  228. void __iomem *io_base = platform_get_drvdata(pdev);
  229. /* Release resources, unregister device */
  230. nand_release(mtd_to_nand(ams_delta_mtd));
  231. gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
  232. gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
  233. iounmap(io_base);
  234. /* Free the MTD device structure */
  235. kfree(mtd_to_nand(ams_delta_mtd));
  236. return 0;
  237. }
  238. static struct platform_driver ams_delta_nand_driver = {
  239. .probe = ams_delta_init,
  240. .remove = ams_delta_cleanup,
  241. .driver = {
  242. .name = "ams-delta-nand",
  243. },
  244. };
  245. module_platform_driver(ams_delta_nand_driver);
  246. MODULE_LICENSE("GPL");
  247. MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
  248. MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");