cpqphp_core.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Compaq Hot Plug Controller Driver
  4. *
  5. * Copyright (C) 1995,2001 Compaq Computer Corporation
  6. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  7. * Copyright (C) 2001 IBM Corp.
  8. *
  9. * All rights reserved.
  10. *
  11. * Send feedback to <greg@kroah.com>
  12. *
  13. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  14. * Torben Mathiasen <torben.mathiasen@hp.com>
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/slab.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/pci.h>
  24. #include <linux/pci_hotplug.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/uaccess.h>
  28. #include "cpqphp.h"
  29. #include "cpqphp_nvram.h"
  30. /* Global variables */
  31. int cpqhp_debug;
  32. int cpqhp_legacy_mode;
  33. struct controller *cpqhp_ctrl_list; /* = NULL */
  34. struct pci_func *cpqhp_slot_list[256];
  35. struct irq_routing_table *cpqhp_routing_table;
  36. /* local variables */
  37. static void __iomem *smbios_table;
  38. static void __iomem *smbios_start;
  39. static void __iomem *cpqhp_rom_start;
  40. static bool power_mode;
  41. static bool debug;
  42. static int initialized;
  43. #define DRIVER_VERSION "0.9.8"
  44. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  45. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  46. MODULE_AUTHOR(DRIVER_AUTHOR);
  47. MODULE_DESCRIPTION(DRIVER_DESC);
  48. MODULE_LICENSE("GPL");
  49. module_param(power_mode, bool, 0644);
  50. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  51. module_param(debug, bool, 0644);
  52. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  53. #define CPQHPC_MODULE_MINOR 208
  54. static inline int is_slot64bit(struct slot *slot)
  55. {
  56. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  57. }
  58. static inline int is_slot66mhz(struct slot *slot)
  59. {
  60. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  61. }
  62. /**
  63. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  64. * @begin: begin pointer for region to be scanned.
  65. * @end: end pointer for region to be scanned.
  66. *
  67. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  68. */
  69. static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  70. {
  71. void __iomem *fp;
  72. void __iomem *endp;
  73. u8 temp1, temp2, temp3, temp4;
  74. int status = 0;
  75. endp = (end - sizeof(u32) + 1);
  76. for (fp = begin; fp <= endp; fp += 16) {
  77. temp1 = readb(fp);
  78. temp2 = readb(fp+1);
  79. temp3 = readb(fp+2);
  80. temp4 = readb(fp+3);
  81. if (temp1 == '_' &&
  82. temp2 == 'S' &&
  83. temp3 == 'M' &&
  84. temp4 == '_') {
  85. status = 1;
  86. break;
  87. }
  88. }
  89. if (!status)
  90. fp = NULL;
  91. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  92. return fp;
  93. }
  94. /**
  95. * init_SERR - Initializes the per slot SERR generation.
  96. * @ctrl: controller to use
  97. *
  98. * For unexpected switch opens
  99. */
  100. static int init_SERR(struct controller *ctrl)
  101. {
  102. u32 tempdword;
  103. u32 number_of_slots;
  104. u8 physical_slot;
  105. if (!ctrl)
  106. return 1;
  107. tempdword = ctrl->first_slot;
  108. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  109. /* Loop through slots */
  110. while (number_of_slots) {
  111. physical_slot = tempdword;
  112. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  113. tempdword++;
  114. number_of_slots--;
  115. }
  116. return 0;
  117. }
  118. static int init_cpqhp_routing_table(void)
  119. {
  120. int len;
  121. cpqhp_routing_table = pcibios_get_irq_routing_table();
  122. if (cpqhp_routing_table == NULL)
  123. return -ENOMEM;
  124. len = cpqhp_routing_table_length();
  125. if (len == 0) {
  126. kfree(cpqhp_routing_table);
  127. cpqhp_routing_table = NULL;
  128. return -1;
  129. }
  130. return 0;
  131. }
  132. /* nice debugging output */
  133. static void pci_print_IRQ_route(void)
  134. {
  135. int len;
  136. int loop;
  137. u8 tbus, tdevice, tslot;
  138. len = cpqhp_routing_table_length();
  139. dbg("bus dev func slot\n");
  140. for (loop = 0; loop < len; ++loop) {
  141. tbus = cpqhp_routing_table->slots[loop].bus;
  142. tdevice = cpqhp_routing_table->slots[loop].devfn;
  143. tslot = cpqhp_routing_table->slots[loop].slot;
  144. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  145. }
  146. return;
  147. }
  148. /**
  149. * get_subsequent_smbios_entry: get the next entry from bios table.
  150. * @smbios_start: where to start in the SMBIOS table
  151. * @smbios_table: location of the SMBIOS table
  152. * @curr: %NULL or pointer to previously returned structure
  153. *
  154. * Gets the first entry if previous == NULL;
  155. * otherwise, returns the next entry.
  156. * Uses global SMBIOS Table pointer.
  157. *
  158. * Returns a pointer to an SMBIOS structure or NULL if none found.
  159. */
  160. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  161. void __iomem *smbios_table,
  162. void __iomem *curr)
  163. {
  164. u8 bail = 0;
  165. u8 previous_byte = 1;
  166. void __iomem *p_temp;
  167. void __iomem *p_max;
  168. if (!smbios_table || !curr)
  169. return NULL;
  170. /* set p_max to the end of the table */
  171. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  172. p_temp = curr;
  173. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  174. while ((p_temp < p_max) && !bail) {
  175. /* Look for the double NULL terminator
  176. * The first condition is the previous byte
  177. * and the second is the curr
  178. */
  179. if (!previous_byte && !(readb(p_temp)))
  180. bail = 1;
  181. previous_byte = readb(p_temp);
  182. p_temp++;
  183. }
  184. if (p_temp < p_max)
  185. return p_temp;
  186. else
  187. return NULL;
  188. }
  189. /**
  190. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  191. * @smbios_start: where to start in the SMBIOS table
  192. * @smbios_table: location of the SMBIOS table
  193. * @type: SMBIOS structure type to be returned
  194. * @previous: %NULL or pointer to previously returned structure
  195. *
  196. * Gets the first entry of the specified type if previous == %NULL;
  197. * Otherwise, returns the next entry of the given type.
  198. * Uses global SMBIOS Table pointer.
  199. * Uses get_subsequent_smbios_entry.
  200. *
  201. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  202. */
  203. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  204. void __iomem *smbios_table,
  205. u8 type,
  206. void __iomem *previous)
  207. {
  208. if (!smbios_table)
  209. return NULL;
  210. if (!previous)
  211. previous = smbios_start;
  212. else
  213. previous = get_subsequent_smbios_entry(smbios_start,
  214. smbios_table, previous);
  215. while (previous)
  216. if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
  217. previous = get_subsequent_smbios_entry(smbios_start,
  218. smbios_table, previous);
  219. else
  220. break;
  221. return previous;
  222. }
  223. static int ctrl_slot_cleanup(struct controller *ctrl)
  224. {
  225. struct slot *old_slot, *next_slot;
  226. old_slot = ctrl->slot;
  227. ctrl->slot = NULL;
  228. while (old_slot) {
  229. next_slot = old_slot->next;
  230. pci_hp_deregister(old_slot->hotplug_slot);
  231. kfree(old_slot->hotplug_slot->info);
  232. kfree(old_slot->hotplug_slot);
  233. kfree(old_slot);
  234. old_slot = next_slot;
  235. }
  236. cpqhp_remove_debugfs_files(ctrl);
  237. /* Free IRQ associated with hot plug device */
  238. free_irq(ctrl->interrupt, ctrl);
  239. /* Unmap the memory */
  240. iounmap(ctrl->hpc_reg);
  241. /* Finally reclaim PCI mem */
  242. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  243. pci_resource_len(ctrl->pci_dev, 0));
  244. return 0;
  245. }
  246. /**
  247. * get_slot_mapping - determine logical slot mapping for PCI device
  248. *
  249. * Won't work for more than one PCI-PCI bridge in a slot.
  250. *
  251. * @bus_num - bus number of PCI device
  252. * @dev_num - device number of PCI device
  253. * @slot - Pointer to u8 where slot number will be returned
  254. *
  255. * Output: SUCCESS or FAILURE
  256. */
  257. static int
  258. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  259. {
  260. u32 work;
  261. long len;
  262. long loop;
  263. u8 tbus, tdevice, tslot, bridgeSlot;
  264. dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
  265. bridgeSlot = 0xFF;
  266. len = cpqhp_routing_table_length();
  267. for (loop = 0; loop < len; ++loop) {
  268. tbus = cpqhp_routing_table->slots[loop].bus;
  269. tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
  270. tslot = cpqhp_routing_table->slots[loop].slot;
  271. if ((tbus == bus_num) && (tdevice == dev_num)) {
  272. *slot = tslot;
  273. return 0;
  274. } else {
  275. /* Did not get a match on the target PCI device. Check
  276. * if the current IRQ table entry is a PCI-to-PCI
  277. * bridge device. If so, and it's secondary bus
  278. * matches the bus number for the target device, I need
  279. * to save the bridge's slot number. If I can not find
  280. * an entry for the target device, I will have to
  281. * assume it's on the other side of the bridge, and
  282. * assign it the bridge's slot.
  283. */
  284. bus->number = tbus;
  285. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  286. PCI_CLASS_REVISION, &work);
  287. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  288. pci_bus_read_config_dword(bus,
  289. PCI_DEVFN(tdevice, 0),
  290. PCI_PRIMARY_BUS, &work);
  291. // See if bridge's secondary bus matches target bus.
  292. if (((work >> 8) & 0x000000FF) == (long) bus_num)
  293. bridgeSlot = tslot;
  294. }
  295. }
  296. }
  297. /* If we got here, we didn't find an entry in the IRQ mapping table for
  298. * the target PCI device. If we did determine that the target device
  299. * is on the other side of a PCI-to-PCI bridge, return the slot number
  300. * for the bridge.
  301. */
  302. if (bridgeSlot != 0xFF) {
  303. *slot = bridgeSlot;
  304. return 0;
  305. }
  306. /* Couldn't find an entry in the routing table for this PCI device */
  307. return -1;
  308. }
  309. /**
  310. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  311. * @ctrl: struct controller to use
  312. * @func: PCI device/function info
  313. * @status: LED control flag: 1 = LED on, 0 = LED off
  314. */
  315. static int
  316. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  317. u32 status)
  318. {
  319. u8 hp_slot;
  320. if (func == NULL)
  321. return 1;
  322. hp_slot = func->device - ctrl->slot_device_offset;
  323. /* Wait for exclusive access to hardware */
  324. mutex_lock(&ctrl->crit_sect);
  325. if (status == 1)
  326. amber_LED_on(ctrl, hp_slot);
  327. else if (status == 0)
  328. amber_LED_off(ctrl, hp_slot);
  329. else {
  330. /* Done with exclusive hardware access */
  331. mutex_unlock(&ctrl->crit_sect);
  332. return 1;
  333. }
  334. set_SOGO(ctrl);
  335. /* Wait for SOBS to be unset */
  336. wait_for_ctrl_irq(ctrl);
  337. /* Done with exclusive hardware access */
  338. mutex_unlock(&ctrl->crit_sect);
  339. return 0;
  340. }
  341. /**
  342. * set_attention_status - Turns the Amber LED for a slot on or off
  343. * @hotplug_slot: slot to change LED on
  344. * @status: LED control flag
  345. */
  346. static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
  347. {
  348. struct pci_func *slot_func;
  349. struct slot *slot = hotplug_slot->private;
  350. struct controller *ctrl = slot->ctrl;
  351. u8 bus;
  352. u8 devfn;
  353. u8 device;
  354. u8 function;
  355. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  356. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  357. return -ENODEV;
  358. device = devfn >> 3;
  359. function = devfn & 0x7;
  360. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  361. slot_func = cpqhp_slot_find(bus, device, function);
  362. if (!slot_func)
  363. return -ENODEV;
  364. return cpqhp_set_attention_status(ctrl, slot_func, status);
  365. }
  366. static int process_SI(struct hotplug_slot *hotplug_slot)
  367. {
  368. struct pci_func *slot_func;
  369. struct slot *slot = hotplug_slot->private;
  370. struct controller *ctrl = slot->ctrl;
  371. u8 bus;
  372. u8 devfn;
  373. u8 device;
  374. u8 function;
  375. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  376. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  377. return -ENODEV;
  378. device = devfn >> 3;
  379. function = devfn & 0x7;
  380. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  381. slot_func = cpqhp_slot_find(bus, device, function);
  382. if (!slot_func)
  383. return -ENODEV;
  384. slot_func->bus = bus;
  385. slot_func->device = device;
  386. slot_func->function = function;
  387. slot_func->configured = 0;
  388. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  389. return cpqhp_process_SI(ctrl, slot_func);
  390. }
  391. static int process_SS(struct hotplug_slot *hotplug_slot)
  392. {
  393. struct pci_func *slot_func;
  394. struct slot *slot = hotplug_slot->private;
  395. struct controller *ctrl = slot->ctrl;
  396. u8 bus;
  397. u8 devfn;
  398. u8 device;
  399. u8 function;
  400. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  401. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  402. return -ENODEV;
  403. device = devfn >> 3;
  404. function = devfn & 0x7;
  405. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  406. slot_func = cpqhp_slot_find(bus, device, function);
  407. if (!slot_func)
  408. return -ENODEV;
  409. dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
  410. return cpqhp_process_SS(ctrl, slot_func);
  411. }
  412. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  413. {
  414. struct slot *slot = hotplug_slot->private;
  415. struct controller *ctrl = slot->ctrl;
  416. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  417. return cpqhp_hardware_test(ctrl, value);
  418. }
  419. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  420. {
  421. struct slot *slot = hotplug_slot->private;
  422. struct controller *ctrl = slot->ctrl;
  423. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  424. *value = get_slot_enabled(ctrl, slot);
  425. return 0;
  426. }
  427. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  428. {
  429. struct slot *slot = hotplug_slot->private;
  430. struct controller *ctrl = slot->ctrl;
  431. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  432. *value = cpq_get_attention_status(ctrl, slot);
  433. return 0;
  434. }
  435. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  436. {
  437. struct slot *slot = hotplug_slot->private;
  438. struct controller *ctrl = slot->ctrl;
  439. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  440. *value = cpq_get_latch_status(ctrl, slot);
  441. return 0;
  442. }
  443. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  444. {
  445. struct slot *slot = hotplug_slot->private;
  446. struct controller *ctrl = slot->ctrl;
  447. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  448. *value = get_presence_status(ctrl, slot);
  449. return 0;
  450. }
  451. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  452. .set_attention_status = set_attention_status,
  453. .enable_slot = process_SI,
  454. .disable_slot = process_SS,
  455. .hardware_test = hardware_test,
  456. .get_power_status = get_power_status,
  457. .get_attention_status = get_attention_status,
  458. .get_latch_status = get_latch_status,
  459. .get_adapter_status = get_adapter_status,
  460. };
  461. #define SLOT_NAME_SIZE 10
  462. static int ctrl_slot_setup(struct controller *ctrl,
  463. void __iomem *smbios_start,
  464. void __iomem *smbios_table)
  465. {
  466. struct slot *slot;
  467. struct hotplug_slot *hotplug_slot;
  468. struct hotplug_slot_info *hotplug_slot_info;
  469. struct pci_bus *bus = ctrl->pci_bus;
  470. u8 number_of_slots;
  471. u8 slot_device;
  472. u8 slot_number;
  473. u8 ctrl_slot;
  474. u32 tempdword;
  475. char name[SLOT_NAME_SIZE];
  476. void __iomem *slot_entry = NULL;
  477. int result;
  478. dbg("%s\n", __func__);
  479. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  480. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  481. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  482. slot_number = ctrl->first_slot;
  483. while (number_of_slots) {
  484. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  485. if (!slot) {
  486. result = -ENOMEM;
  487. goto error;
  488. }
  489. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  490. GFP_KERNEL);
  491. if (!slot->hotplug_slot) {
  492. result = -ENOMEM;
  493. goto error_slot;
  494. }
  495. hotplug_slot = slot->hotplug_slot;
  496. hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
  497. GFP_KERNEL);
  498. if (!hotplug_slot->info) {
  499. result = -ENOMEM;
  500. goto error_hpslot;
  501. }
  502. hotplug_slot_info = hotplug_slot->info;
  503. slot->ctrl = ctrl;
  504. slot->bus = ctrl->bus;
  505. slot->device = slot_device;
  506. slot->number = slot_number;
  507. dbg("slot->number = %u\n", slot->number);
  508. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  509. slot_entry);
  510. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  511. slot->number)) {
  512. slot_entry = get_SMBIOS_entry(smbios_start,
  513. smbios_table, 9, slot_entry);
  514. }
  515. slot->p_sm_slot = slot_entry;
  516. timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
  517. slot->task_event.expires = jiffies + 5 * HZ;
  518. /*FIXME: these capabilities aren't used but if they are
  519. * they need to be correctly implemented
  520. */
  521. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  522. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  523. if (is_slot64bit(slot))
  524. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  525. if (is_slot66mhz(slot))
  526. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  527. if (bus->cur_bus_speed == PCI_SPEED_66MHz)
  528. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  529. ctrl_slot =
  530. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  531. /* Check presence */
  532. slot->capabilities |=
  533. ((((~tempdword) >> 23) |
  534. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  535. /* Check the switch state */
  536. slot->capabilities |=
  537. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  538. /* Check the slot enable */
  539. slot->capabilities |=
  540. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  541. /* register this slot with the hotplug pci core */
  542. hotplug_slot->private = slot;
  543. snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
  544. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  545. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  546. hotplug_slot_info->attention_status =
  547. cpq_get_attention_status(ctrl, slot);
  548. hotplug_slot_info->latch_status =
  549. cpq_get_latch_status(ctrl, slot);
  550. hotplug_slot_info->adapter_status =
  551. get_presence_status(ctrl, slot);
  552. dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
  553. slot->bus, slot->device,
  554. slot->number, ctrl->slot_device_offset,
  555. slot_number);
  556. result = pci_hp_register(hotplug_slot,
  557. ctrl->pci_dev->bus,
  558. slot->device,
  559. name);
  560. if (result) {
  561. err("pci_hp_register failed with error %d\n", result);
  562. goto error_info;
  563. }
  564. slot->next = ctrl->slot;
  565. ctrl->slot = slot;
  566. number_of_slots--;
  567. slot_device++;
  568. slot_number++;
  569. }
  570. return 0;
  571. error_info:
  572. kfree(hotplug_slot_info);
  573. error_hpslot:
  574. kfree(hotplug_slot);
  575. error_slot:
  576. kfree(slot);
  577. error:
  578. return result;
  579. }
  580. static int one_time_init(void)
  581. {
  582. int loop;
  583. int retval = 0;
  584. if (initialized)
  585. return 0;
  586. power_mode = 0;
  587. retval = init_cpqhp_routing_table();
  588. if (retval)
  589. goto error;
  590. if (cpqhp_debug)
  591. pci_print_IRQ_route();
  592. dbg("Initialize + Start the notification mechanism\n");
  593. retval = cpqhp_event_start_thread();
  594. if (retval)
  595. goto error;
  596. dbg("Initialize slot lists\n");
  597. for (loop = 0; loop < 256; loop++)
  598. cpqhp_slot_list[loop] = NULL;
  599. /* FIXME: We also need to hook the NMI handler eventually.
  600. * this also needs to be worked with Christoph
  601. * register_NMI_handler();
  602. */
  603. /* Map rom address */
  604. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  605. if (!cpqhp_rom_start) {
  606. err("Could not ioremap memory region for ROM\n");
  607. retval = -EIO;
  608. goto error;
  609. }
  610. /* Now, map the int15 entry point if we are on compaq specific
  611. * hardware
  612. */
  613. compaq_nvram_init(cpqhp_rom_start);
  614. /* Map smbios table entry point structure */
  615. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  616. cpqhp_rom_start + ROM_PHY_LEN);
  617. if (!smbios_table) {
  618. err("Could not find the SMBIOS pointer in memory\n");
  619. retval = -EIO;
  620. goto error_rom_start;
  621. }
  622. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  623. readw(smbios_table + ST_LENGTH));
  624. if (!smbios_start) {
  625. err("Could not ioremap memory region taken from SMBIOS values\n");
  626. retval = -EIO;
  627. goto error_smbios_start;
  628. }
  629. initialized = 1;
  630. return retval;
  631. error_smbios_start:
  632. iounmap(smbios_start);
  633. error_rom_start:
  634. iounmap(cpqhp_rom_start);
  635. error:
  636. return retval;
  637. }
  638. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  639. {
  640. u8 num_of_slots = 0;
  641. u8 hp_slot = 0;
  642. u8 device;
  643. u8 bus_cap;
  644. u16 temp_word;
  645. u16 vendor_id;
  646. u16 subsystem_vid;
  647. u16 subsystem_deviceid;
  648. u32 rc;
  649. struct controller *ctrl;
  650. struct pci_func *func;
  651. struct pci_bus *bus;
  652. int err;
  653. err = pci_enable_device(pdev);
  654. if (err) {
  655. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  656. pci_name(pdev), err);
  657. return err;
  658. }
  659. bus = pdev->subordinate;
  660. if (!bus) {
  661. pci_notice(pdev, "the device is not a bridge, skipping\n");
  662. rc = -ENODEV;
  663. goto err_disable_device;
  664. }
  665. /* Need to read VID early b/c it's used to differentiate CPQ and INTC
  666. * discovery
  667. */
  668. vendor_id = pdev->vendor;
  669. if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
  670. (vendor_id != PCI_VENDOR_ID_INTEL)) {
  671. err(msg_HPC_non_compaq_or_intel);
  672. rc = -ENODEV;
  673. goto err_disable_device;
  674. }
  675. dbg("Vendor ID: %x\n", vendor_id);
  676. dbg("revision: %d\n", pdev->revision);
  677. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  678. err(msg_HPC_rev_error);
  679. rc = -ENODEV;
  680. goto err_disable_device;
  681. }
  682. /* Check for the proper subsystem IDs
  683. * Intel uses a different SSID programming model than Compaq.
  684. * For Intel, each SSID bit identifies a PHP capability.
  685. * Also Intel HPCs may have RID=0.
  686. */
  687. if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
  688. err(msg_HPC_not_supported);
  689. rc = -ENODEV;
  690. goto err_disable_device;
  691. }
  692. /* TODO: This code can be made to support non-Compaq or Intel
  693. * subsystem IDs
  694. */
  695. subsystem_vid = pdev->subsystem_vendor;
  696. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  697. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  698. err(msg_HPC_non_compaq_or_intel);
  699. rc = -ENODEV;
  700. goto err_disable_device;
  701. }
  702. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  703. if (!ctrl) {
  704. rc = -ENOMEM;
  705. goto err_disable_device;
  706. }
  707. subsystem_deviceid = pdev->subsystem_device;
  708. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  709. /* Set Vendor ID, so it can be accessed later from other
  710. * functions
  711. */
  712. ctrl->vendor_id = vendor_id;
  713. switch (subsystem_vid) {
  714. case PCI_VENDOR_ID_COMPAQ:
  715. if (pdev->revision >= 0x13) { /* CIOBX */
  716. ctrl->push_flag = 1;
  717. ctrl->slot_switch_type = 1;
  718. ctrl->push_button = 1;
  719. ctrl->pci_config_space = 1;
  720. ctrl->defeature_PHP = 1;
  721. ctrl->pcix_support = 1;
  722. ctrl->pcix_speed_capability = 1;
  723. pci_read_config_byte(pdev, 0x41, &bus_cap);
  724. if (bus_cap & 0x80) {
  725. dbg("bus max supports 133MHz PCI-X\n");
  726. bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
  727. break;
  728. }
  729. if (bus_cap & 0x40) {
  730. dbg("bus max supports 100MHz PCI-X\n");
  731. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  732. break;
  733. }
  734. if (bus_cap & 0x20) {
  735. dbg("bus max supports 66MHz PCI-X\n");
  736. bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
  737. break;
  738. }
  739. if (bus_cap & 0x10) {
  740. dbg("bus max supports 66MHz PCI\n");
  741. bus->max_bus_speed = PCI_SPEED_66MHz;
  742. break;
  743. }
  744. break;
  745. }
  746. switch (subsystem_deviceid) {
  747. case PCI_SUB_HPC_ID:
  748. /* Original 6500/7000 implementation */
  749. ctrl->slot_switch_type = 1;
  750. bus->max_bus_speed = PCI_SPEED_33MHz;
  751. ctrl->push_button = 0;
  752. ctrl->pci_config_space = 1;
  753. ctrl->defeature_PHP = 1;
  754. ctrl->pcix_support = 0;
  755. ctrl->pcix_speed_capability = 0;
  756. break;
  757. case PCI_SUB_HPC_ID2:
  758. /* First Pushbutton implementation */
  759. ctrl->push_flag = 1;
  760. ctrl->slot_switch_type = 1;
  761. bus->max_bus_speed = PCI_SPEED_33MHz;
  762. ctrl->push_button = 1;
  763. ctrl->pci_config_space = 1;
  764. ctrl->defeature_PHP = 1;
  765. ctrl->pcix_support = 0;
  766. ctrl->pcix_speed_capability = 0;
  767. break;
  768. case PCI_SUB_HPC_ID_INTC:
  769. /* Third party (6500/7000) */
  770. ctrl->slot_switch_type = 1;
  771. bus->max_bus_speed = PCI_SPEED_33MHz;
  772. ctrl->push_button = 0;
  773. ctrl->pci_config_space = 1;
  774. ctrl->defeature_PHP = 1;
  775. ctrl->pcix_support = 0;
  776. ctrl->pcix_speed_capability = 0;
  777. break;
  778. case PCI_SUB_HPC_ID3:
  779. /* First 66 Mhz implementation */
  780. ctrl->push_flag = 1;
  781. ctrl->slot_switch_type = 1;
  782. bus->max_bus_speed = PCI_SPEED_66MHz;
  783. ctrl->push_button = 1;
  784. ctrl->pci_config_space = 1;
  785. ctrl->defeature_PHP = 1;
  786. ctrl->pcix_support = 0;
  787. ctrl->pcix_speed_capability = 0;
  788. break;
  789. case PCI_SUB_HPC_ID4:
  790. /* First PCI-X implementation, 100MHz */
  791. ctrl->push_flag = 1;
  792. ctrl->slot_switch_type = 1;
  793. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  794. ctrl->push_button = 1;
  795. ctrl->pci_config_space = 1;
  796. ctrl->defeature_PHP = 1;
  797. ctrl->pcix_support = 1;
  798. ctrl->pcix_speed_capability = 0;
  799. break;
  800. default:
  801. err(msg_HPC_not_supported);
  802. rc = -ENODEV;
  803. goto err_free_ctrl;
  804. }
  805. break;
  806. case PCI_VENDOR_ID_INTEL:
  807. /* Check for speed capability (0=33, 1=66) */
  808. if (subsystem_deviceid & 0x0001)
  809. bus->max_bus_speed = PCI_SPEED_66MHz;
  810. else
  811. bus->max_bus_speed = PCI_SPEED_33MHz;
  812. /* Check for push button */
  813. if (subsystem_deviceid & 0x0002)
  814. ctrl->push_button = 0;
  815. else
  816. ctrl->push_button = 1;
  817. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  818. if (subsystem_deviceid & 0x0004)
  819. ctrl->slot_switch_type = 0;
  820. else
  821. ctrl->slot_switch_type = 1;
  822. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  823. if (subsystem_deviceid & 0x0008)
  824. ctrl->defeature_PHP = 1; /* PHP supported */
  825. else
  826. ctrl->defeature_PHP = 0; /* PHP not supported */
  827. /* Alternate Base Address Register Interface
  828. * (0=not supported, 1=supported)
  829. */
  830. if (subsystem_deviceid & 0x0010)
  831. ctrl->alternate_base_address = 1;
  832. else
  833. ctrl->alternate_base_address = 0;
  834. /* PCI Config Space Index (0=not supported, 1=supported) */
  835. if (subsystem_deviceid & 0x0020)
  836. ctrl->pci_config_space = 1;
  837. else
  838. ctrl->pci_config_space = 0;
  839. /* PCI-X support */
  840. if (subsystem_deviceid & 0x0080) {
  841. ctrl->pcix_support = 1;
  842. if (subsystem_deviceid & 0x0040)
  843. /* 133MHz PCI-X if bit 7 is 1 */
  844. ctrl->pcix_speed_capability = 1;
  845. else
  846. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  847. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  848. ctrl->pcix_speed_capability = 0;
  849. } else {
  850. /* Conventional PCI */
  851. ctrl->pcix_support = 0;
  852. ctrl->pcix_speed_capability = 0;
  853. }
  854. break;
  855. default:
  856. err(msg_HPC_not_supported);
  857. rc = -ENODEV;
  858. goto err_free_ctrl;
  859. }
  860. /* Tell the user that we found one. */
  861. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  862. pdev->bus->number);
  863. dbg("Hotplug controller capabilities:\n");
  864. dbg(" speed_capability %d\n", bus->max_bus_speed);
  865. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  866. "switch present" : "no switch");
  867. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  868. "PHP supported" : "PHP not supported");
  869. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  870. "supported" : "not supported");
  871. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  872. "supported" : "not supported");
  873. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  874. "supported" : "not supported");
  875. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  876. "supported" : "not supported");
  877. ctrl->pci_dev = pdev;
  878. pci_set_drvdata(pdev, ctrl);
  879. /* make our own copy of the pci bus structure,
  880. * as we like tweaking it a lot */
  881. ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
  882. if (!ctrl->pci_bus) {
  883. err("out of memory\n");
  884. rc = -ENOMEM;
  885. goto err_free_ctrl;
  886. }
  887. ctrl->bus = pdev->bus->number;
  888. ctrl->rev = pdev->revision;
  889. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  890. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  891. mutex_init(&ctrl->crit_sect);
  892. init_waitqueue_head(&ctrl->queue);
  893. /* initialize our threads if they haven't already been started up */
  894. rc = one_time_init();
  895. if (rc)
  896. goto err_free_bus;
  897. dbg("pdev = %p\n", pdev);
  898. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  899. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  900. if (!request_mem_region(pci_resource_start(pdev, 0),
  901. pci_resource_len(pdev, 0), MY_NAME)) {
  902. err("cannot reserve MMIO region\n");
  903. rc = -ENOMEM;
  904. goto err_free_bus;
  905. }
  906. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  907. pci_resource_len(pdev, 0));
  908. if (!ctrl->hpc_reg) {
  909. err("cannot remap MMIO region %llx @ %llx\n",
  910. (unsigned long long)pci_resource_len(pdev, 0),
  911. (unsigned long long)pci_resource_start(pdev, 0));
  912. rc = -ENODEV;
  913. goto err_free_mem_region;
  914. }
  915. /* Check for 66Mhz operation */
  916. bus->cur_bus_speed = get_controller_speed(ctrl);
  917. /********************************************************
  918. *
  919. * Save configuration headers for this and
  920. * subordinate PCI buses
  921. *
  922. ********************************************************/
  923. /* find the physical slot number of the first hot plug slot */
  924. /* Get slot won't work for devices behind bridges, but
  925. * in this case it will always be called for the "base"
  926. * bus/dev/func of a slot.
  927. * CS: this is leveraging the PCIIRQ routing code from the kernel
  928. * (pci-pc.c: get_irq_routing_table) */
  929. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  930. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  931. &(ctrl->first_slot));
  932. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  933. ctrl->first_slot, rc);
  934. if (rc) {
  935. err(msg_initialization_err, rc);
  936. goto err_iounmap;
  937. }
  938. /* Store PCI Config Space for all devices on this bus */
  939. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  940. if (rc) {
  941. err("%s: unable to save PCI configuration data, error %d\n",
  942. __func__, rc);
  943. goto err_iounmap;
  944. }
  945. /*
  946. * Get IO, memory, and IRQ resources for new devices
  947. */
  948. /* The next line is required for cpqhp_find_available_resources */
  949. ctrl->interrupt = pdev->irq;
  950. if (ctrl->interrupt < 0x10) {
  951. cpqhp_legacy_mode = 1;
  952. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  953. }
  954. ctrl->cfgspc_irq = 0;
  955. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  956. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  957. ctrl->add_support = !rc;
  958. if (rc) {
  959. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  960. err("unable to locate PCI configuration resources for hot plug add.\n");
  961. goto err_iounmap;
  962. }
  963. /*
  964. * Finish setting up the hot plug ctrl device
  965. */
  966. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  967. dbg("NumSlots %d\n", ctrl->slot_device_offset);
  968. ctrl->next_event = 0;
  969. /* Setup the slot information structures */
  970. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  971. if (rc) {
  972. err(msg_initialization_err, 6);
  973. err("%s: unable to save PCI configuration data, error %d\n",
  974. __func__, rc);
  975. goto err_iounmap;
  976. }
  977. /* Mask all general input interrupts */
  978. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  979. /* set up the interrupt */
  980. dbg("HPC interrupt = %d\n", ctrl->interrupt);
  981. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  982. IRQF_SHARED, MY_NAME, ctrl)) {
  983. err("Can't get irq %d for the hotplug pci controller\n",
  984. ctrl->interrupt);
  985. rc = -ENODEV;
  986. goto err_iounmap;
  987. }
  988. /* Enable Shift Out interrupt and clear it, also enable SERR on power
  989. * fault
  990. */
  991. temp_word = readw(ctrl->hpc_reg + MISC);
  992. temp_word |= 0x4006;
  993. writew(temp_word, ctrl->hpc_reg + MISC);
  994. /* Changed 05/05/97 to clear all interrupts at start */
  995. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  996. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  997. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  998. if (!cpqhp_ctrl_list) {
  999. cpqhp_ctrl_list = ctrl;
  1000. ctrl->next = NULL;
  1001. } else {
  1002. ctrl->next = cpqhp_ctrl_list;
  1003. cpqhp_ctrl_list = ctrl;
  1004. }
  1005. /* turn off empty slots here unless command line option "ON" set
  1006. * Wait for exclusive access to hardware
  1007. */
  1008. mutex_lock(&ctrl->crit_sect);
  1009. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1010. /* find first device number for the ctrl */
  1011. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1012. while (num_of_slots) {
  1013. dbg("num_of_slots: %d\n", num_of_slots);
  1014. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1015. if (!func)
  1016. break;
  1017. hp_slot = func->device - ctrl->slot_device_offset;
  1018. dbg("hp_slot: %d\n", hp_slot);
  1019. /* We have to save the presence info for these slots */
  1020. temp_word = ctrl->ctrl_int_comp >> 16;
  1021. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1022. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1023. if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
  1024. func->switch_save = 0;
  1025. else
  1026. func->switch_save = 0x10;
  1027. if (!power_mode)
  1028. if (!func->is_a_board) {
  1029. green_LED_off(ctrl, hp_slot);
  1030. slot_disable(ctrl, hp_slot);
  1031. }
  1032. device++;
  1033. num_of_slots--;
  1034. }
  1035. if (!power_mode) {
  1036. set_SOGO(ctrl);
  1037. /* Wait for SOBS to be unset */
  1038. wait_for_ctrl_irq(ctrl);
  1039. }
  1040. rc = init_SERR(ctrl);
  1041. if (rc) {
  1042. err("init_SERR failed\n");
  1043. mutex_unlock(&ctrl->crit_sect);
  1044. goto err_free_irq;
  1045. }
  1046. /* Done with exclusive hardware access */
  1047. mutex_unlock(&ctrl->crit_sect);
  1048. cpqhp_create_debugfs_files(ctrl);
  1049. return 0;
  1050. err_free_irq:
  1051. free_irq(ctrl->interrupt, ctrl);
  1052. err_iounmap:
  1053. iounmap(ctrl->hpc_reg);
  1054. err_free_mem_region:
  1055. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1056. err_free_bus:
  1057. kfree(ctrl->pci_bus);
  1058. err_free_ctrl:
  1059. kfree(ctrl);
  1060. err_disable_device:
  1061. pci_disable_device(pdev);
  1062. return rc;
  1063. }
  1064. static void __exit unload_cpqphpd(void)
  1065. {
  1066. struct pci_func *next;
  1067. struct pci_func *TempSlot;
  1068. int loop;
  1069. u32 rc;
  1070. struct controller *ctrl;
  1071. struct controller *tctrl;
  1072. struct pci_resource *res;
  1073. struct pci_resource *tres;
  1074. rc = compaq_nvram_store(cpqhp_rom_start);
  1075. ctrl = cpqhp_ctrl_list;
  1076. while (ctrl) {
  1077. if (ctrl->hpc_reg) {
  1078. u16 misc;
  1079. rc = read_slot_enable(ctrl);
  1080. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1081. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1082. misc = readw(ctrl->hpc_reg + MISC);
  1083. misc &= 0xFFFD;
  1084. writew(misc, ctrl->hpc_reg + MISC);
  1085. }
  1086. ctrl_slot_cleanup(ctrl);
  1087. res = ctrl->io_head;
  1088. while (res) {
  1089. tres = res;
  1090. res = res->next;
  1091. kfree(tres);
  1092. }
  1093. res = ctrl->mem_head;
  1094. while (res) {
  1095. tres = res;
  1096. res = res->next;
  1097. kfree(tres);
  1098. }
  1099. res = ctrl->p_mem_head;
  1100. while (res) {
  1101. tres = res;
  1102. res = res->next;
  1103. kfree(tres);
  1104. }
  1105. res = ctrl->bus_head;
  1106. while (res) {
  1107. tres = res;
  1108. res = res->next;
  1109. kfree(tres);
  1110. }
  1111. kfree(ctrl->pci_bus);
  1112. tctrl = ctrl;
  1113. ctrl = ctrl->next;
  1114. kfree(tctrl);
  1115. }
  1116. for (loop = 0; loop < 256; loop++) {
  1117. next = cpqhp_slot_list[loop];
  1118. while (next != NULL) {
  1119. res = next->io_head;
  1120. while (res) {
  1121. tres = res;
  1122. res = res->next;
  1123. kfree(tres);
  1124. }
  1125. res = next->mem_head;
  1126. while (res) {
  1127. tres = res;
  1128. res = res->next;
  1129. kfree(tres);
  1130. }
  1131. res = next->p_mem_head;
  1132. while (res) {
  1133. tres = res;
  1134. res = res->next;
  1135. kfree(tres);
  1136. }
  1137. res = next->bus_head;
  1138. while (res) {
  1139. tres = res;
  1140. res = res->next;
  1141. kfree(tres);
  1142. }
  1143. TempSlot = next;
  1144. next = next->next;
  1145. kfree(TempSlot);
  1146. }
  1147. }
  1148. /* Stop the notification mechanism */
  1149. if (initialized)
  1150. cpqhp_event_stop_thread();
  1151. /* unmap the rom address */
  1152. if (cpqhp_rom_start)
  1153. iounmap(cpqhp_rom_start);
  1154. if (smbios_start)
  1155. iounmap(smbios_start);
  1156. }
  1157. static const struct pci_device_id hpcd_pci_tbl[] = {
  1158. {
  1159. /* handle any PCI Hotplug controller */
  1160. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1161. .class_mask = ~0,
  1162. /* no matter who makes it */
  1163. .vendor = PCI_ANY_ID,
  1164. .device = PCI_ANY_ID,
  1165. .subvendor = PCI_ANY_ID,
  1166. .subdevice = PCI_ANY_ID,
  1167. }, { /* end: all zeroes */ }
  1168. };
  1169. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1170. static struct pci_driver cpqhpc_driver = {
  1171. .name = "compaq_pci_hotplug",
  1172. .id_table = hpcd_pci_tbl,
  1173. .probe = cpqhpc_probe,
  1174. /* remove: cpqhpc_remove_one, */
  1175. };
  1176. static int __init cpqhpc_init(void)
  1177. {
  1178. int result;
  1179. cpqhp_debug = debug;
  1180. info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1181. cpqhp_initialize_debugfs();
  1182. result = pci_register_driver(&cpqhpc_driver);
  1183. dbg("pci_register_driver = %d\n", result);
  1184. return result;
  1185. }
  1186. static void __exit cpqhpc_cleanup(void)
  1187. {
  1188. dbg("unload_cpqphpd()\n");
  1189. unload_cpqphpd();
  1190. dbg("pci_unregister_driver\n");
  1191. pci_unregister_driver(&cpqhpc_driver);
  1192. cpqhp_shutdown_debugfs();
  1193. }
  1194. module_init(cpqhpc_init);
  1195. module_exit(cpqhpc_cleanup);