Kconfig 4.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. #
  3. # PCI Express Port Bus Configuration
  4. #
  5. config PCIEPORTBUS
  6. bool "PCI Express Port Bus support"
  7. depends on PCI
  8. help
  9. This automatically enables PCI Express Port Bus support. Users can
  10. choose Native Hot-Plug support, Advanced Error Reporting support,
  11. Power Management Event support and Virtual Channel support to run
  12. on PCI Express Ports (Root or Switch).
  13. #
  14. # Include service Kconfig here
  15. #
  16. config HOTPLUG_PCI_PCIE
  17. bool "PCI Express Hotplug driver"
  18. depends on HOTPLUG_PCI && PCIEPORTBUS
  19. help
  20. Say Y here if you have a motherboard that supports PCI Express Native
  21. Hotplug
  22. When in doubt, say N.
  23. config PCIEAER
  24. bool "PCI Express Advanced Error Reporting support"
  25. depends on PCIEPORTBUS
  26. select RAS
  27. default y
  28. help
  29. This enables PCI Express Root Port Advanced Error Reporting
  30. (AER) driver support. Error reporting messages sent to Root
  31. Port will be handled by PCI Express AER driver.
  32. config PCIEAER_INJECT
  33. tristate "PCI Express error injection support"
  34. depends on PCIEAER
  35. default n
  36. help
  37. This enables PCI Express Root Port Advanced Error Reporting
  38. (AER) software error injector.
  39. Debugging AER code is quite difficult because it is hard
  40. to trigger various real hardware errors. Software-based
  41. error injection can fake almost all kinds of errors with the
  42. help of a user space helper tool aer-inject, which can be
  43. gotten from:
  44. http://www.kernel.org/pub/linux/utils/pci/aer-inject/
  45. #
  46. # PCI Express ECRC
  47. #
  48. config PCIE_ECRC
  49. bool "PCI Express ECRC settings control"
  50. depends on PCIEAER
  51. help
  52. Used to override firmware/bios settings for PCI Express ECRC
  53. (transaction layer end-to-end CRC checking).
  54. When in doubt, say N.
  55. #
  56. # PCI Express ASPM
  57. #
  58. config PCIEASPM
  59. bool "PCI Express ASPM control" if EXPERT
  60. depends on PCI && PCIEPORTBUS
  61. default y
  62. help
  63. This enables OS control over PCI Express ASPM (Active State
  64. Power Management) and Clock Power Management. ASPM supports
  65. state L0/L0s/L1.
  66. ASPM is initially set up by the firmware. With this option enabled,
  67. Linux can modify this state in order to disable ASPM on known-bad
  68. hardware or configurations and enable it when known-safe.
  69. ASPM can be disabled or enabled at runtime via
  70. /sys/module/pcie_aspm/parameters/policy
  71. When in doubt, say Y.
  72. config PCIEASPM_DEBUG
  73. bool "Debug PCI Express ASPM"
  74. depends on PCIEASPM
  75. default n
  76. help
  77. This enables PCI Express ASPM debug support. It will add per-device
  78. interface to control ASPM.
  79. choice
  80. prompt "Default ASPM policy"
  81. default PCIEASPM_DEFAULT
  82. depends on PCIEASPM
  83. config PCIEASPM_DEFAULT
  84. bool "BIOS default"
  85. depends on PCIEASPM
  86. help
  87. Use the BIOS defaults for PCI Express ASPM.
  88. config PCIEASPM_POWERSAVE
  89. bool "Powersave"
  90. depends on PCIEASPM
  91. help
  92. Enable PCI Express ASPM L0s and L1 where possible, even if the
  93. BIOS did not.
  94. config PCIEASPM_POWER_SUPERSAVE
  95. bool "Power Supersave"
  96. depends on PCIEASPM
  97. help
  98. Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where
  99. possible. This would result in higher power savings while staying in L1
  100. where the components support it.
  101. config PCIEASPM_PERFORMANCE
  102. bool "Performance"
  103. depends on PCIEASPM
  104. help
  105. Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
  106. endchoice
  107. config PCIE_PME
  108. def_bool y
  109. depends on PCIEPORTBUS && PM
  110. config PCIE_DPC
  111. bool "PCI Express Downstream Port Containment support"
  112. depends on PCIEPORTBUS && PCIEAER
  113. default n
  114. help
  115. This enables PCI Express Downstream Port Containment (DPC)
  116. driver support. DPC events from Root and Downstream ports
  117. will be handled by the DPC driver. If your system doesn't
  118. have this capability or you do not want to use this feature,
  119. it is safe to answer N.
  120. config PCIE_PTM
  121. bool "PCI Express Precision Time Measurement support"
  122. default n
  123. depends on PCIEPORTBUS
  124. help
  125. This enables PCI Express Precision Time Measurement (PTM)
  126. support.
  127. This is only useful if you have devices that support PTM, but it
  128. is safe to enable even if you don't.