pme.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCIe Native PME support
  4. *
  5. * Copyright (C) 2007 - 2009 Intel Corp
  6. * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
  7. * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  8. */
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/slab.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/device.h>
  16. #include <linux/pm_runtime.h>
  17. #include "../pci.h"
  18. #include "portdrv.h"
  19. /*
  20. * If this switch is set, MSI will not be used for PCIe PME signaling. This
  21. * causes the PCIe port driver to use INTx interrupts only, but it turns out
  22. * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
  23. * wake-up from system sleep states.
  24. */
  25. bool pcie_pme_msi_disabled;
  26. static int __init pcie_pme_setup(char *str)
  27. {
  28. if (!strncmp(str, "nomsi", 5))
  29. pcie_pme_msi_disabled = true;
  30. return 1;
  31. }
  32. __setup("pcie_pme=", pcie_pme_setup);
  33. struct pcie_pme_service_data {
  34. spinlock_t lock;
  35. struct pcie_device *srv;
  36. struct work_struct work;
  37. bool noirq; /* If set, keep the PME interrupt disabled. */
  38. };
  39. /**
  40. * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
  41. * @dev: PCIe root port or event collector.
  42. * @enable: Enable or disable the interrupt.
  43. */
  44. void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
  45. {
  46. if (enable)
  47. pcie_capability_set_word(dev, PCI_EXP_RTCTL,
  48. PCI_EXP_RTCTL_PMEIE);
  49. else
  50. pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
  51. PCI_EXP_RTCTL_PMEIE);
  52. }
  53. /**
  54. * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  55. * @bus: PCI bus to scan.
  56. *
  57. * Scan given PCI bus and all buses under it for devices asserting PME#.
  58. */
  59. static bool pcie_pme_walk_bus(struct pci_bus *bus)
  60. {
  61. struct pci_dev *dev;
  62. bool ret = false;
  63. list_for_each_entry(dev, &bus->devices, bus_list) {
  64. /* Skip PCIe devices in case we started from a root port. */
  65. if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
  66. if (dev->pme_poll)
  67. dev->pme_poll = false;
  68. pci_wakeup_event(dev);
  69. pm_request_resume(&dev->dev);
  70. ret = true;
  71. }
  72. if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
  73. ret = true;
  74. }
  75. return ret;
  76. }
  77. /**
  78. * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
  79. * @bus: Secondary bus of the bridge.
  80. * @devfn: Device/function number to check.
  81. *
  82. * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
  83. * PCIe PME message. In such that case the bridge should use the Requester ID
  84. * of device/function number 0 on its secondary bus.
  85. */
  86. static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
  87. {
  88. struct pci_dev *dev;
  89. bool found = false;
  90. if (devfn)
  91. return false;
  92. dev = pci_dev_get(bus->self);
  93. if (!dev)
  94. return false;
  95. if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
  96. down_read(&pci_bus_sem);
  97. if (pcie_pme_walk_bus(bus))
  98. found = true;
  99. up_read(&pci_bus_sem);
  100. }
  101. pci_dev_put(dev);
  102. return found;
  103. }
  104. /**
  105. * pcie_pme_handle_request - Find device that generated PME and handle it.
  106. * @port: Root port or event collector that generated the PME interrupt.
  107. * @req_id: PCIe Requester ID of the device that generated the PME.
  108. */
  109. static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
  110. {
  111. u8 busnr = req_id >> 8, devfn = req_id & 0xff;
  112. struct pci_bus *bus;
  113. struct pci_dev *dev;
  114. bool found = false;
  115. /* First, check if the PME is from the root port itself. */
  116. if (port->devfn == devfn && port->bus->number == busnr) {
  117. if (port->pme_poll)
  118. port->pme_poll = false;
  119. if (pci_check_pme_status(port)) {
  120. pm_request_resume(&port->dev);
  121. found = true;
  122. } else {
  123. /*
  124. * Apparently, the root port generated the PME on behalf
  125. * of a non-PCIe device downstream. If this is done by
  126. * a root port, the Requester ID field in its status
  127. * register may contain either the root port's, or the
  128. * source device's information (PCI Express Base
  129. * Specification, Rev. 2.0, Section 6.1.9).
  130. */
  131. down_read(&pci_bus_sem);
  132. found = pcie_pme_walk_bus(port->subordinate);
  133. up_read(&pci_bus_sem);
  134. }
  135. goto out;
  136. }
  137. /* Second, find the bus the source device is on. */
  138. bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
  139. if (!bus)
  140. goto out;
  141. /* Next, check if the PME is from a PCIe-PCI bridge. */
  142. found = pcie_pme_from_pci_bridge(bus, devfn);
  143. if (found)
  144. goto out;
  145. /* Finally, try to find the PME source on the bus. */
  146. down_read(&pci_bus_sem);
  147. list_for_each_entry(dev, &bus->devices, bus_list) {
  148. pci_dev_get(dev);
  149. if (dev->devfn == devfn) {
  150. found = true;
  151. break;
  152. }
  153. pci_dev_put(dev);
  154. }
  155. up_read(&pci_bus_sem);
  156. if (found) {
  157. /* The device is there, but we have to check its PME status. */
  158. found = pci_check_pme_status(dev);
  159. if (found) {
  160. if (dev->pme_poll)
  161. dev->pme_poll = false;
  162. pci_wakeup_event(dev);
  163. pm_request_resume(&dev->dev);
  164. }
  165. pci_dev_put(dev);
  166. } else if (devfn) {
  167. /*
  168. * The device is not there, but we can still try to recover by
  169. * assuming that the PME was reported by a PCIe-PCI bridge that
  170. * used devfn different from zero.
  171. */
  172. pci_dbg(port, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
  173. busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
  174. found = pcie_pme_from_pci_bridge(bus, 0);
  175. }
  176. out:
  177. if (!found)
  178. pci_dbg(port, "Spurious native PME interrupt!\n");
  179. }
  180. /**
  181. * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
  182. * @work: Work structure giving access to service data.
  183. */
  184. static void pcie_pme_work_fn(struct work_struct *work)
  185. {
  186. struct pcie_pme_service_data *data =
  187. container_of(work, struct pcie_pme_service_data, work);
  188. struct pci_dev *port = data->srv->port;
  189. u32 rtsta;
  190. spin_lock_irq(&data->lock);
  191. for (;;) {
  192. if (data->noirq)
  193. break;
  194. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  195. if (rtsta == (u32) ~0)
  196. break;
  197. if (rtsta & PCI_EXP_RTSTA_PME) {
  198. /*
  199. * Clear PME status of the port. If there are other
  200. * pending PMEs, the status will be set again.
  201. */
  202. pcie_clear_root_pme_status(port);
  203. spin_unlock_irq(&data->lock);
  204. pcie_pme_handle_request(port, rtsta & 0xffff);
  205. spin_lock_irq(&data->lock);
  206. continue;
  207. }
  208. /* No need to loop if there are no more PMEs pending. */
  209. if (!(rtsta & PCI_EXP_RTSTA_PENDING))
  210. break;
  211. spin_unlock_irq(&data->lock);
  212. cpu_relax();
  213. spin_lock_irq(&data->lock);
  214. }
  215. if (!data->noirq)
  216. pcie_pme_interrupt_enable(port, true);
  217. spin_unlock_irq(&data->lock);
  218. }
  219. /**
  220. * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
  221. * @irq: Interrupt vector.
  222. * @context: Interrupt context pointer.
  223. */
  224. static irqreturn_t pcie_pme_irq(int irq, void *context)
  225. {
  226. struct pci_dev *port;
  227. struct pcie_pme_service_data *data;
  228. u32 rtsta;
  229. unsigned long flags;
  230. port = ((struct pcie_device *)context)->port;
  231. data = get_service_data((struct pcie_device *)context);
  232. spin_lock_irqsave(&data->lock, flags);
  233. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  234. if (rtsta == (u32) ~0 || !(rtsta & PCI_EXP_RTSTA_PME)) {
  235. spin_unlock_irqrestore(&data->lock, flags);
  236. return IRQ_NONE;
  237. }
  238. pcie_pme_interrupt_enable(port, false);
  239. spin_unlock_irqrestore(&data->lock, flags);
  240. /* We don't use pm_wq, because it's freezable. */
  241. schedule_work(&data->work);
  242. return IRQ_HANDLED;
  243. }
  244. /**
  245. * pcie_pme_can_wakeup - Set the wakeup capability flag.
  246. * @dev: PCI device to handle.
  247. * @ign: Ignored.
  248. */
  249. static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign)
  250. {
  251. device_set_wakeup_capable(&dev->dev, true);
  252. return 0;
  253. }
  254. /**
  255. * pcie_pme_mark_devices - Set the wakeup flag for devices below a port.
  256. * @port: PCIe root port or event collector to handle.
  257. *
  258. * For each device below given root port, including the port itself (or for each
  259. * root complex integrated endpoint if @port is a root complex event collector)
  260. * set the flag indicating that it can signal run-time wake-up events.
  261. */
  262. static void pcie_pme_mark_devices(struct pci_dev *port)
  263. {
  264. pcie_pme_can_wakeup(port, NULL);
  265. if (port->subordinate)
  266. pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL);
  267. }
  268. /**
  269. * pcie_pme_probe - Initialize PCIe PME service for given root port.
  270. * @srv: PCIe service to initialize.
  271. */
  272. static int pcie_pme_probe(struct pcie_device *srv)
  273. {
  274. struct pci_dev *port;
  275. struct pcie_pme_service_data *data;
  276. int ret;
  277. data = kzalloc(sizeof(*data), GFP_KERNEL);
  278. if (!data)
  279. return -ENOMEM;
  280. spin_lock_init(&data->lock);
  281. INIT_WORK(&data->work, pcie_pme_work_fn);
  282. data->srv = srv;
  283. set_service_data(srv, data);
  284. port = srv->port;
  285. pcie_pme_interrupt_enable(port, false);
  286. pcie_clear_root_pme_status(port);
  287. ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
  288. if (ret) {
  289. kfree(data);
  290. return ret;
  291. }
  292. pci_info(port, "Signaling PME with IRQ %d\n", srv->irq);
  293. pcie_pme_mark_devices(port);
  294. pcie_pme_interrupt_enable(port, true);
  295. return 0;
  296. }
  297. static bool pcie_pme_check_wakeup(struct pci_bus *bus)
  298. {
  299. struct pci_dev *dev;
  300. if (!bus)
  301. return false;
  302. list_for_each_entry(dev, &bus->devices, bus_list)
  303. if (device_may_wakeup(&dev->dev)
  304. || pcie_pme_check_wakeup(dev->subordinate))
  305. return true;
  306. return false;
  307. }
  308. static void pcie_pme_disable_interrupt(struct pci_dev *port,
  309. struct pcie_pme_service_data *data)
  310. {
  311. spin_lock_irq(&data->lock);
  312. pcie_pme_interrupt_enable(port, false);
  313. pcie_clear_root_pme_status(port);
  314. data->noirq = true;
  315. spin_unlock_irq(&data->lock);
  316. }
  317. /**
  318. * pcie_pme_suspend - Suspend PCIe PME service device.
  319. * @srv: PCIe service device to suspend.
  320. */
  321. static int pcie_pme_suspend(struct pcie_device *srv)
  322. {
  323. struct pcie_pme_service_data *data = get_service_data(srv);
  324. struct pci_dev *port = srv->port;
  325. bool wakeup;
  326. int ret;
  327. if (device_may_wakeup(&port->dev)) {
  328. wakeup = true;
  329. } else {
  330. down_read(&pci_bus_sem);
  331. wakeup = pcie_pme_check_wakeup(port->subordinate);
  332. up_read(&pci_bus_sem);
  333. }
  334. if (wakeup) {
  335. ret = enable_irq_wake(srv->irq);
  336. if (!ret)
  337. return 0;
  338. }
  339. pcie_pme_disable_interrupt(port, data);
  340. synchronize_irq(srv->irq);
  341. return 0;
  342. }
  343. /**
  344. * pcie_pme_resume - Resume PCIe PME service device.
  345. * @srv - PCIe service device to resume.
  346. */
  347. static int pcie_pme_resume(struct pcie_device *srv)
  348. {
  349. struct pcie_pme_service_data *data = get_service_data(srv);
  350. spin_lock_irq(&data->lock);
  351. if (data->noirq) {
  352. struct pci_dev *port = srv->port;
  353. pcie_clear_root_pme_status(port);
  354. pcie_pme_interrupt_enable(port, true);
  355. data->noirq = false;
  356. } else {
  357. disable_irq_wake(srv->irq);
  358. }
  359. spin_unlock_irq(&data->lock);
  360. return 0;
  361. }
  362. /**
  363. * pcie_pme_remove - Prepare PCIe PME service device for removal.
  364. * @srv - PCIe service device to remove.
  365. */
  366. static void pcie_pme_remove(struct pcie_device *srv)
  367. {
  368. struct pcie_pme_service_data *data = get_service_data(srv);
  369. pcie_pme_disable_interrupt(srv->port, data);
  370. free_irq(srv->irq, srv);
  371. cancel_work_sync(&data->work);
  372. kfree(data);
  373. }
  374. static struct pcie_port_service_driver pcie_pme_driver = {
  375. .name = "pcie_pme",
  376. .port_type = PCI_EXP_TYPE_ROOT_PORT,
  377. .service = PCIE_PORT_SERVICE_PME,
  378. .probe = pcie_pme_probe,
  379. .suspend = pcie_pme_suspend,
  380. .resume = pcie_pme_resume,
  381. .remove = pcie_pme_remove,
  382. };
  383. /**
  384. * pcie_pme_service_init - Register the PCIe PME service driver.
  385. */
  386. int __init pcie_pme_init(void)
  387. {
  388. return pcie_port_service_register(&pcie_pme_driver);
  389. }