portdrv.h 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Purpose: PCI Express Port Bus Driver's Internal Data Structures
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #ifndef _PORTDRV_H_
  9. #define _PORTDRV_H_
  10. #include <linux/compiler.h>
  11. /* Service Type */
  12. #define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */
  13. #define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT)
  14. #define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */
  15. #define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT)
  16. #define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */
  17. #define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT)
  18. #define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */
  19. #define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
  20. #define PCIE_PORT_DEVICE_MAXSERVICES 4
  21. #ifdef CONFIG_PCIEAER
  22. int pcie_aer_init(void);
  23. #else
  24. static inline int pcie_aer_init(void) { return 0; }
  25. #endif
  26. #ifdef CONFIG_HOTPLUG_PCI_PCIE
  27. int pcie_hp_init(void);
  28. #else
  29. static inline int pcie_hp_init(void) { return 0; }
  30. #endif
  31. #ifdef CONFIG_PCIE_PME
  32. int pcie_pme_init(void);
  33. #else
  34. static inline int pcie_pme_init(void) { return 0; }
  35. #endif
  36. #ifdef CONFIG_PCIE_DPC
  37. int pcie_dpc_init(void);
  38. #else
  39. static inline int pcie_dpc_init(void) { return 0; }
  40. #endif
  41. /* Port Type */
  42. #define PCIE_ANY_PORT (~0)
  43. struct pcie_device {
  44. int irq; /* Service IRQ/MSI/MSI-X Vector */
  45. struct pci_dev *port; /* Root/Upstream/Downstream Port */
  46. u32 service; /* Port service this device represents */
  47. void *priv_data; /* Service Private Data */
  48. struct device device; /* Generic Device Interface */
  49. };
  50. #define to_pcie_device(d) container_of(d, struct pcie_device, device)
  51. static inline void set_service_data(struct pcie_device *dev, void *data)
  52. {
  53. dev->priv_data = data;
  54. }
  55. static inline void *get_service_data(struct pcie_device *dev)
  56. {
  57. return dev->priv_data;
  58. }
  59. struct pcie_port_service_driver {
  60. const char *name;
  61. int (*probe) (struct pcie_device *dev);
  62. void (*remove) (struct pcie_device *dev);
  63. int (*suspend) (struct pcie_device *dev);
  64. int (*resume_noirq) (struct pcie_device *dev);
  65. int (*resume) (struct pcie_device *dev);
  66. /* Device driver may resume normal operations */
  67. void (*error_resume)(struct pci_dev *dev);
  68. /* Link Reset Capability - AER service driver specific */
  69. pci_ers_result_t (*reset_link) (struct pci_dev *dev);
  70. int port_type; /* Type of the port this driver can handle */
  71. u32 service; /* Port service this device represents */
  72. struct device_driver driver;
  73. };
  74. #define to_service_driver(d) \
  75. container_of(d, struct pcie_port_service_driver, driver)
  76. int pcie_port_service_register(struct pcie_port_service_driver *new);
  77. void pcie_port_service_unregister(struct pcie_port_service_driver *new);
  78. /*
  79. * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
  80. * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
  81. * supports a maximum of 32 vectors per function.
  82. */
  83. #define PCIE_PORT_MAX_MSI_ENTRIES 32
  84. #define get_descriptor_id(type, service) (((type - 4) << 8) | service)
  85. extern struct bus_type pcie_port_bus_type;
  86. int pcie_port_device_register(struct pci_dev *dev);
  87. #ifdef CONFIG_PM
  88. int pcie_port_device_suspend(struct device *dev);
  89. int pcie_port_device_resume_noirq(struct device *dev);
  90. int pcie_port_device_resume(struct device *dev);
  91. #endif
  92. void pcie_port_device_remove(struct pci_dev *dev);
  93. int __must_check pcie_port_bus_register(void);
  94. void pcie_port_bus_unregister(void);
  95. struct pci_dev;
  96. #ifdef CONFIG_PCIE_PME
  97. extern bool pcie_pme_msi_disabled;
  98. static inline void pcie_pme_disable_msi(void)
  99. {
  100. pcie_pme_msi_disabled = true;
  101. }
  102. static inline bool pcie_pme_no_msi(void)
  103. {
  104. return pcie_pme_msi_disabled;
  105. }
  106. void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
  107. #else /* !CONFIG_PCIE_PME */
  108. static inline void pcie_pme_disable_msi(void) {}
  109. static inline bool pcie_pme_no_msi(void) { return false; }
  110. static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
  111. #endif /* !CONFIG_PCIE_PME */
  112. #ifdef CONFIG_ACPI_APEI
  113. int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
  114. #else
  115. static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
  116. {
  117. if (pci_dev->__aer_firmware_first_valid)
  118. return pci_dev->__aer_firmware_first;
  119. return 0;
  120. }
  121. #endif
  122. #ifdef CONFIG_PCIEAER
  123. irqreturn_t aer_irq(int irq, void *context);
  124. #endif
  125. struct pcie_port_service_driver *pcie_port_find_service(struct pci_dev *dev,
  126. u32 service);
  127. struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
  128. #endif /* _PORTDRV_H_ */