pinctrl-wmt.c 15 KB

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  1. /*
  2. * Pinctrl driver for the Wondermedia SoC's
  3. *
  4. * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/gpio/driver.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/of.h>
  21. #include <linux/of_irq.h>
  22. #include <linux/pinctrl/consumer.h>
  23. #include <linux/pinctrl/machine.h>
  24. #include <linux/pinctrl/pinconf.h>
  25. #include <linux/pinctrl/pinconf-generic.h>
  26. #include <linux/pinctrl/pinctrl.h>
  27. #include <linux/pinctrl/pinmux.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/slab.h>
  30. #include "pinctrl-wmt.h"
  31. static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg,
  32. u32 mask)
  33. {
  34. u32 val;
  35. val = readl_relaxed(data->base + reg);
  36. val |= mask;
  37. writel_relaxed(val, data->base + reg);
  38. }
  39. static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg,
  40. u32 mask)
  41. {
  42. u32 val;
  43. val = readl_relaxed(data->base + reg);
  44. val &= ~mask;
  45. writel_relaxed(val, data->base + reg);
  46. }
  47. enum wmt_func_sel {
  48. WMT_FSEL_GPIO_IN = 0,
  49. WMT_FSEL_GPIO_OUT = 1,
  50. WMT_FSEL_ALT = 2,
  51. WMT_FSEL_COUNT = 3,
  52. };
  53. static const char * const wmt_functions[WMT_FSEL_COUNT] = {
  54. [WMT_FSEL_GPIO_IN] = "gpio_in",
  55. [WMT_FSEL_GPIO_OUT] = "gpio_out",
  56. [WMT_FSEL_ALT] = "alt",
  57. };
  58. static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev)
  59. {
  60. return WMT_FSEL_COUNT;
  61. }
  62. static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev,
  63. unsigned selector)
  64. {
  65. return wmt_functions[selector];
  66. }
  67. static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev,
  68. unsigned selector,
  69. const char * const **groups,
  70. unsigned * const num_groups)
  71. {
  72. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  73. /* every pin does every function */
  74. *groups = data->groups;
  75. *num_groups = data->ngroups;
  76. return 0;
  77. }
  78. static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func,
  79. unsigned pin)
  80. {
  81. u32 bank = WMT_BANK_FROM_PIN(pin);
  82. u32 bit = WMT_BIT_FROM_PIN(pin);
  83. u32 reg_en = data->banks[bank].reg_en;
  84. u32 reg_dir = data->banks[bank].reg_dir;
  85. if (reg_dir == NO_REG) {
  86. dev_err(data->dev, "pin:%d no direction register defined\n",
  87. pin);
  88. return -EINVAL;
  89. }
  90. /*
  91. * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be
  92. * disabled (as on VT8500) and that no alternate function is available.
  93. */
  94. switch (func) {
  95. case WMT_FSEL_GPIO_IN:
  96. if (reg_en != NO_REG)
  97. wmt_setbits(data, reg_en, BIT(bit));
  98. wmt_clearbits(data, reg_dir, BIT(bit));
  99. break;
  100. case WMT_FSEL_GPIO_OUT:
  101. if (reg_en != NO_REG)
  102. wmt_setbits(data, reg_en, BIT(bit));
  103. wmt_setbits(data, reg_dir, BIT(bit));
  104. break;
  105. case WMT_FSEL_ALT:
  106. if (reg_en == NO_REG) {
  107. dev_err(data->dev, "pin:%d no alt function available\n",
  108. pin);
  109. return -EINVAL;
  110. }
  111. wmt_clearbits(data, reg_en, BIT(bit));
  112. }
  113. return 0;
  114. }
  115. static int wmt_pmx_set_mux(struct pinctrl_dev *pctldev,
  116. unsigned func_selector,
  117. unsigned group_selector)
  118. {
  119. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  120. u32 pinnum = data->pins[group_selector].number;
  121. return wmt_set_pinmux(data, func_selector, pinnum);
  122. }
  123. static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
  124. struct pinctrl_gpio_range *range,
  125. unsigned offset)
  126. {
  127. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  128. /* disable by setting GPIO_IN */
  129. wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset);
  130. }
  131. static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
  132. struct pinctrl_gpio_range *range,
  133. unsigned offset,
  134. bool input)
  135. {
  136. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  137. wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT),
  138. offset);
  139. return 0;
  140. }
  141. static const struct pinmux_ops wmt_pinmux_ops = {
  142. .get_functions_count = wmt_pmx_get_functions_count,
  143. .get_function_name = wmt_pmx_get_function_name,
  144. .get_function_groups = wmt_pmx_get_function_groups,
  145. .set_mux = wmt_pmx_set_mux,
  146. .gpio_disable_free = wmt_pmx_gpio_disable_free,
  147. .gpio_set_direction = wmt_pmx_gpio_set_direction,
  148. };
  149. static int wmt_get_groups_count(struct pinctrl_dev *pctldev)
  150. {
  151. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  152. return data->ngroups;
  153. }
  154. static const char *wmt_get_group_name(struct pinctrl_dev *pctldev,
  155. unsigned selector)
  156. {
  157. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  158. return data->groups[selector];
  159. }
  160. static int wmt_get_group_pins(struct pinctrl_dev *pctldev,
  161. unsigned selector,
  162. const unsigned **pins,
  163. unsigned *num_pins)
  164. {
  165. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  166. *pins = &data->pins[selector].number;
  167. *num_pins = 1;
  168. return 0;
  169. }
  170. static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin)
  171. {
  172. int i;
  173. for (i = 0; i < data->npins; i++) {
  174. if (data->pins[i].number == pin)
  175. return i;
  176. }
  177. return -EINVAL;
  178. }
  179. static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data,
  180. struct device_node *np,
  181. u32 pin, u32 fnum,
  182. struct pinctrl_map **maps)
  183. {
  184. int group;
  185. struct pinctrl_map *map = *maps;
  186. if (fnum >= ARRAY_SIZE(wmt_functions)) {
  187. dev_err(data->dev, "invalid wm,function %d\n", fnum);
  188. return -EINVAL;
  189. }
  190. group = wmt_pctl_find_group_by_pin(data, pin);
  191. if (group < 0) {
  192. dev_err(data->dev, "unable to match pin %d to group\n", pin);
  193. return group;
  194. }
  195. map->type = PIN_MAP_TYPE_MUX_GROUP;
  196. map->data.mux.group = data->groups[group];
  197. map->data.mux.function = wmt_functions[fnum];
  198. (*maps)++;
  199. return 0;
  200. }
  201. static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
  202. struct device_node *np,
  203. u32 pin, u32 pull,
  204. struct pinctrl_map **maps)
  205. {
  206. int group;
  207. unsigned long *configs;
  208. struct pinctrl_map *map = *maps;
  209. if (pull > 2) {
  210. dev_err(data->dev, "invalid wm,pull %d\n", pull);
  211. return -EINVAL;
  212. }
  213. group = wmt_pctl_find_group_by_pin(data, pin);
  214. if (group < 0) {
  215. dev_err(data->dev, "unable to match pin %d to group\n", pin);
  216. return group;
  217. }
  218. configs = kzalloc(sizeof(*configs), GFP_KERNEL);
  219. if (!configs)
  220. return -ENOMEM;
  221. switch (pull) {
  222. case 0:
  223. configs[0] = PIN_CONFIG_BIAS_DISABLE;
  224. break;
  225. case 1:
  226. configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
  227. break;
  228. case 2:
  229. configs[0] = PIN_CONFIG_BIAS_PULL_UP;
  230. break;
  231. default:
  232. configs[0] = PIN_CONFIG_BIAS_DISABLE;
  233. dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
  234. }
  235. map->type = PIN_MAP_TYPE_CONFIGS_PIN;
  236. map->data.configs.group_or_pin = data->groups[group];
  237. map->data.configs.configs = configs;
  238. map->data.configs.num_configs = 1;
  239. (*maps)++;
  240. return 0;
  241. }
  242. static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev,
  243. struct pinctrl_map *maps,
  244. unsigned num_maps)
  245. {
  246. int i;
  247. for (i = 0; i < num_maps; i++)
  248. if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
  249. kfree(maps[i].data.configs.configs);
  250. kfree(maps);
  251. }
  252. static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
  253. struct device_node *np,
  254. struct pinctrl_map **map,
  255. unsigned *num_maps)
  256. {
  257. struct pinctrl_map *maps, *cur_map;
  258. struct property *pins, *funcs, *pulls;
  259. u32 pin, func, pull;
  260. int num_pins, num_funcs, num_pulls, maps_per_pin;
  261. int i, err;
  262. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  263. pins = of_find_property(np, "wm,pins", NULL);
  264. if (!pins) {
  265. dev_err(data->dev, "missing wmt,pins property\n");
  266. return -EINVAL;
  267. }
  268. funcs = of_find_property(np, "wm,function", NULL);
  269. pulls = of_find_property(np, "wm,pull", NULL);
  270. if (!funcs && !pulls) {
  271. dev_err(data->dev, "neither wm,function nor wm,pull specified\n");
  272. return -EINVAL;
  273. }
  274. /*
  275. * The following lines calculate how many values are defined for each
  276. * of the properties.
  277. */
  278. num_pins = pins->length / sizeof(u32);
  279. num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;
  280. num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0;
  281. if (num_funcs > 1 && num_funcs != num_pins) {
  282. dev_err(data->dev, "wm,function must have 1 or %d entries\n",
  283. num_pins);
  284. return -EINVAL;
  285. }
  286. if (num_pulls > 1 && num_pulls != num_pins) {
  287. dev_err(data->dev, "wm,pull must have 1 or %d entries\n",
  288. num_pins);
  289. return -EINVAL;
  290. }
  291. maps_per_pin = 0;
  292. if (num_funcs)
  293. maps_per_pin++;
  294. if (num_pulls)
  295. maps_per_pin++;
  296. cur_map = maps = kcalloc(num_pins * maps_per_pin, sizeof(*maps),
  297. GFP_KERNEL);
  298. if (!maps)
  299. return -ENOMEM;
  300. for (i = 0; i < num_pins; i++) {
  301. err = of_property_read_u32_index(np, "wm,pins", i, &pin);
  302. if (err)
  303. goto fail;
  304. if (pin >= (data->nbanks * 32)) {
  305. dev_err(data->dev, "invalid wm,pins value\n");
  306. err = -EINVAL;
  307. goto fail;
  308. }
  309. if (num_funcs) {
  310. err = of_property_read_u32_index(np, "wm,function",
  311. (num_funcs > 1 ? i : 0), &func);
  312. if (err)
  313. goto fail;
  314. err = wmt_pctl_dt_node_to_map_func(data, np, pin, func,
  315. &cur_map);
  316. if (err)
  317. goto fail;
  318. }
  319. if (num_pulls) {
  320. err = of_property_read_u32_index(np, "wm,pull",
  321. (num_pulls > 1 ? i : 0), &pull);
  322. if (err)
  323. goto fail;
  324. err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull,
  325. &cur_map);
  326. if (err)
  327. goto fail;
  328. }
  329. }
  330. *map = maps;
  331. *num_maps = num_pins * maps_per_pin;
  332. return 0;
  333. /*
  334. * The fail path removes any maps that have been allocated. The fail path is
  335. * only called from code after maps has been kzalloc'd. It is also safe to
  336. * pass 'num_pins * maps_per_pin' as the map count even though we probably
  337. * failed before all the mappings were read as all maps are allocated at once,
  338. * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there
  339. * is no failpath where a config can be allocated without .type being set.
  340. */
  341. fail:
  342. wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin);
  343. return err;
  344. }
  345. static const struct pinctrl_ops wmt_pctl_ops = {
  346. .get_groups_count = wmt_get_groups_count,
  347. .get_group_name = wmt_get_group_name,
  348. .get_group_pins = wmt_get_group_pins,
  349. .dt_node_to_map = wmt_pctl_dt_node_to_map,
  350. .dt_free_map = wmt_pctl_dt_free_map,
  351. };
  352. static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
  353. unsigned long *config)
  354. {
  355. return -ENOTSUPP;
  356. }
  357. static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
  358. unsigned long *configs, unsigned num_configs)
  359. {
  360. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  361. enum pin_config_param param;
  362. u32 arg;
  363. u32 bank = WMT_BANK_FROM_PIN(pin);
  364. u32 bit = WMT_BIT_FROM_PIN(pin);
  365. u32 reg_pull_en = data->banks[bank].reg_pull_en;
  366. u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
  367. int i;
  368. if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) {
  369. dev_err(data->dev, "bias functions not supported on pin %d\n",
  370. pin);
  371. return -EINVAL;
  372. }
  373. for (i = 0; i < num_configs; i++) {
  374. param = pinconf_to_config_param(configs[i]);
  375. arg = pinconf_to_config_argument(configs[i]);
  376. if ((param == PIN_CONFIG_BIAS_PULL_DOWN) ||
  377. (param == PIN_CONFIG_BIAS_PULL_UP)) {
  378. if (arg == 0)
  379. param = PIN_CONFIG_BIAS_DISABLE;
  380. }
  381. switch (param) {
  382. case PIN_CONFIG_BIAS_DISABLE:
  383. wmt_clearbits(data, reg_pull_en, BIT(bit));
  384. break;
  385. case PIN_CONFIG_BIAS_PULL_DOWN:
  386. wmt_clearbits(data, reg_pull_cfg, BIT(bit));
  387. wmt_setbits(data, reg_pull_en, BIT(bit));
  388. break;
  389. case PIN_CONFIG_BIAS_PULL_UP:
  390. wmt_setbits(data, reg_pull_cfg, BIT(bit));
  391. wmt_setbits(data, reg_pull_en, BIT(bit));
  392. break;
  393. default:
  394. dev_err(data->dev, "unknown pinconf param\n");
  395. return -EINVAL;
  396. }
  397. } /* for each config */
  398. return 0;
  399. }
  400. static const struct pinconf_ops wmt_pinconf_ops = {
  401. .pin_config_get = wmt_pinconf_get,
  402. .pin_config_set = wmt_pinconf_set,
  403. };
  404. static struct pinctrl_desc wmt_desc = {
  405. .owner = THIS_MODULE,
  406. .name = "pinctrl-wmt",
  407. .pctlops = &wmt_pctl_ops,
  408. .pmxops = &wmt_pinmux_ops,
  409. .confops = &wmt_pinconf_ops,
  410. };
  411. static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
  412. {
  413. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  414. u32 bank = WMT_BANK_FROM_PIN(offset);
  415. u32 bit = WMT_BIT_FROM_PIN(offset);
  416. u32 reg_dir = data->banks[bank].reg_dir;
  417. u32 val;
  418. val = readl_relaxed(data->base + reg_dir);
  419. if (val & BIT(bit))
  420. return GPIOF_DIR_OUT;
  421. else
  422. return GPIOF_DIR_IN;
  423. }
  424. static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
  425. {
  426. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  427. u32 bank = WMT_BANK_FROM_PIN(offset);
  428. u32 bit = WMT_BIT_FROM_PIN(offset);
  429. u32 reg_data_in = data->banks[bank].reg_data_in;
  430. if (reg_data_in == NO_REG) {
  431. dev_err(data->dev, "no data in register defined\n");
  432. return -EINVAL;
  433. }
  434. return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
  435. }
  436. static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
  437. int val)
  438. {
  439. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  440. u32 bank = WMT_BANK_FROM_PIN(offset);
  441. u32 bit = WMT_BIT_FROM_PIN(offset);
  442. u32 reg_data_out = data->banks[bank].reg_data_out;
  443. if (reg_data_out == NO_REG) {
  444. dev_err(data->dev, "no data out register defined\n");
  445. return;
  446. }
  447. if (val)
  448. wmt_setbits(data, reg_data_out, BIT(bit));
  449. else
  450. wmt_clearbits(data, reg_data_out, BIT(bit));
  451. }
  452. static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  453. {
  454. return pinctrl_gpio_direction_input(chip->base + offset);
  455. }
  456. static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
  457. int value)
  458. {
  459. wmt_gpio_set_value(chip, offset, value);
  460. return pinctrl_gpio_direction_output(chip->base + offset);
  461. }
  462. static const struct gpio_chip wmt_gpio_chip = {
  463. .label = "gpio-wmt",
  464. .owner = THIS_MODULE,
  465. .request = gpiochip_generic_request,
  466. .free = gpiochip_generic_free,
  467. .get_direction = wmt_gpio_get_direction,
  468. .direction_input = wmt_gpio_direction_input,
  469. .direction_output = wmt_gpio_direction_output,
  470. .get = wmt_gpio_get_value,
  471. .set = wmt_gpio_set_value,
  472. .can_sleep = false,
  473. };
  474. int wmt_pinctrl_probe(struct platform_device *pdev,
  475. struct wmt_pinctrl_data *data)
  476. {
  477. int err;
  478. struct resource *res;
  479. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  480. data->base = devm_ioremap_resource(&pdev->dev, res);
  481. if (IS_ERR(data->base))
  482. return PTR_ERR(data->base);
  483. wmt_desc.pins = data->pins;
  484. wmt_desc.npins = data->npins;
  485. data->gpio_chip = wmt_gpio_chip;
  486. data->gpio_chip.parent = &pdev->dev;
  487. data->gpio_chip.of_node = pdev->dev.of_node;
  488. data->gpio_chip.ngpio = data->nbanks * 32;
  489. platform_set_drvdata(pdev, data);
  490. data->dev = &pdev->dev;
  491. data->pctl_dev = devm_pinctrl_register(&pdev->dev, &wmt_desc, data);
  492. if (IS_ERR(data->pctl_dev)) {
  493. dev_err(&pdev->dev, "Failed to register pinctrl\n");
  494. return PTR_ERR(data->pctl_dev);
  495. }
  496. err = gpiochip_add_data(&data->gpio_chip, data);
  497. if (err) {
  498. dev_err(&pdev->dev, "could not add GPIO chip\n");
  499. return err;
  500. }
  501. err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev),
  502. 0, 0, data->nbanks * 32);
  503. if (err)
  504. goto fail_range;
  505. dev_info(&pdev->dev, "Pin controller initialized\n");
  506. return 0;
  507. fail_range:
  508. gpiochip_remove(&data->gpio_chip);
  509. return err;
  510. }