axp20x-regulator.c 30 KB

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  1. /*
  2. * AXP20x regulators driver.
  3. *
  4. * Copyright (C) 2013 Carlo Caione <carlo@caione.org>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General
  7. * Public License. See the file "COPYING" in the main directory of this
  8. * archive for more details.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_device.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/regmap.h>
  22. #include <linux/mfd/axp20x.h>
  23. #include <linux/regulator/driver.h>
  24. #include <linux/regulator/of_regulator.h>
  25. #define AXP20X_IO_ENABLED 0x03
  26. #define AXP20X_IO_DISABLED 0x07
  27. #define AXP22X_IO_ENABLED 0x03
  28. #define AXP22X_IO_DISABLED 0x04
  29. #define AXP20X_WORKMODE_DCDC2_MASK BIT(2)
  30. #define AXP20X_WORKMODE_DCDC3_MASK BIT(1)
  31. #define AXP22X_WORKMODE_DCDCX_MASK(x) BIT(x)
  32. #define AXP20X_FREQ_DCDC_MASK 0x0f
  33. #define AXP22X_MISC_N_VBUSEN_FUNC BIT(4)
  34. #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
  35. _vmask, _ereg, _emask, _enable_val, _disable_val) \
  36. [_family##_##_id] = { \
  37. .name = (_match), \
  38. .supply_name = (_supply), \
  39. .of_match = of_match_ptr(_match), \
  40. .regulators_node = of_match_ptr("regulators"), \
  41. .type = REGULATOR_VOLTAGE, \
  42. .id = _family##_##_id, \
  43. .n_voltages = (((_max) - (_min)) / (_step) + 1), \
  44. .owner = THIS_MODULE, \
  45. .min_uV = (_min) * 1000, \
  46. .uV_step = (_step) * 1000, \
  47. .vsel_reg = (_vreg), \
  48. .vsel_mask = (_vmask), \
  49. .enable_reg = (_ereg), \
  50. .enable_mask = (_emask), \
  51. .enable_val = (_enable_val), \
  52. .disable_val = (_disable_val), \
  53. .ops = &axp20x_ops, \
  54. }
  55. #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
  56. _vmask, _ereg, _emask) \
  57. [_family##_##_id] = { \
  58. .name = (_match), \
  59. .supply_name = (_supply), \
  60. .of_match = of_match_ptr(_match), \
  61. .regulators_node = of_match_ptr("regulators"), \
  62. .type = REGULATOR_VOLTAGE, \
  63. .id = _family##_##_id, \
  64. .n_voltages = (((_max) - (_min)) / (_step) + 1), \
  65. .owner = THIS_MODULE, \
  66. .min_uV = (_min) * 1000, \
  67. .uV_step = (_step) * 1000, \
  68. .vsel_reg = (_vreg), \
  69. .vsel_mask = (_vmask), \
  70. .enable_reg = (_ereg), \
  71. .enable_mask = (_emask), \
  72. .ops = &axp20x_ops, \
  73. }
  74. #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \
  75. [_family##_##_id] = { \
  76. .name = (_match), \
  77. .supply_name = (_supply), \
  78. .of_match = of_match_ptr(_match), \
  79. .regulators_node = of_match_ptr("regulators"), \
  80. .type = REGULATOR_VOLTAGE, \
  81. .id = _family##_##_id, \
  82. .owner = THIS_MODULE, \
  83. .enable_reg = (_ereg), \
  84. .enable_mask = (_emask), \
  85. .ops = &axp20x_ops_sw, \
  86. }
  87. #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \
  88. [_family##_##_id] = { \
  89. .name = (_match), \
  90. .supply_name = (_supply), \
  91. .of_match = of_match_ptr(_match), \
  92. .regulators_node = of_match_ptr("regulators"), \
  93. .type = REGULATOR_VOLTAGE, \
  94. .id = _family##_##_id, \
  95. .n_voltages = 1, \
  96. .owner = THIS_MODULE, \
  97. .min_uV = (_volt) * 1000, \
  98. .ops = &axp20x_ops_fixed \
  99. }
  100. #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \
  101. _vreg, _vmask, _ereg, _emask) \
  102. [_family##_##_id] = { \
  103. .name = (_match), \
  104. .supply_name = (_supply), \
  105. .of_match = of_match_ptr(_match), \
  106. .regulators_node = of_match_ptr("regulators"), \
  107. .type = REGULATOR_VOLTAGE, \
  108. .id = _family##_##_id, \
  109. .n_voltages = (_n_voltages), \
  110. .owner = THIS_MODULE, \
  111. .vsel_reg = (_vreg), \
  112. .vsel_mask = (_vmask), \
  113. .enable_reg = (_ereg), \
  114. .enable_mask = (_emask), \
  115. .linear_ranges = (_ranges), \
  116. .n_linear_ranges = ARRAY_SIZE(_ranges), \
  117. .ops = &axp20x_ops_range, \
  118. }
  119. static const struct regulator_ops axp20x_ops_fixed = {
  120. .list_voltage = regulator_list_voltage_linear,
  121. };
  122. static const struct regulator_ops axp20x_ops_range = {
  123. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  124. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  125. .list_voltage = regulator_list_voltage_linear_range,
  126. .enable = regulator_enable_regmap,
  127. .disable = regulator_disable_regmap,
  128. .is_enabled = regulator_is_enabled_regmap,
  129. };
  130. static const struct regulator_ops axp20x_ops = {
  131. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  132. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  133. .list_voltage = regulator_list_voltage_linear,
  134. .enable = regulator_enable_regmap,
  135. .disable = regulator_disable_regmap,
  136. .is_enabled = regulator_is_enabled_regmap,
  137. };
  138. static const struct regulator_ops axp20x_ops_sw = {
  139. .enable = regulator_enable_regmap,
  140. .disable = regulator_disable_regmap,
  141. .is_enabled = regulator_is_enabled_regmap,
  142. };
  143. static const struct regulator_linear_range axp20x_ldo4_ranges[] = {
  144. REGULATOR_LINEAR_RANGE(1250000, 0x0, 0x0, 0),
  145. REGULATOR_LINEAR_RANGE(1300000, 0x1, 0x8, 100000),
  146. REGULATOR_LINEAR_RANGE(2500000, 0x9, 0x9, 0),
  147. REGULATOR_LINEAR_RANGE(2700000, 0xa, 0xb, 100000),
  148. REGULATOR_LINEAR_RANGE(3000000, 0xc, 0xf, 100000),
  149. };
  150. static const struct regulator_desc axp20x_regulators[] = {
  151. AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
  152. AXP20X_DCDC2_V_OUT, 0x3f, AXP20X_PWR_OUT_CTRL, 0x10),
  153. AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25,
  154. AXP20X_DCDC3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x02),
  155. AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300),
  156. AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100,
  157. AXP20X_LDO24_V_OUT, 0xf0, AXP20X_PWR_OUT_CTRL, 0x04),
  158. AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25,
  159. AXP20X_LDO3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x40),
  160. AXP_DESC_RANGES(AXP20X, LDO4, "ldo4", "ldo24in", axp20x_ldo4_ranges,
  161. 16, AXP20X_LDO24_V_OUT, 0x0f, AXP20X_PWR_OUT_CTRL,
  162. 0x08),
  163. AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100,
  164. AXP20X_LDO5_V_OUT, 0xf0, AXP20X_GPIO0_CTRL, 0x07,
  165. AXP20X_IO_ENABLED, AXP20X_IO_DISABLED),
  166. };
  167. static const struct regulator_desc axp22x_regulators[] = {
  168. AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
  169. AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)),
  170. AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
  171. AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)),
  172. AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
  173. AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
  174. AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20,
  175. AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(4)),
  176. AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
  177. AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
  178. /* secondary switchable output of DCDC1 */
  179. AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
  180. BIT(7)),
  181. /* LDO regulator internally chained to DCDC5 */
  182. AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
  183. AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
  184. AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
  185. AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
  186. AXP_DESC(AXP22X, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
  187. AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)),
  188. AXP_DESC(AXP22X, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
  189. AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
  190. AXP_DESC(AXP22X, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
  191. AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
  192. AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
  193. AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)),
  194. AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
  195. AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
  196. AXP_DESC(AXP22X, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
  197. AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
  198. AXP_DESC(AXP22X, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
  199. AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
  200. AXP_DESC(AXP22X, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
  201. AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
  202. AXP_DESC(AXP22X, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
  203. AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
  204. /* Note the datasheet only guarantees reliable operation up to
  205. * 3.3V, this needs to be enforced via dts provided constraints */
  206. AXP_DESC_IO(AXP22X, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
  207. AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
  208. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  209. /* Note the datasheet only guarantees reliable operation up to
  210. * 3.3V, this needs to be enforced via dts provided constraints */
  211. AXP_DESC_IO(AXP22X, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
  212. AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
  213. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  214. AXP_DESC_FIXED(AXP22X, RTC_LDO, "rtc_ldo", "ips", 3000),
  215. };
  216. static const struct regulator_desc axp22x_drivevbus_regulator = {
  217. .name = "drivevbus",
  218. .supply_name = "drivevbus",
  219. .of_match = of_match_ptr("drivevbus"),
  220. .regulators_node = of_match_ptr("regulators"),
  221. .type = REGULATOR_VOLTAGE,
  222. .owner = THIS_MODULE,
  223. .enable_reg = AXP20X_VBUS_IPSOUT_MGMT,
  224. .enable_mask = BIT(2),
  225. .ops = &axp20x_ops_sw,
  226. };
  227. /* DCDC ranges shared with AXP813 */
  228. static const struct regulator_linear_range axp803_dcdc234_ranges[] = {
  229. REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
  230. REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x4b, 20000),
  231. };
  232. static const struct regulator_linear_range axp803_dcdc5_ranges[] = {
  233. REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 10000),
  234. REGULATOR_LINEAR_RANGE(1140000, 0x21, 0x44, 20000),
  235. };
  236. static const struct regulator_linear_range axp803_dcdc6_ranges[] = {
  237. REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
  238. REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
  239. };
  240. /* AXP806's CLDO2 and AXP809's DLDO1 shares the same range */
  241. static const struct regulator_linear_range axp803_dldo2_ranges[] = {
  242. REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1a, 100000),
  243. REGULATOR_LINEAR_RANGE(3400000, 0x1b, 0x1f, 200000),
  244. };
  245. static const struct regulator_desc axp803_regulators[] = {
  246. AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
  247. AXP803_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(0)),
  248. AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2", axp803_dcdc234_ranges,
  249. 76, AXP803_DCDC2_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  250. BIT(1)),
  251. AXP_DESC_RANGES(AXP803, DCDC3, "dcdc3", "vin3", axp803_dcdc234_ranges,
  252. 76, AXP803_DCDC3_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  253. BIT(2)),
  254. AXP_DESC_RANGES(AXP803, DCDC4, "dcdc4", "vin4", axp803_dcdc234_ranges,
  255. 76, AXP803_DCDC4_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  256. BIT(3)),
  257. AXP_DESC_RANGES(AXP803, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
  258. 68, AXP803_DCDC5_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  259. BIT(4)),
  260. AXP_DESC_RANGES(AXP803, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
  261. 72, AXP803_DCDC6_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  262. BIT(5)),
  263. /* secondary switchable output of DCDC1 */
  264. AXP_DESC_SW(AXP803, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
  265. BIT(7)),
  266. AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
  267. AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
  268. AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
  269. AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
  270. AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
  271. AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
  272. AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
  273. AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
  274. AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
  275. 32, AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
  276. BIT(4)),
  277. AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
  278. AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
  279. AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
  280. AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
  281. AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
  282. AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
  283. AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
  284. AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
  285. AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
  286. AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
  287. AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
  288. AXP803_FLDO1_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(2)),
  289. AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
  290. AXP803_FLDO2_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(3)),
  291. AXP_DESC_IO(AXP803, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100,
  292. AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
  293. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  294. AXP_DESC_IO(AXP803, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100,
  295. AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
  296. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  297. AXP_DESC_FIXED(AXP803, RTC_LDO, "rtc-ldo", "ips", 3000),
  298. };
  299. static const struct regulator_linear_range axp806_dcdca_ranges[] = {
  300. REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
  301. REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
  302. };
  303. static const struct regulator_linear_range axp806_dcdcd_ranges[] = {
  304. REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2d, 20000),
  305. REGULATOR_LINEAR_RANGE(1600000, 0x2e, 0x3f, 100000),
  306. };
  307. static const struct regulator_desc axp806_regulators[] = {
  308. AXP_DESC_RANGES(AXP806, DCDCA, "dcdca", "vina", axp806_dcdca_ranges,
  309. 72, AXP806_DCDCA_V_CTRL, 0x7f, AXP806_PWR_OUT_CTRL1,
  310. BIT(0)),
  311. AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50,
  312. AXP806_DCDCB_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(1)),
  313. AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc", axp806_dcdca_ranges,
  314. 72, AXP806_DCDCC_V_CTRL, 0x7f, AXP806_PWR_OUT_CTRL1,
  315. BIT(2)),
  316. AXP_DESC_RANGES(AXP806, DCDCD, "dcdcd", "vind", axp806_dcdcd_ranges,
  317. 64, AXP806_DCDCD_V_CTRL, 0x3f, AXP806_PWR_OUT_CTRL1,
  318. BIT(3)),
  319. AXP_DESC(AXP806, DCDCE, "dcdce", "vine", 1100, 3400, 100,
  320. AXP806_DCDCE_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(4)),
  321. AXP_DESC(AXP806, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
  322. AXP806_ALDO1_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(5)),
  323. AXP_DESC(AXP806, ALDO2, "aldo2", "aldoin", 700, 3400, 100,
  324. AXP806_ALDO2_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(6)),
  325. AXP_DESC(AXP806, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
  326. AXP806_ALDO3_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(7)),
  327. AXP_DESC(AXP806, BLDO1, "bldo1", "bldoin", 700, 1900, 100,
  328. AXP806_BLDO1_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(0)),
  329. AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100,
  330. AXP806_BLDO2_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(1)),
  331. AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100,
  332. AXP806_BLDO3_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(2)),
  333. AXP_DESC(AXP806, BLDO4, "bldo4", "bldoin", 700, 1900, 100,
  334. AXP806_BLDO4_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(3)),
  335. AXP_DESC(AXP806, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
  336. AXP806_CLDO1_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2, BIT(4)),
  337. AXP_DESC_RANGES(AXP806, CLDO2, "cldo2", "cldoin", axp803_dldo2_ranges,
  338. 32, AXP806_CLDO2_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2,
  339. BIT(5)),
  340. AXP_DESC(AXP806, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
  341. AXP806_CLDO3_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2, BIT(6)),
  342. AXP_DESC_SW(AXP806, SW, "sw", "swin", AXP806_PWR_OUT_CTRL2, BIT(7)),
  343. };
  344. static const struct regulator_linear_range axp809_dcdc4_ranges[] = {
  345. REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2f, 20000),
  346. REGULATOR_LINEAR_RANGE(1800000, 0x30, 0x38, 100000),
  347. };
  348. static const struct regulator_desc axp809_regulators[] = {
  349. AXP_DESC(AXP809, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
  350. AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)),
  351. AXP_DESC(AXP809, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
  352. AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)),
  353. AXP_DESC(AXP809, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
  354. AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
  355. AXP_DESC_RANGES(AXP809, DCDC4, "dcdc4", "vin4", axp809_dcdc4_ranges,
  356. 57, AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1,
  357. BIT(4)),
  358. AXP_DESC(AXP809, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
  359. AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
  360. /* secondary switchable output of DCDC1 */
  361. AXP_DESC_SW(AXP809, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
  362. BIT(7)),
  363. /* LDO regulator internally chained to DCDC5 */
  364. AXP_DESC(AXP809, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
  365. AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
  366. AXP_DESC(AXP809, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
  367. AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
  368. AXP_DESC(AXP809, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
  369. AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)),
  370. AXP_DESC(AXP809, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
  371. AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
  372. AXP_DESC_RANGES(AXP809, DLDO1, "dldo1", "dldoin", axp803_dldo2_ranges,
  373. 32, AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
  374. BIT(3)),
  375. AXP_DESC(AXP809, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
  376. AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)),
  377. AXP_DESC(AXP809, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
  378. AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
  379. AXP_DESC(AXP809, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
  380. AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
  381. AXP_DESC(AXP809, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
  382. AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
  383. /*
  384. * Note the datasheet only guarantees reliable operation up to
  385. * 3.3V, this needs to be enforced via dts provided constraints
  386. */
  387. AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
  388. AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
  389. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  390. /*
  391. * Note the datasheet only guarantees reliable operation up to
  392. * 3.3V, this needs to be enforced via dts provided constraints
  393. */
  394. AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
  395. AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
  396. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  397. AXP_DESC_FIXED(AXP809, RTC_LDO, "rtc_ldo", "ips", 1800),
  398. AXP_DESC_SW(AXP809, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(6)),
  399. };
  400. static const struct regulator_desc axp813_regulators[] = {
  401. AXP_DESC(AXP813, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
  402. AXP803_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(0)),
  403. AXP_DESC_RANGES(AXP813, DCDC2, "dcdc2", "vin2", axp803_dcdc234_ranges,
  404. 76, AXP803_DCDC2_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  405. BIT(1)),
  406. AXP_DESC_RANGES(AXP813, DCDC3, "dcdc3", "vin3", axp803_dcdc234_ranges,
  407. 76, AXP803_DCDC3_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  408. BIT(2)),
  409. AXP_DESC_RANGES(AXP813, DCDC4, "dcdc4", "vin4", axp803_dcdc234_ranges,
  410. 76, AXP803_DCDC4_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  411. BIT(3)),
  412. AXP_DESC_RANGES(AXP813, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
  413. 68, AXP803_DCDC5_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  414. BIT(4)),
  415. AXP_DESC_RANGES(AXP813, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
  416. 72, AXP803_DCDC6_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  417. BIT(5)),
  418. AXP_DESC_RANGES(AXP813, DCDC7, "dcdc7", "vin7", axp803_dcdc6_ranges,
  419. 72, AXP813_DCDC7_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
  420. BIT(6)),
  421. AXP_DESC(AXP813, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
  422. AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
  423. AXP_DESC(AXP813, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
  424. AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
  425. AXP_DESC(AXP813, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
  426. AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
  427. AXP_DESC(AXP813, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
  428. AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
  429. AXP_DESC_RANGES(AXP813, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
  430. 32, AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
  431. BIT(4)),
  432. AXP_DESC(AXP813, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
  433. AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
  434. AXP_DESC(AXP813, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
  435. AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
  436. AXP_DESC(AXP813, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
  437. AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
  438. AXP_DESC(AXP813, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
  439. AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
  440. AXP_DESC(AXP813, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
  441. AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
  442. /* to do / check ... */
  443. AXP_DESC(AXP813, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
  444. AXP803_FLDO1_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(2)),
  445. AXP_DESC(AXP813, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
  446. AXP803_FLDO2_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(3)),
  447. /*
  448. * TODO: FLDO3 = {DCDC5, FLDOIN} / 2
  449. *
  450. * This means FLDO3 effectively switches supplies at runtime,
  451. * something the regulator subsystem does not support.
  452. */
  453. AXP_DESC_FIXED(AXP813, RTC_LDO, "rtc-ldo", "ips", 1800),
  454. AXP_DESC_IO(AXP813, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100,
  455. AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
  456. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  457. AXP_DESC_IO(AXP813, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100,
  458. AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
  459. AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
  460. AXP_DESC_SW(AXP813, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(7)),
  461. };
  462. static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
  463. {
  464. struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
  465. unsigned int reg = AXP20X_DCDC_FREQ;
  466. u32 min, max, def, step;
  467. switch (axp20x->variant) {
  468. case AXP202_ID:
  469. case AXP209_ID:
  470. min = 750;
  471. max = 1875;
  472. def = 1500;
  473. step = 75;
  474. break;
  475. case AXP803_ID:
  476. case AXP813_ID:
  477. /*
  478. * AXP803/AXP813 DCDC work frequency setting has the same
  479. * range and step as AXP22X, but at a different register.
  480. * Fall through to the check below.
  481. * (See include/linux/mfd/axp20x.h)
  482. */
  483. reg = AXP803_DCDC_FREQ_CTRL;
  484. case AXP806_ID:
  485. /*
  486. * AXP806 also have DCDC work frequency setting register at a
  487. * different position.
  488. */
  489. if (axp20x->variant == AXP806_ID)
  490. reg = AXP806_DCDC_FREQ_CTRL;
  491. case AXP221_ID:
  492. case AXP223_ID:
  493. case AXP809_ID:
  494. min = 1800;
  495. max = 4050;
  496. def = 3000;
  497. step = 150;
  498. break;
  499. default:
  500. dev_err(&pdev->dev,
  501. "Setting DCDC frequency for unsupported AXP variant\n");
  502. return -EINVAL;
  503. }
  504. if (dcdcfreq == 0)
  505. dcdcfreq = def;
  506. if (dcdcfreq < min) {
  507. dcdcfreq = min;
  508. dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n",
  509. min);
  510. }
  511. if (dcdcfreq > max) {
  512. dcdcfreq = max;
  513. dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n",
  514. max);
  515. }
  516. dcdcfreq = (dcdcfreq - min) / step;
  517. return regmap_update_bits(axp20x->regmap, reg,
  518. AXP20X_FREQ_DCDC_MASK, dcdcfreq);
  519. }
  520. static int axp20x_regulator_parse_dt(struct platform_device *pdev)
  521. {
  522. struct device_node *np, *regulators;
  523. int ret = 0;
  524. u32 dcdcfreq = 0;
  525. np = of_node_get(pdev->dev.parent->of_node);
  526. if (!np)
  527. return 0;
  528. regulators = of_get_child_by_name(np, "regulators");
  529. if (!regulators) {
  530. dev_warn(&pdev->dev, "regulators node not found\n");
  531. } else {
  532. of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq);
  533. ret = axp20x_set_dcdc_freq(pdev, dcdcfreq);
  534. if (ret < 0) {
  535. dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret);
  536. }
  537. of_node_put(regulators);
  538. }
  539. of_node_put(np);
  540. return ret;
  541. }
  542. static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode)
  543. {
  544. struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
  545. unsigned int reg = AXP20X_DCDC_MODE;
  546. unsigned int mask;
  547. switch (axp20x->variant) {
  548. case AXP202_ID:
  549. case AXP209_ID:
  550. if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3))
  551. return -EINVAL;
  552. mask = AXP20X_WORKMODE_DCDC2_MASK;
  553. if (id == AXP20X_DCDC3)
  554. mask = AXP20X_WORKMODE_DCDC3_MASK;
  555. workmode <<= ffs(mask) - 1;
  556. break;
  557. case AXP806_ID:
  558. reg = AXP806_DCDC_MODE_CTRL2;
  559. /*
  560. * AXP806 DCDC regulator IDs have the same range as AXP22X.
  561. * Fall through to the check below.
  562. * (See include/linux/mfd/axp20x.h)
  563. */
  564. case AXP221_ID:
  565. case AXP223_ID:
  566. case AXP809_ID:
  567. if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5)
  568. return -EINVAL;
  569. mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1);
  570. workmode <<= id - AXP22X_DCDC1;
  571. break;
  572. case AXP803_ID:
  573. if (id < AXP803_DCDC1 || id > AXP803_DCDC6)
  574. return -EINVAL;
  575. mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP803_DCDC1);
  576. workmode <<= id - AXP803_DCDC1;
  577. break;
  578. case AXP813_ID:
  579. if (id < AXP813_DCDC1 || id > AXP813_DCDC7)
  580. return -EINVAL;
  581. mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP813_DCDC1);
  582. workmode <<= id - AXP813_DCDC1;
  583. break;
  584. default:
  585. /* should not happen */
  586. WARN_ON(1);
  587. return -EINVAL;
  588. }
  589. return regmap_update_bits(rdev->regmap, reg, mask, workmode);
  590. }
  591. /*
  592. * This function checks whether a regulator is part of a poly-phase
  593. * output setup based on the registers settings. Returns true if it is.
  594. */
  595. static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
  596. {
  597. u32 reg = 0;
  598. /*
  599. * Currently in our supported AXP variants, only AXP803, AXP806,
  600. * and AXP813 have polyphase regulators.
  601. */
  602. switch (axp20x->variant) {
  603. case AXP803_ID:
  604. case AXP813_ID:
  605. regmap_read(axp20x->regmap, AXP803_POLYPHASE_CTRL, &reg);
  606. switch (id) {
  607. case AXP803_DCDC3:
  608. return !!(reg & BIT(6));
  609. case AXP803_DCDC6:
  610. return !!(reg & BIT(5));
  611. }
  612. break;
  613. case AXP806_ID:
  614. regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
  615. switch (id) {
  616. case AXP806_DCDCB:
  617. return (((reg & GENMASK(7, 6)) == BIT(6)) ||
  618. ((reg & GENMASK(7, 6)) == BIT(7)));
  619. case AXP806_DCDCC:
  620. return ((reg & GENMASK(7, 6)) == BIT(7));
  621. case AXP806_DCDCE:
  622. return !!(reg & BIT(5));
  623. }
  624. break;
  625. default:
  626. return false;
  627. }
  628. return false;
  629. }
  630. static int axp20x_regulator_probe(struct platform_device *pdev)
  631. {
  632. struct regulator_dev *rdev;
  633. struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
  634. const struct regulator_desc *regulators;
  635. struct regulator_config config = {
  636. .dev = pdev->dev.parent,
  637. .regmap = axp20x->regmap,
  638. .driver_data = axp20x,
  639. };
  640. int ret, i, nregulators;
  641. u32 workmode;
  642. const char *dcdc1_name = axp22x_regulators[AXP22X_DCDC1].name;
  643. const char *dcdc5_name = axp22x_regulators[AXP22X_DCDC5].name;
  644. bool drivevbus = false;
  645. switch (axp20x->variant) {
  646. case AXP202_ID:
  647. case AXP209_ID:
  648. regulators = axp20x_regulators;
  649. nregulators = AXP20X_REG_ID_MAX;
  650. break;
  651. case AXP221_ID:
  652. case AXP223_ID:
  653. regulators = axp22x_regulators;
  654. nregulators = AXP22X_REG_ID_MAX;
  655. drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
  656. "x-powers,drive-vbus-en");
  657. break;
  658. case AXP803_ID:
  659. regulators = axp803_regulators;
  660. nregulators = AXP803_REG_ID_MAX;
  661. drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
  662. "x-powers,drive-vbus-en");
  663. break;
  664. case AXP806_ID:
  665. regulators = axp806_regulators;
  666. nregulators = AXP806_REG_ID_MAX;
  667. break;
  668. case AXP809_ID:
  669. regulators = axp809_regulators;
  670. nregulators = AXP809_REG_ID_MAX;
  671. break;
  672. case AXP813_ID:
  673. regulators = axp813_regulators;
  674. nregulators = AXP813_REG_ID_MAX;
  675. drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
  676. "x-powers,drive-vbus-en");
  677. break;
  678. default:
  679. dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
  680. axp20x->variant);
  681. return -EINVAL;
  682. }
  683. /* This only sets the dcdc freq. Ignore any errors */
  684. axp20x_regulator_parse_dt(pdev);
  685. for (i = 0; i < nregulators; i++) {
  686. const struct regulator_desc *desc = &regulators[i];
  687. struct regulator_desc *new_desc;
  688. /*
  689. * If this regulator is a slave in a poly-phase setup,
  690. * skip it, as its controls are bound to the master
  691. * regulator and won't work.
  692. */
  693. if (axp20x_is_polyphase_slave(axp20x, i))
  694. continue;
  695. /* Support for AXP813's FLDO3 is not implemented */
  696. if (axp20x->variant == AXP813_ID && i == AXP813_FLDO3)
  697. continue;
  698. /*
  699. * Regulators DC1SW and DC5LDO are connected internally,
  700. * so we have to handle their supply names separately.
  701. *
  702. * We always register the regulators in proper sequence,
  703. * so the supply names are correctly read. See the last
  704. * part of this loop to see where we save the DT defined
  705. * name.
  706. */
  707. if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
  708. (regulators == axp803_regulators && i == AXP803_DC1SW) ||
  709. (regulators == axp809_regulators && i == AXP809_DC1SW)) {
  710. new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
  711. GFP_KERNEL);
  712. if (!new_desc)
  713. return -ENOMEM;
  714. *new_desc = regulators[i];
  715. new_desc->supply_name = dcdc1_name;
  716. desc = new_desc;
  717. }
  718. if ((regulators == axp22x_regulators && i == AXP22X_DC5LDO) ||
  719. (regulators == axp809_regulators && i == AXP809_DC5LDO)) {
  720. new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
  721. GFP_KERNEL);
  722. if (!new_desc)
  723. return -ENOMEM;
  724. *new_desc = regulators[i];
  725. new_desc->supply_name = dcdc5_name;
  726. desc = new_desc;
  727. }
  728. rdev = devm_regulator_register(&pdev->dev, desc, &config);
  729. if (IS_ERR(rdev)) {
  730. dev_err(&pdev->dev, "Failed to register %s\n",
  731. regulators[i].name);
  732. return PTR_ERR(rdev);
  733. }
  734. ret = of_property_read_u32(rdev->dev.of_node,
  735. "x-powers,dcdc-workmode",
  736. &workmode);
  737. if (!ret) {
  738. if (axp20x_set_dcdc_workmode(rdev, i, workmode))
  739. dev_err(&pdev->dev, "Failed to set workmode on %s\n",
  740. rdev->desc->name);
  741. }
  742. /*
  743. * Save AXP22X DCDC1 / DCDC5 regulator names for later.
  744. */
  745. if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) ||
  746. (regulators == axp809_regulators && i == AXP809_DCDC1))
  747. of_property_read_string(rdev->dev.of_node,
  748. "regulator-name",
  749. &dcdc1_name);
  750. if ((regulators == axp22x_regulators && i == AXP22X_DCDC5) ||
  751. (regulators == axp809_regulators && i == AXP809_DCDC5))
  752. of_property_read_string(rdev->dev.of_node,
  753. "regulator-name",
  754. &dcdc5_name);
  755. }
  756. if (drivevbus) {
  757. /* Change N_VBUSEN sense pin to DRIVEVBUS output pin */
  758. regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP,
  759. AXP22X_MISC_N_VBUSEN_FUNC, 0);
  760. rdev = devm_regulator_register(&pdev->dev,
  761. &axp22x_drivevbus_regulator,
  762. &config);
  763. if (IS_ERR(rdev)) {
  764. dev_err(&pdev->dev, "Failed to register drivevbus\n");
  765. return PTR_ERR(rdev);
  766. }
  767. }
  768. return 0;
  769. }
  770. static struct platform_driver axp20x_regulator_driver = {
  771. .probe = axp20x_regulator_probe,
  772. .driver = {
  773. .name = "axp20x-regulator",
  774. },
  775. };
  776. module_platform_driver(axp20x_regulator_driver);
  777. MODULE_LICENSE("GPL v2");
  778. MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
  779. MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC");
  780. MODULE_ALIAS("platform:axp20x-regulator");