nsp32.c 88 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/module.h>
  26. #include <linux/init.h>
  27. #include <linux/kernel.h>
  28. #include <linux/string.h>
  29. #include <linux/timer.h>
  30. #include <linux/ioport.h>
  31. #include <linux/major.h>
  32. #include <linux/blkdev.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/delay.h>
  36. #include <linux/ctype.h>
  37. #include <linux/dma-mapping.h>
  38. #include <asm/dma.h>
  39. #include <asm/io.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_ioctl.h>
  45. #include "nsp32.h"
  46. /***********************************************************************
  47. * Module parameters
  48. */
  49. static int trans_mode = 0; /* default: BIOS */
  50. module_param (trans_mode, int, 0);
  51. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  52. #define ASYNC_MODE 1
  53. #define ULTRA20M_MODE 2
  54. static bool auto_param = 0; /* default: ON */
  55. module_param (auto_param, bool, 0);
  56. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  57. static bool disc_priv = 1; /* default: OFF */
  58. module_param (disc_priv, bool, 0);
  59. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  60. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  61. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  62. MODULE_LICENSE("GPL");
  63. static const char *nsp32_release_version = "1.2";
  64. /****************************************************************************
  65. * Supported hardware
  66. */
  67. static struct pci_device_id nsp32_pci_table[] = {
  68. {
  69. .vendor = PCI_VENDOR_ID_IODATA,
  70. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  71. .subvendor = PCI_ANY_ID,
  72. .subdevice = PCI_ANY_ID,
  73. .driver_data = MODEL_IODATA,
  74. },
  75. {
  76. .vendor = PCI_VENDOR_ID_WORKBIT,
  77. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  78. .subvendor = PCI_ANY_ID,
  79. .subdevice = PCI_ANY_ID,
  80. .driver_data = MODEL_KME,
  81. },
  82. {
  83. .vendor = PCI_VENDOR_ID_WORKBIT,
  84. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  85. .subvendor = PCI_ANY_ID,
  86. .subdevice = PCI_ANY_ID,
  87. .driver_data = MODEL_WORKBIT,
  88. },
  89. {
  90. .vendor = PCI_VENDOR_ID_WORKBIT,
  91. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  92. .subvendor = PCI_ANY_ID,
  93. .subdevice = PCI_ANY_ID,
  94. .driver_data = MODEL_PCI_WORKBIT,
  95. },
  96. {
  97. .vendor = PCI_VENDOR_ID_WORKBIT,
  98. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  99. .subvendor = PCI_ANY_ID,
  100. .subdevice = PCI_ANY_ID,
  101. .driver_data = MODEL_LOGITEC,
  102. },
  103. {
  104. .vendor = PCI_VENDOR_ID_WORKBIT,
  105. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  106. .subvendor = PCI_ANY_ID,
  107. .subdevice = PCI_ANY_ID,
  108. .driver_data = MODEL_PCI_LOGITEC,
  109. },
  110. {
  111. .vendor = PCI_VENDOR_ID_WORKBIT,
  112. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  113. .subvendor = PCI_ANY_ID,
  114. .subdevice = PCI_ANY_ID,
  115. .driver_data = MODEL_PCI_MELCO,
  116. },
  117. {
  118. .vendor = PCI_VENDOR_ID_WORKBIT,
  119. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  120. .subvendor = PCI_ANY_ID,
  121. .subdevice = PCI_ANY_ID,
  122. .driver_data = MODEL_PCI_MELCO,
  123. },
  124. {0,0,},
  125. };
  126. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  127. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  128. /*
  129. * Period/AckWidth speed conversion table
  130. *
  131. * Note: This period/ackwidth speed table must be in descending order.
  132. */
  133. static nsp32_sync_table nsp32_sync_table_40M[] = {
  134. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  135. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  136. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  137. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  138. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  139. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  140. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  141. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  142. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  143. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  144. };
  145. static nsp32_sync_table nsp32_sync_table_20M[] = {
  146. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  147. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  148. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  149. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  150. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  151. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  152. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  153. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  154. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  155. };
  156. static nsp32_sync_table nsp32_sync_table_pci[] = {
  157. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  158. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  159. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  160. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  161. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  162. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  163. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  164. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  165. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  166. };
  167. /*
  168. * function declaration
  169. */
  170. /* module entry point */
  171. static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  172. static void nsp32_remove(struct pci_dev *);
  173. static int __init init_nsp32 (void);
  174. static void __exit exit_nsp32 (void);
  175. /* struct struct scsi_host_template */
  176. static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
  177. static int nsp32_detect (struct pci_dev *pdev);
  178. static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
  179. static const char *nsp32_info (struct Scsi_Host *);
  180. static int nsp32_release (struct Scsi_Host *);
  181. /* SCSI error handler */
  182. static int nsp32_eh_abort (struct scsi_cmnd *);
  183. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  184. /* generate SCSI message */
  185. static void nsp32_build_identify(struct scsi_cmnd *);
  186. static void nsp32_build_nop (struct scsi_cmnd *);
  187. static void nsp32_build_reject (struct scsi_cmnd *);
  188. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  189. /* SCSI message handler */
  190. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  191. static void nsp32_msgout_occur (struct scsi_cmnd *);
  192. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  193. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  194. static int nsp32_selection_autopara(struct scsi_cmnd *);
  195. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  196. static void nsp32_scsi_done (struct scsi_cmnd *);
  197. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  198. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  199. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  200. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  201. /* SCSI SDTR */
  202. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  203. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  204. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  205. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  206. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  207. /* SCSI bus status handler */
  208. static void nsp32_wait_req (nsp32_hw_data *, int);
  209. static void nsp32_wait_sack (nsp32_hw_data *, int);
  210. static void nsp32_sack_assert (nsp32_hw_data *);
  211. static void nsp32_sack_negate (nsp32_hw_data *);
  212. static void nsp32_do_bus_reset(nsp32_hw_data *);
  213. /* hardware interrupt handler */
  214. static irqreturn_t do_nsp32_isr(int, void *);
  215. /* initialize hardware */
  216. static int nsp32hw_init(nsp32_hw_data *);
  217. /* EEPROM handler */
  218. static int nsp32_getprom_param (nsp32_hw_data *);
  219. static int nsp32_getprom_at24 (nsp32_hw_data *);
  220. static int nsp32_getprom_c16 (nsp32_hw_data *);
  221. static void nsp32_prom_start (nsp32_hw_data *);
  222. static void nsp32_prom_stop (nsp32_hw_data *);
  223. static int nsp32_prom_read (nsp32_hw_data *, int);
  224. static int nsp32_prom_read_bit (nsp32_hw_data *);
  225. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  226. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  227. static int nsp32_prom_get (nsp32_hw_data *, int);
  228. /* debug/warning/info message */
  229. static void nsp32_message (const char *, int, char *, char *, ...);
  230. #ifdef NSP32_DEBUG
  231. static void nsp32_dmessage(const char *, int, int, char *, ...);
  232. #endif
  233. /*
  234. * max_sectors is currently limited up to 128.
  235. */
  236. static struct scsi_host_template nsp32_template = {
  237. .proc_name = "nsp32",
  238. .name = "Workbit NinjaSCSI-32Bi/UDE",
  239. .show_info = nsp32_show_info,
  240. .info = nsp32_info,
  241. .queuecommand = nsp32_queuecommand,
  242. .can_queue = 1,
  243. .sg_tablesize = NSP32_SG_SIZE,
  244. .max_sectors = 128,
  245. .this_id = NSP32_HOST_SCSIID,
  246. .use_clustering = DISABLE_CLUSTERING,
  247. .eh_abort_handler = nsp32_eh_abort,
  248. .eh_host_reset_handler = nsp32_eh_host_reset,
  249. /* .highmem_io = 1, */
  250. };
  251. #include "nsp32_io.h"
  252. /***********************************************************************
  253. * debug, error print
  254. */
  255. #ifndef NSP32_DEBUG
  256. # define NSP32_DEBUG_MASK 0x000000
  257. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  258. # define nsp32_dbg(mask, args...) /* */
  259. #else
  260. # define NSP32_DEBUG_MASK 0xffffff
  261. # define nsp32_msg(type, args...) \
  262. nsp32_message (__func__, __LINE__, (type), args)
  263. # define nsp32_dbg(mask, args...) \
  264. nsp32_dmessage(__func__, __LINE__, (mask), args)
  265. #endif
  266. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  267. #define NSP32_DEBUG_REGISTER BIT(1)
  268. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  269. #define NSP32_DEBUG_INTR BIT(3)
  270. #define NSP32_DEBUG_SGLIST BIT(4)
  271. #define NSP32_DEBUG_BUSFREE BIT(5)
  272. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  273. #define NSP32_DEBUG_RESELECTION BIT(7)
  274. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  275. #define NSP32_DEBUG_EEPROM BIT(9)
  276. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  277. #define NSP32_DEBUG_BUSRESET BIT(11)
  278. #define NSP32_DEBUG_RESTART BIT(12)
  279. #define NSP32_DEBUG_SYNC BIT(13)
  280. #define NSP32_DEBUG_WAIT BIT(14)
  281. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  282. #define NSP32_DEBUG_PROC BIT(16)
  283. #define NSP32_DEBUG_INIT BIT(17)
  284. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  285. #define NSP32_DEBUG_BUF_LEN 100
  286. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  287. {
  288. va_list args;
  289. char buf[NSP32_DEBUG_BUF_LEN];
  290. va_start(args, fmt);
  291. vsnprintf(buf, sizeof(buf), fmt, args);
  292. va_end(args);
  293. #ifndef NSP32_DEBUG
  294. printk("%snsp32: %s\n", type, buf);
  295. #else
  296. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  297. #endif
  298. }
  299. #ifdef NSP32_DEBUG
  300. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  301. {
  302. va_list args;
  303. char buf[NSP32_DEBUG_BUF_LEN];
  304. va_start(args, fmt);
  305. vsnprintf(buf, sizeof(buf), fmt, args);
  306. va_end(args);
  307. if (mask & NSP32_DEBUG_MASK) {
  308. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  309. }
  310. }
  311. #endif
  312. #ifdef NSP32_DEBUG
  313. # include "nsp32_debug.c"
  314. #else
  315. # define show_command(arg) /* */
  316. # define show_busphase(arg) /* */
  317. # define show_autophase(arg) /* */
  318. #endif
  319. /*
  320. * IDENTIFY Message
  321. */
  322. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  323. {
  324. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  325. int pos = data->msgout_len;
  326. int mode = FALSE;
  327. /* XXX: Auto DiscPriv detection is progressing... */
  328. if (disc_priv == 0) {
  329. /* mode = TRUE; */
  330. }
  331. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  332. data->msgout_len = pos;
  333. }
  334. /*
  335. * SDTR Message Routine
  336. */
  337. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  338. unsigned char period,
  339. unsigned char offset)
  340. {
  341. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  342. int pos = data->msgout_len;
  343. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  344. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  345. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  346. data->msgoutbuf[pos] = period; pos++;
  347. data->msgoutbuf[pos] = offset; pos++;
  348. data->msgout_len = pos;
  349. }
  350. /*
  351. * No Operation Message
  352. */
  353. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  354. {
  355. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  356. int pos = data->msgout_len;
  357. if (pos != 0) {
  358. nsp32_msg(KERN_WARNING,
  359. "Some messages are already contained!");
  360. return;
  361. }
  362. data->msgoutbuf[pos] = NOP; pos++;
  363. data->msgout_len = pos;
  364. }
  365. /*
  366. * Reject Message
  367. */
  368. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  369. {
  370. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  371. int pos = data->msgout_len;
  372. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  373. data->msgout_len = pos;
  374. }
  375. /*
  376. * timer
  377. */
  378. #if 0
  379. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  380. {
  381. unsigned int base = SCpnt->host->io_port;
  382. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  383. if (time & (~TIMER_CNT_MASK)) {
  384. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  385. }
  386. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  387. }
  388. #endif
  389. /*
  390. * set SCSI command and other parameter to asic, and start selection phase
  391. */
  392. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  393. {
  394. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  395. unsigned int base = SCpnt->device->host->io_port;
  396. unsigned int host_id = SCpnt->device->host->this_id;
  397. unsigned char target = scmd_id(SCpnt);
  398. nsp32_autoparam *param = data->autoparam;
  399. unsigned char phase;
  400. int i, ret;
  401. unsigned int msgout;
  402. u16_le s;
  403. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  404. /*
  405. * check bus free
  406. */
  407. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  408. if (phase != BUSMON_BUS_FREE) {
  409. nsp32_msg(KERN_WARNING, "bus busy");
  410. show_busphase(phase & BUSMON_PHASE_MASK);
  411. SCpnt->result = DID_BUS_BUSY << 16;
  412. return FALSE;
  413. }
  414. /*
  415. * message out
  416. *
  417. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  418. * over 3 messages needs another routine.
  419. */
  420. if (data->msgout_len == 0) {
  421. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  422. SCpnt->result = DID_ERROR << 16;
  423. return FALSE;
  424. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  425. msgout = 0;
  426. for (i = 0; i < data->msgout_len; i++) {
  427. /*
  428. * the sending order of the message is:
  429. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  430. * MCNT 2: MSG#1 -> MSG#2
  431. * MCNT 1: MSG#2
  432. */
  433. msgout >>= 8;
  434. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  435. }
  436. msgout |= MV_VALID; /* MV valid */
  437. msgout |= (unsigned int)data->msgout_len; /* len */
  438. } else {
  439. /* data->msgout_len > 3 */
  440. msgout = 0;
  441. }
  442. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  443. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  444. /*
  445. * setup asic parameter
  446. */
  447. memset(param, 0, sizeof(nsp32_autoparam));
  448. /* cdb */
  449. for (i = 0; i < SCpnt->cmd_len; i++) {
  450. param->cdb[4 * i] = SCpnt->cmnd[i];
  451. }
  452. /* outgoing messages */
  453. param->msgout = cpu_to_le32(msgout);
  454. /* syncreg, ackwidth, target id, SREQ sampling rate */
  455. param->syncreg = data->cur_target->syncreg;
  456. param->ackwidth = data->cur_target->ackwidth;
  457. param->target_id = BIT(host_id) | BIT(target);
  458. param->sample_reg = data->cur_target->sample_reg;
  459. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  460. /* command control */
  461. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  462. AUTOSCSI_START |
  463. AUTO_MSGIN_00_OR_04 |
  464. AUTO_MSGIN_02 |
  465. AUTO_ATN );
  466. /* transfer control */
  467. s = 0;
  468. switch (data->trans_method) {
  469. case NSP32_TRANSFER_BUSMASTER:
  470. s |= BM_START;
  471. break;
  472. case NSP32_TRANSFER_MMIO:
  473. s |= CB_MMIO_MODE;
  474. break;
  475. case NSP32_TRANSFER_PIO:
  476. s |= CB_IO_MODE;
  477. break;
  478. default:
  479. nsp32_msg(KERN_ERR, "unknown trans_method");
  480. break;
  481. }
  482. /*
  483. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  484. * For bus master transfer, it's taken off.
  485. */
  486. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  487. param->transfer_control = cpu_to_le16(s);
  488. /* sg table addr */
  489. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  490. /*
  491. * transfer parameter to ASIC
  492. */
  493. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  494. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  495. AUTO_PARAMETER );
  496. /*
  497. * Check arbitration
  498. */
  499. ret = nsp32_arbitration(SCpnt, base);
  500. return ret;
  501. }
  502. /*
  503. * Selection with AUTO SCSI (without AUTO PARAMETER)
  504. */
  505. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  506. {
  507. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  508. unsigned int base = SCpnt->device->host->io_port;
  509. unsigned int host_id = SCpnt->device->host->this_id;
  510. unsigned char target = scmd_id(SCpnt);
  511. unsigned char phase;
  512. int status;
  513. unsigned short command = 0;
  514. unsigned int msgout = 0;
  515. unsigned short execph;
  516. int i;
  517. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  518. /*
  519. * IRQ disable
  520. */
  521. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  522. /*
  523. * check bus line
  524. */
  525. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  526. if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
  527. nsp32_msg(KERN_WARNING, "bus busy");
  528. SCpnt->result = DID_BUS_BUSY << 16;
  529. status = 1;
  530. goto out;
  531. }
  532. /*
  533. * clear execph
  534. */
  535. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  536. /*
  537. * clear FIFO counter to set CDBs
  538. */
  539. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  540. /*
  541. * set CDB0 - CDB15
  542. */
  543. for (i = 0; i < SCpnt->cmd_len; i++) {
  544. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  545. }
  546. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  547. /*
  548. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  549. */
  550. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  551. /*
  552. * set SCSI MSGOUT REG
  553. *
  554. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  555. * over 3 messages needs another routine.
  556. */
  557. if (data->msgout_len == 0) {
  558. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  559. SCpnt->result = DID_ERROR << 16;
  560. status = 1;
  561. goto out;
  562. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  563. msgout = 0;
  564. for (i = 0; i < data->msgout_len; i++) {
  565. /*
  566. * the sending order of the message is:
  567. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  568. * MCNT 2: MSG#1 -> MSG#2
  569. * MCNT 1: MSG#2
  570. */
  571. msgout >>= 8;
  572. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  573. }
  574. msgout |= MV_VALID; /* MV valid */
  575. msgout |= (unsigned int)data->msgout_len; /* len */
  576. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  577. } else {
  578. /* data->msgout_len > 3 */
  579. nsp32_write4(base, SCSI_MSG_OUT, 0);
  580. }
  581. /*
  582. * set selection timeout(= 250ms)
  583. */
  584. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  585. /*
  586. * set SREQ hazard killer sampling rate
  587. *
  588. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  589. * check other internal clock!
  590. */
  591. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  592. /*
  593. * clear Arbit
  594. */
  595. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  596. /*
  597. * set SYNCREG
  598. * Don't set BM_START_ADR before setting this register.
  599. */
  600. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  601. /*
  602. * set ACKWIDTH
  603. */
  604. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  605. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  606. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  607. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  608. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  609. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  610. data->msgout_len, msgout);
  611. /*
  612. * set SGT ADDR (physical address)
  613. */
  614. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  615. /*
  616. * set TRANSFER CONTROL REG
  617. */
  618. command = 0;
  619. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  620. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  621. if (scsi_bufflen(SCpnt) > 0) {
  622. command |= BM_START;
  623. }
  624. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  625. command |= CB_MMIO_MODE;
  626. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  627. command |= CB_IO_MODE;
  628. }
  629. nsp32_write2(base, TRANSFER_CONTROL, command);
  630. /*
  631. * start AUTO SCSI, kick off arbitration
  632. */
  633. command = (CLEAR_CDB_FIFO_POINTER |
  634. AUTOSCSI_START |
  635. AUTO_MSGIN_00_OR_04 |
  636. AUTO_MSGIN_02 |
  637. AUTO_ATN );
  638. nsp32_write2(base, COMMAND_CONTROL, command);
  639. /*
  640. * Check arbitration
  641. */
  642. status = nsp32_arbitration(SCpnt, base);
  643. out:
  644. /*
  645. * IRQ enable
  646. */
  647. nsp32_write2(base, IRQ_CONTROL, 0);
  648. return status;
  649. }
  650. /*
  651. * Arbitration Status Check
  652. *
  653. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  654. * Using udelay(1) consumes CPU time and system time, but
  655. * arbitration delay time is defined minimal 2.4us in SCSI
  656. * specification, thus udelay works as coarse grained wait timer.
  657. */
  658. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  659. {
  660. unsigned char arbit;
  661. int status = TRUE;
  662. int time = 0;
  663. do {
  664. arbit = nsp32_read1(base, ARBIT_STATUS);
  665. time++;
  666. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  667. (time <= ARBIT_TIMEOUT_TIME));
  668. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  669. "arbit: 0x%x, delay time: %d", arbit, time);
  670. if (arbit & ARBIT_WIN) {
  671. /* Arbitration succeeded */
  672. SCpnt->result = DID_OK << 16;
  673. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  674. } else if (arbit & ARBIT_FAIL) {
  675. /* Arbitration failed */
  676. SCpnt->result = DID_BUS_BUSY << 16;
  677. status = FALSE;
  678. } else {
  679. /*
  680. * unknown error or ARBIT_GO timeout,
  681. * something lock up! guess no connection.
  682. */
  683. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  684. SCpnt->result = DID_NO_CONNECT << 16;
  685. status = FALSE;
  686. }
  687. /*
  688. * clear Arbit
  689. */
  690. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  691. return status;
  692. }
  693. /*
  694. * reselection
  695. *
  696. * Note: This reselection routine is called from msgin_occur,
  697. * reselection target id&lun must be already set.
  698. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  699. */
  700. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  701. {
  702. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  703. unsigned int host_id = SCpnt->device->host->this_id;
  704. unsigned int base = SCpnt->device->host->io_port;
  705. unsigned char tmpid, newid;
  706. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  707. /*
  708. * calculate reselected SCSI ID
  709. */
  710. tmpid = nsp32_read1(base, RESELECT_ID);
  711. tmpid &= (~BIT(host_id));
  712. newid = 0;
  713. while (tmpid) {
  714. if (tmpid & 1) {
  715. break;
  716. }
  717. tmpid >>= 1;
  718. newid++;
  719. }
  720. /*
  721. * If reselected New ID:LUN is not existed
  722. * or current nexus is not existed, unexpected
  723. * reselection is occurred. Send reject message.
  724. */
  725. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  726. nsp32_msg(KERN_WARNING, "unknown id/lun");
  727. return FALSE;
  728. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  729. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  730. return FALSE;
  731. }
  732. data->cur_id = newid;
  733. data->cur_lun = newlun;
  734. data->cur_target = &(data->target[newid]);
  735. data->cur_lunt = &(data->lunt[newid][newlun]);
  736. /* reset SACK/SavedACK counter (or ALL clear?) */
  737. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  738. return TRUE;
  739. }
  740. /*
  741. * nsp32_setup_sg_table - build scatter gather list for transfer data
  742. * with bus master.
  743. *
  744. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  745. */
  746. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  747. {
  748. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  749. struct scatterlist *sg;
  750. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  751. int num, i;
  752. u32_le l;
  753. if (sgt == NULL) {
  754. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  755. return FALSE;
  756. }
  757. num = scsi_dma_map(SCpnt);
  758. if (!num)
  759. return TRUE;
  760. else if (num < 0)
  761. return FALSE;
  762. else {
  763. scsi_for_each_sg(SCpnt, sg, num, i) {
  764. /*
  765. * Build nsp32_sglist, substitute sg dma addresses.
  766. */
  767. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  768. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  769. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  770. nsp32_msg(KERN_ERR,
  771. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  772. return FALSE;
  773. }
  774. nsp32_dbg(NSP32_DEBUG_SGLIST,
  775. "num 0x%x : addr 0x%lx len 0x%lx",
  776. i,
  777. le32_to_cpu(sgt[i].addr),
  778. le32_to_cpu(sgt[i].len ));
  779. }
  780. /* set end mark */
  781. l = le32_to_cpu(sgt[num-1].len);
  782. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  783. }
  784. return TRUE;
  785. }
  786. static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  787. {
  788. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  789. nsp32_target *target;
  790. nsp32_lunt *cur_lunt;
  791. int ret;
  792. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  793. "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
  794. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  795. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  796. scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
  797. if (data->CurrentSC != NULL) {
  798. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  799. data->CurrentSC = NULL;
  800. SCpnt->result = DID_NO_CONNECT << 16;
  801. done(SCpnt);
  802. return 0;
  803. }
  804. /* check target ID is not same as this initiator ID */
  805. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  806. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
  807. SCpnt->result = DID_BAD_TARGET << 16;
  808. done(SCpnt);
  809. return 0;
  810. }
  811. /* check target LUN is allowable value */
  812. if (SCpnt->device->lun >= MAX_LUN) {
  813. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  814. SCpnt->result = DID_BAD_TARGET << 16;
  815. done(SCpnt);
  816. return 0;
  817. }
  818. show_command(SCpnt);
  819. SCpnt->scsi_done = done;
  820. data->CurrentSC = SCpnt;
  821. SCpnt->SCp.Status = CHECK_CONDITION;
  822. SCpnt->SCp.Message = 0;
  823. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  824. SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
  825. SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
  826. SCpnt->SCp.buffer = NULL;
  827. SCpnt->SCp.buffers_residual = 0;
  828. /* initialize data */
  829. data->msgout_len = 0;
  830. data->msgin_len = 0;
  831. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  832. cur_lunt->SCpnt = SCpnt;
  833. cur_lunt->save_datp = 0;
  834. cur_lunt->msgin03 = FALSE;
  835. data->cur_lunt = cur_lunt;
  836. data->cur_id = SCpnt->device->id;
  837. data->cur_lun = SCpnt->device->lun;
  838. ret = nsp32_setup_sg_table(SCpnt);
  839. if (ret == FALSE) {
  840. nsp32_msg(KERN_ERR, "SGT fail");
  841. SCpnt->result = DID_ERROR << 16;
  842. nsp32_scsi_done(SCpnt);
  843. return 0;
  844. }
  845. /* Build IDENTIFY */
  846. nsp32_build_identify(SCpnt);
  847. /*
  848. * If target is the first time to transfer after the reset
  849. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  850. * message SDTR is needed to do synchronous transfer.
  851. */
  852. target = &data->target[scmd_id(SCpnt)];
  853. data->cur_target = target;
  854. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  855. unsigned char period, offset;
  856. if (trans_mode != ASYNC_MODE) {
  857. nsp32_set_max_sync(data, target, &period, &offset);
  858. nsp32_build_sdtr(SCpnt, period, offset);
  859. target->sync_flag |= SDTR_INITIATOR;
  860. } else {
  861. nsp32_set_async(data, target);
  862. target->sync_flag |= SDTR_DONE;
  863. }
  864. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  865. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  866. target->limit_entry, period, offset);
  867. } else if (target->sync_flag & SDTR_INITIATOR) {
  868. /*
  869. * It was negotiating SDTR with target, sending from the
  870. * initiator, but there are no chance to remove this flag.
  871. * Set async because we don't get proper negotiation.
  872. */
  873. nsp32_set_async(data, target);
  874. target->sync_flag &= ~SDTR_INITIATOR;
  875. target->sync_flag |= SDTR_DONE;
  876. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  877. "SDTR_INITIATOR: fall back to async");
  878. } else if (target->sync_flag & SDTR_TARGET) {
  879. /*
  880. * It was negotiating SDTR with target, sending from target,
  881. * but there are no chance to remove this flag. Set async
  882. * because we don't get proper negotiation.
  883. */
  884. nsp32_set_async(data, target);
  885. target->sync_flag &= ~SDTR_TARGET;
  886. target->sync_flag |= SDTR_DONE;
  887. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  888. "Unknown SDTR from target is reached, fall back to async.");
  889. }
  890. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  891. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  892. SCpnt->device->id, target->sync_flag, target->syncreg,
  893. target->ackwidth);
  894. /* Selection */
  895. if (auto_param == 0) {
  896. ret = nsp32_selection_autopara(SCpnt);
  897. } else {
  898. ret = nsp32_selection_autoscsi(SCpnt);
  899. }
  900. if (ret != TRUE) {
  901. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  902. nsp32_scsi_done(SCpnt);
  903. }
  904. return 0;
  905. }
  906. static DEF_SCSI_QCMD(nsp32_queuecommand)
  907. /* initialize asic */
  908. static int nsp32hw_init(nsp32_hw_data *data)
  909. {
  910. unsigned int base = data->BaseAddress;
  911. unsigned short irq_stat;
  912. unsigned long lc_reg;
  913. unsigned char power;
  914. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  915. if ((lc_reg & 0xff00) == 0) {
  916. lc_reg |= (0x20 << 8);
  917. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  918. }
  919. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  920. nsp32_write2(base, TRANSFER_CONTROL, 0);
  921. nsp32_write4(base, BM_CNT, 0);
  922. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  923. do {
  924. irq_stat = nsp32_read2(base, IRQ_STATUS);
  925. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  926. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  927. /*
  928. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  929. * designated by specification.
  930. */
  931. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  932. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  933. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  934. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  935. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  936. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  937. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  938. } else {
  939. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  940. }
  941. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  942. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  943. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  944. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  945. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  946. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  947. /*
  948. * initialize MISC_WRRD register
  949. *
  950. * Note: Designated parameters is obeyed as following:
  951. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  952. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  953. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  954. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  955. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  956. * MISC_DELAYED_BMSTART: It's selected for safety.
  957. *
  958. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  959. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  960. * appropriate value before restarting bus master transfer.
  961. */
  962. nsp32_index_write2(base, MISC_WR,
  963. (SCSI_DIRECTION_DETECTOR_SELECT |
  964. DELAYED_BMSTART |
  965. MASTER_TERMINATION_SELECT |
  966. BMREQ_NEGATE_TIMING_SEL |
  967. AUTOSEL_TIMING_SEL |
  968. BMSTOP_CHANGE2_NONDATA_PHASE));
  969. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  970. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  971. if (!(power & SENSE)) {
  972. nsp32_msg(KERN_INFO, "term power on");
  973. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  974. }
  975. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  976. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  977. nsp32_write1(base, SYNC_REG, 0);
  978. nsp32_write1(base, ACK_WIDTH, 0);
  979. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  980. /*
  981. * enable to select designated IRQ (except for
  982. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  983. */
  984. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  985. IRQSELECT_SCSIRESET_IRQ |
  986. IRQSELECT_FIFO_SHLD_IRQ |
  987. IRQSELECT_RESELECT_IRQ |
  988. IRQSELECT_PHASE_CHANGE_IRQ |
  989. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  990. // IRQSELECT_BMCNTERR_IRQ |
  991. IRQSELECT_TARGET_ABORT_IRQ |
  992. IRQSELECT_MASTER_ABORT_IRQ );
  993. nsp32_write2(base, IRQ_CONTROL, 0);
  994. /* PCI LED off */
  995. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  996. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  997. return TRUE;
  998. }
  999. /* interrupt routine */
  1000. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1001. {
  1002. nsp32_hw_data *data = dev_id;
  1003. unsigned int base = data->BaseAddress;
  1004. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1005. unsigned short auto_stat, irq_stat, trans_stat;
  1006. unsigned char busmon, busphase;
  1007. unsigned long flags;
  1008. int ret;
  1009. int handled = 0;
  1010. struct Scsi_Host *host = data->Host;
  1011. spin_lock_irqsave(host->host_lock, flags);
  1012. /*
  1013. * IRQ check, then enable IRQ mask
  1014. */
  1015. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1016. nsp32_dbg(NSP32_DEBUG_INTR,
  1017. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1018. /* is this interrupt comes from Ninja asic? */
  1019. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1020. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1021. goto out2;
  1022. }
  1023. handled = 1;
  1024. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1025. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1026. busphase = busmon & BUSMON_PHASE_MASK;
  1027. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1028. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1029. nsp32_msg(KERN_INFO, "card disconnect");
  1030. if (data->CurrentSC != NULL) {
  1031. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1032. SCpnt->result = DID_BAD_TARGET << 16;
  1033. nsp32_scsi_done(SCpnt);
  1034. }
  1035. goto out;
  1036. }
  1037. /* Timer IRQ */
  1038. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1039. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1040. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1041. goto out;
  1042. }
  1043. /* SCSI reset */
  1044. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1045. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1046. nsp32_do_bus_reset(data);
  1047. if (SCpnt != NULL) {
  1048. SCpnt->result = DID_RESET << 16;
  1049. nsp32_scsi_done(SCpnt);
  1050. }
  1051. goto out;
  1052. }
  1053. if (SCpnt == NULL) {
  1054. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1055. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1056. goto out;
  1057. }
  1058. /*
  1059. * AutoSCSI Interrupt.
  1060. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1061. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1062. * recorded when AutoSCSI sequencer has been processed.
  1063. */
  1064. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1065. /* getting SCSI executed phase */
  1066. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1067. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1068. /* Selection Timeout, go busfree phase. */
  1069. if (auto_stat & SELECTION_TIMEOUT) {
  1070. nsp32_dbg(NSP32_DEBUG_INTR,
  1071. "selection timeout occurred");
  1072. SCpnt->result = DID_TIME_OUT << 16;
  1073. nsp32_scsi_done(SCpnt);
  1074. goto out;
  1075. }
  1076. if (auto_stat & MSGOUT_PHASE) {
  1077. /*
  1078. * MsgOut phase was processed.
  1079. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1080. * completed. Thus, msgout_len must reset. Otherwise,
  1081. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1082. * then we will encounter the condition and check.
  1083. */
  1084. if (!(auto_stat & MSG_IN_OCCUER) &&
  1085. (data->msgout_len <= 3)) {
  1086. /*
  1087. * !MSG_IN_OCCUER && msgout_len <=3
  1088. * ---> AutoSCSI with MSGOUTreg is processed.
  1089. */
  1090. data->msgout_len = 0;
  1091. };
  1092. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1093. }
  1094. if ((auto_stat & DATA_IN_PHASE) &&
  1095. (scsi_get_resid(SCpnt) > 0) &&
  1096. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1097. printk( "auto+fifo\n");
  1098. //nsp32_pio_read(SCpnt);
  1099. }
  1100. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1101. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1102. nsp32_dbg(NSP32_DEBUG_INTR,
  1103. "Data in/out phase processed");
  1104. /* read BMCNT, SGT pointer addr */
  1105. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1106. nsp32_read4(base, BM_CNT));
  1107. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1108. nsp32_read4(base, SGT_ADR));
  1109. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1110. nsp32_read4(base, SACK_CNT));
  1111. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1112. nsp32_read4(base, SAVED_SACK_CNT));
  1113. scsi_set_resid(SCpnt, 0); /* all data transferred! */
  1114. }
  1115. /*
  1116. * MsgIn Occur
  1117. */
  1118. if (auto_stat & MSG_IN_OCCUER) {
  1119. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1120. }
  1121. /*
  1122. * MsgOut Occur
  1123. */
  1124. if (auto_stat & MSG_OUT_OCCUER) {
  1125. nsp32_msgout_occur(SCpnt);
  1126. }
  1127. /*
  1128. * Bus Free Occur
  1129. */
  1130. if (auto_stat & BUS_FREE_OCCUER) {
  1131. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1132. if (ret == TRUE) {
  1133. goto out;
  1134. }
  1135. }
  1136. if (auto_stat & STATUS_PHASE) {
  1137. /*
  1138. * Read CSB and substitute CSB for SCpnt->result
  1139. * to save status phase stutas byte.
  1140. * scsi error handler checks host_byte (DID_*:
  1141. * low level driver to indicate status), then checks
  1142. * status_byte (SCSI status byte).
  1143. */
  1144. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1145. }
  1146. if (auto_stat & ILLEGAL_PHASE) {
  1147. /* Illegal phase is detected. SACK is not back. */
  1148. nsp32_msg(KERN_WARNING,
  1149. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1150. /* TODO: currently we don't have any action... bus reset? */
  1151. /*
  1152. * To send back SACK, assert, wait, and negate.
  1153. */
  1154. nsp32_sack_assert(data);
  1155. nsp32_wait_req(data, NEGATE);
  1156. nsp32_sack_negate(data);
  1157. }
  1158. if (auto_stat & COMMAND_PHASE) {
  1159. /* nothing to do */
  1160. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1161. }
  1162. if (auto_stat & AUTOSCSI_BUSY) {
  1163. /* AutoSCSI is running */
  1164. }
  1165. show_autophase(auto_stat);
  1166. }
  1167. /* FIFO_SHLD_IRQ */
  1168. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1169. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1170. switch(busphase) {
  1171. case BUSPHASE_DATA_OUT:
  1172. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1173. //nsp32_pio_write(SCpnt);
  1174. break;
  1175. case BUSPHASE_DATA_IN:
  1176. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1177. //nsp32_pio_read(SCpnt);
  1178. break;
  1179. case BUSPHASE_STATUS:
  1180. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1181. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1182. break;
  1183. default:
  1184. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1185. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1186. show_busphase(busphase);
  1187. break;
  1188. }
  1189. goto out;
  1190. }
  1191. /* Phase Change IRQ */
  1192. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1193. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1194. switch(busphase) {
  1195. case BUSPHASE_MESSAGE_IN:
  1196. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1197. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1198. break;
  1199. default:
  1200. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1201. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1202. irq_stat, trans_stat);
  1203. show_busphase(busphase);
  1204. break;
  1205. }
  1206. goto out;
  1207. }
  1208. /* PCI_IRQ */
  1209. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1210. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1211. /* Do nothing */
  1212. }
  1213. /* BMCNTERR_IRQ */
  1214. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1215. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1216. /*
  1217. * TODO: To be implemented improving bus master
  1218. * transfer reliability when BMCNTERR is occurred in
  1219. * AutoSCSI phase described in specification.
  1220. */
  1221. }
  1222. #if 0
  1223. nsp32_dbg(NSP32_DEBUG_INTR,
  1224. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1225. show_busphase(busphase);
  1226. #endif
  1227. out:
  1228. /* disable IRQ mask */
  1229. nsp32_write2(base, IRQ_CONTROL, 0);
  1230. out2:
  1231. spin_unlock_irqrestore(host->host_lock, flags);
  1232. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1233. return IRQ_RETVAL(handled);
  1234. }
  1235. static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
  1236. {
  1237. unsigned long flags;
  1238. nsp32_hw_data *data;
  1239. int hostno;
  1240. unsigned int base;
  1241. unsigned char mode_reg;
  1242. int id, speed;
  1243. long model;
  1244. hostno = host->host_no;
  1245. data = (nsp32_hw_data *)host->hostdata;
  1246. base = host->io_port;
  1247. seq_puts(m, "NinjaSCSI-32 status\n\n");
  1248. seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1249. seq_printf(m, "SCSI host No.: %d\n", hostno);
  1250. seq_printf(m, "IRQ: %d\n", host->irq);
  1251. seq_printf(m, "IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1252. seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1253. seq_printf(m, "sg_tablesize: %d\n", host->sg_tablesize);
  1254. seq_printf(m, "Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1255. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1256. model = data->pci_devid->driver_data;
  1257. #ifdef CONFIG_PM
  1258. seq_printf(m, "Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1259. #endif
  1260. seq_printf(m, "OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1261. spin_lock_irqsave(&(data->Lock), flags);
  1262. seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
  1263. spin_unlock_irqrestore(&(data->Lock), flags);
  1264. seq_puts(m, "SDTR status\n");
  1265. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1266. seq_printf(m, "id %d: ", id);
  1267. if (id == host->this_id) {
  1268. seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
  1269. continue;
  1270. }
  1271. if (data->target[id].sync_flag == SDTR_DONE) {
  1272. if (data->target[id].period == 0 &&
  1273. data->target[id].offset == ASYNC_OFFSET ) {
  1274. seq_puts(m, "async");
  1275. } else {
  1276. seq_puts(m, " sync");
  1277. }
  1278. } else {
  1279. seq_puts(m, " none");
  1280. }
  1281. if (data->target[id].period != 0) {
  1282. speed = 1000000 / (data->target[id].period * 4);
  1283. seq_printf(m, " transfer %d.%dMB/s, offset %d",
  1284. speed / 1000,
  1285. speed % 1000,
  1286. data->target[id].offset
  1287. );
  1288. }
  1289. seq_putc(m, '\n');
  1290. }
  1291. return 0;
  1292. }
  1293. /*
  1294. * Reset parameters and call scsi_done for data->cur_lunt.
  1295. * Be careful setting SCpnt->result = DID_* before calling this function.
  1296. */
  1297. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1298. {
  1299. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1300. unsigned int base = SCpnt->device->host->io_port;
  1301. scsi_dma_unmap(SCpnt);
  1302. /*
  1303. * clear TRANSFERCONTROL_BM_START
  1304. */
  1305. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1306. nsp32_write4(base, BM_CNT, 0);
  1307. /*
  1308. * call scsi_done
  1309. */
  1310. (*SCpnt->scsi_done)(SCpnt);
  1311. /*
  1312. * reset parameters
  1313. */
  1314. data->cur_lunt->SCpnt = NULL;
  1315. data->cur_lunt = NULL;
  1316. data->cur_target = NULL;
  1317. data->CurrentSC = NULL;
  1318. }
  1319. /*
  1320. * Bus Free Occur
  1321. *
  1322. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1323. * with ACK reply when below condition is matched:
  1324. * MsgIn 00: Command Complete.
  1325. * MsgIn 02: Save Data Pointer.
  1326. * MsgIn 04: Diconnect.
  1327. * In other case, unexpected BUSFREE is detected.
  1328. */
  1329. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1330. {
  1331. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1332. unsigned int base = SCpnt->device->host->io_port;
  1333. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1334. show_autophase(execph);
  1335. nsp32_write4(base, BM_CNT, 0);
  1336. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1337. /*
  1338. * MsgIn 02: Save Data Pointer
  1339. *
  1340. * VALID:
  1341. * Save Data Pointer is received. Adjust pointer.
  1342. *
  1343. * NO-VALID:
  1344. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1345. * processing and we can't adjust any SCSI data pointer in next data
  1346. * phase.
  1347. */
  1348. if (execph & MSGIN_02_VALID) {
  1349. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1350. /*
  1351. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1352. * needed.
  1353. */
  1354. if (!(execph & MSGIN_00_VALID) &&
  1355. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1356. unsigned int sacklen, s_sacklen;
  1357. /*
  1358. * Read SACK count and SAVEDSACK count, then compare.
  1359. */
  1360. sacklen = nsp32_read4(base, SACK_CNT );
  1361. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1362. /*
  1363. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1364. * come after data transferring.
  1365. */
  1366. if (s_sacklen > 0) {
  1367. /*
  1368. * Comparing between sack and savedsack to
  1369. * check the condition of AutoMsgIn03.
  1370. *
  1371. * If they are same, set msgin03 == TRUE,
  1372. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1373. * reselection. On the other hand, if they
  1374. * aren't same, set msgin03 == FALSE, and
  1375. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1376. * reselection.
  1377. */
  1378. if (sacklen != s_sacklen) {
  1379. data->cur_lunt->msgin03 = FALSE;
  1380. } else {
  1381. data->cur_lunt->msgin03 = TRUE;
  1382. }
  1383. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1384. }
  1385. }
  1386. /* This value has not substitude with valid value yet... */
  1387. //data->cur_lunt->save_datp = data->cur_datp;
  1388. } else {
  1389. /*
  1390. * no processing.
  1391. */
  1392. }
  1393. if (execph & MSGIN_03_VALID) {
  1394. /* MsgIn03 was valid to be processed. No need processing. */
  1395. }
  1396. /*
  1397. * target SDTR check
  1398. */
  1399. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1400. /*
  1401. * SDTR negotiation pulled by the initiator has not
  1402. * finished yet. Fall back to ASYNC mode.
  1403. */
  1404. nsp32_set_async(data, data->cur_target);
  1405. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1406. data->cur_target->sync_flag |= SDTR_DONE;
  1407. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1408. /*
  1409. * SDTR negotiation pulled by the target has been
  1410. * negotiating.
  1411. */
  1412. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1413. /*
  1414. * If valid message is received, then
  1415. * negotiation is succeeded.
  1416. */
  1417. } else {
  1418. /*
  1419. * On the contrary, if unexpected bus free is
  1420. * occurred, then negotiation is failed. Fall
  1421. * back to ASYNC mode.
  1422. */
  1423. nsp32_set_async(data, data->cur_target);
  1424. }
  1425. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1426. data->cur_target->sync_flag |= SDTR_DONE;
  1427. }
  1428. /*
  1429. * It is always ensured by SCSI standard that initiator
  1430. * switches into Bus Free Phase after
  1431. * receiving message 00 (Command Complete), 04 (Disconnect).
  1432. * It's the reason that processing here is valid.
  1433. */
  1434. if (execph & MSGIN_00_VALID) {
  1435. /* MsgIn 00: Command Complete */
  1436. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1437. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1438. SCpnt->SCp.Message = 0;
  1439. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1440. "normal end stat=0x%x resid=0x%x\n",
  1441. SCpnt->SCp.Status, scsi_get_resid(SCpnt));
  1442. SCpnt->result = (DID_OK << 16) |
  1443. (SCpnt->SCp.Message << 8) |
  1444. (SCpnt->SCp.Status << 0);
  1445. nsp32_scsi_done(SCpnt);
  1446. /* All operation is done */
  1447. return TRUE;
  1448. } else if (execph & MSGIN_04_VALID) {
  1449. /* MsgIn 04: Disconnect */
  1450. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1451. SCpnt->SCp.Message = 4;
  1452. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1453. return TRUE;
  1454. } else {
  1455. /* Unexpected bus free */
  1456. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1457. /* DID_ERROR? */
  1458. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1459. SCpnt->result = DID_ERROR << 16;
  1460. nsp32_scsi_done(SCpnt);
  1461. return TRUE;
  1462. }
  1463. return FALSE;
  1464. }
  1465. /*
  1466. * nsp32_adjust_busfree - adjusting SG table
  1467. *
  1468. * Note: This driver adjust the SG table using SCSI ACK
  1469. * counter instead of BMCNT counter!
  1470. */
  1471. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1472. {
  1473. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1474. int old_entry = data->cur_entry;
  1475. int new_entry;
  1476. int sg_num = data->cur_lunt->sg_num;
  1477. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1478. unsigned int restlen, sentlen;
  1479. u32_le len, addr;
  1480. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1481. /* adjust saved SACK count with 4 byte start address boundary */
  1482. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1483. /*
  1484. * calculate new_entry from sack count and each sgt[].len
  1485. * calculate the byte which is intent to send
  1486. */
  1487. sentlen = 0;
  1488. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1489. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1490. if (sentlen > s_sacklen) {
  1491. break;
  1492. }
  1493. }
  1494. /* all sgt is processed */
  1495. if (new_entry == sg_num) {
  1496. goto last;
  1497. }
  1498. if (sentlen == s_sacklen) {
  1499. /* XXX: confirm it's ok or not */
  1500. /* In this case, it's ok because we are at
  1501. the head element of the sg. restlen is correctly calculated. */
  1502. }
  1503. /* calculate the rest length for transferring */
  1504. restlen = sentlen - s_sacklen;
  1505. /* update adjusting current SG table entry */
  1506. len = le32_to_cpu(sgt[new_entry].len);
  1507. addr = le32_to_cpu(sgt[new_entry].addr);
  1508. addr += (len - restlen);
  1509. sgt[new_entry].addr = cpu_to_le32(addr);
  1510. sgt[new_entry].len = cpu_to_le32(restlen);
  1511. /* set cur_entry with new_entry */
  1512. data->cur_entry = new_entry;
  1513. return;
  1514. last:
  1515. if (scsi_get_resid(SCpnt) < sentlen) {
  1516. nsp32_msg(KERN_ERR, "resid underflow");
  1517. }
  1518. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1519. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1520. /* update hostdata and lun */
  1521. return;
  1522. }
  1523. /*
  1524. * It's called MsgOut phase occur.
  1525. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1526. * message out phase. It, however, has more than 3 messages,
  1527. * HBA creates the interrupt and we have to process by hand.
  1528. */
  1529. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1530. {
  1531. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1532. unsigned int base = SCpnt->device->host->io_port;
  1533. //unsigned short command;
  1534. long new_sgtp;
  1535. int i;
  1536. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1537. "enter: msgout_len: 0x%x", data->msgout_len);
  1538. /*
  1539. * If MsgOut phase is occurred without having any
  1540. * message, then No_Operation is sent (SCSI-2).
  1541. */
  1542. if (data->msgout_len == 0) {
  1543. nsp32_build_nop(SCpnt);
  1544. }
  1545. /*
  1546. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1547. * because SGTP is incremented next point.
  1548. * There is few statement in the specification...
  1549. */
  1550. new_sgtp = data->cur_lunt->sglun_paddr +
  1551. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1552. /*
  1553. * send messages
  1554. */
  1555. for (i = 0; i < data->msgout_len; i++) {
  1556. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1557. "%d : 0x%x", i, data->msgoutbuf[i]);
  1558. /*
  1559. * Check REQ is asserted.
  1560. */
  1561. nsp32_wait_req(data, ASSERT);
  1562. if (i == (data->msgout_len - 1)) {
  1563. /*
  1564. * If the last message, set the AutoSCSI restart
  1565. * before send back the ack message. AutoSCSI
  1566. * restart automatically negate ATN signal.
  1567. */
  1568. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1569. //nsp32_restart_autoscsi(SCpnt, command);
  1570. nsp32_write2(base, COMMAND_CONTROL,
  1571. (CLEAR_CDB_FIFO_POINTER |
  1572. AUTO_COMMAND_PHASE |
  1573. AUTOSCSI_RESTART |
  1574. AUTO_MSGIN_00_OR_04 |
  1575. AUTO_MSGIN_02 ));
  1576. }
  1577. /*
  1578. * Write data with SACK, then wait sack is
  1579. * automatically negated.
  1580. */
  1581. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1582. nsp32_wait_sack(data, NEGATE);
  1583. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1584. nsp32_read1(base, SCSI_BUS_MONITOR));
  1585. };
  1586. data->msgout_len = 0;
  1587. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1588. }
  1589. /*
  1590. * Restart AutoSCSI
  1591. *
  1592. * Note: Restarting AutoSCSI needs set:
  1593. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1594. */
  1595. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1596. {
  1597. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1598. unsigned int base = data->BaseAddress;
  1599. unsigned short transfer = 0;
  1600. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1601. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1602. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1603. }
  1604. /*
  1605. * set SYNC_REG
  1606. * Don't set BM_START_ADR before setting this register.
  1607. */
  1608. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1609. /*
  1610. * set ACKWIDTH
  1611. */
  1612. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1613. /*
  1614. * set SREQ hazard killer sampling rate
  1615. */
  1616. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1617. /*
  1618. * set SGT ADDR (physical address)
  1619. */
  1620. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1621. /*
  1622. * set TRANSFER CONTROL REG
  1623. */
  1624. transfer = 0;
  1625. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1626. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1627. if (scsi_bufflen(SCpnt) > 0) {
  1628. transfer |= BM_START;
  1629. }
  1630. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1631. transfer |= CB_MMIO_MODE;
  1632. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1633. transfer |= CB_IO_MODE;
  1634. }
  1635. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1636. /*
  1637. * restart AutoSCSI
  1638. *
  1639. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1640. */
  1641. command |= (CLEAR_CDB_FIFO_POINTER |
  1642. AUTO_COMMAND_PHASE |
  1643. AUTOSCSI_RESTART );
  1644. nsp32_write2(base, COMMAND_CONTROL, command);
  1645. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1646. }
  1647. /*
  1648. * cannot run automatically message in occur
  1649. */
  1650. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1651. unsigned long irq_status,
  1652. unsigned short execph)
  1653. {
  1654. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1655. unsigned int base = SCpnt->device->host->io_port;
  1656. unsigned char msg;
  1657. unsigned char msgtype;
  1658. unsigned char newlun;
  1659. unsigned short command = 0;
  1660. int msgclear = TRUE;
  1661. long new_sgtp;
  1662. int ret;
  1663. /*
  1664. * read first message
  1665. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1666. * of Message-In have to be processed before sending back SCSI ACK.
  1667. */
  1668. msg = nsp32_read1(base, SCSI_DATA_IN);
  1669. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1670. msgtype = data->msginbuf[0];
  1671. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1672. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1673. data->msgin_len, msg, msgtype);
  1674. /*
  1675. * TODO: We need checking whether bus phase is message in?
  1676. */
  1677. /*
  1678. * assert SCSI ACK
  1679. */
  1680. nsp32_sack_assert(data);
  1681. /*
  1682. * processing IDENTIFY
  1683. */
  1684. if (msgtype & 0x80) {
  1685. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1686. /* Invalid (non reselect) phase */
  1687. goto reject;
  1688. }
  1689. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1690. ret = nsp32_reselection(SCpnt, newlun);
  1691. if (ret == TRUE) {
  1692. goto restart;
  1693. } else {
  1694. goto reject;
  1695. }
  1696. }
  1697. /*
  1698. * processing messages except for IDENTIFY
  1699. *
  1700. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1701. */
  1702. switch (msgtype) {
  1703. /*
  1704. * 1-byte message
  1705. */
  1706. case COMMAND_COMPLETE:
  1707. case DISCONNECT:
  1708. /*
  1709. * These messages should not be occurred.
  1710. * They should be processed on AutoSCSI sequencer.
  1711. */
  1712. nsp32_msg(KERN_WARNING,
  1713. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1714. break;
  1715. case RESTORE_POINTERS:
  1716. /*
  1717. * AutoMsgIn03 is disabled, and HBA gets this message.
  1718. */
  1719. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1720. unsigned int s_sacklen;
  1721. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1722. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1723. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1724. } else {
  1725. /* No need to rewrite SGT */
  1726. }
  1727. }
  1728. data->cur_lunt->msgin03 = FALSE;
  1729. /* Update with the new value */
  1730. /* reset SACK/SavedACK counter (or ALL clear?) */
  1731. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1732. /*
  1733. * set new sg pointer
  1734. */
  1735. new_sgtp = data->cur_lunt->sglun_paddr +
  1736. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1737. nsp32_write4(base, SGT_ADR, new_sgtp);
  1738. break;
  1739. case SAVE_POINTERS:
  1740. /*
  1741. * These messages should not be occurred.
  1742. * They should be processed on AutoSCSI sequencer.
  1743. */
  1744. nsp32_msg (KERN_WARNING,
  1745. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1746. break;
  1747. case MESSAGE_REJECT:
  1748. /* If previous message_out is sending SDTR, and get
  1749. message_reject from target, SDTR negotiation is failed */
  1750. if (data->cur_target->sync_flag &
  1751. (SDTR_INITIATOR | SDTR_TARGET)) {
  1752. /*
  1753. * Current target is negotiating SDTR, but it's
  1754. * failed. Fall back to async transfer mode, and set
  1755. * SDTR_DONE.
  1756. */
  1757. nsp32_set_async(data, data->cur_target);
  1758. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1759. data->cur_target->sync_flag |= SDTR_DONE;
  1760. }
  1761. break;
  1762. case LINKED_CMD_COMPLETE:
  1763. case LINKED_FLG_CMD_COMPLETE:
  1764. /* queue tag is not supported currently */
  1765. nsp32_msg (KERN_WARNING,
  1766. "unsupported message: 0x%x", msgtype);
  1767. break;
  1768. case INITIATE_RECOVERY:
  1769. /* staring ECA (Extended Contingent Allegiance) state. */
  1770. /* This message is declined in SPI2 or later. */
  1771. goto reject;
  1772. /*
  1773. * 2-byte message
  1774. */
  1775. case SIMPLE_QUEUE_TAG:
  1776. case 0x23:
  1777. /*
  1778. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1779. * No support is needed.
  1780. */
  1781. if (data->msgin_len >= 1) {
  1782. goto reject;
  1783. }
  1784. /* current position is 1-byte of 2 byte */
  1785. msgclear = FALSE;
  1786. break;
  1787. /*
  1788. * extended message
  1789. */
  1790. case EXTENDED_MESSAGE:
  1791. if (data->msgin_len < 1) {
  1792. /*
  1793. * Current position does not reach 2-byte
  1794. * (2-byte is extended message length).
  1795. */
  1796. msgclear = FALSE;
  1797. break;
  1798. }
  1799. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1800. /*
  1801. * Current extended message has msginbuf[1] + 2
  1802. * (msgin_len starts counting from 0, so buf[1] + 1).
  1803. * If current message position is not finished,
  1804. * continue receiving message.
  1805. */
  1806. msgclear = FALSE;
  1807. break;
  1808. }
  1809. /*
  1810. * Reach here means regular length of each type of
  1811. * extended messages.
  1812. */
  1813. switch (data->msginbuf[2]) {
  1814. case EXTENDED_MODIFY_DATA_POINTER:
  1815. /* TODO */
  1816. goto reject; /* not implemented yet */
  1817. break;
  1818. case EXTENDED_SDTR:
  1819. /*
  1820. * Exchange this message between initiator and target.
  1821. */
  1822. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1823. /*
  1824. * received inappropriate message.
  1825. */
  1826. goto reject;
  1827. break;
  1828. }
  1829. nsp32_analyze_sdtr(SCpnt);
  1830. break;
  1831. case EXTENDED_EXTENDED_IDENTIFY:
  1832. /* SCSI-I only, not supported. */
  1833. goto reject; /* not implemented yet */
  1834. break;
  1835. case EXTENDED_WDTR:
  1836. goto reject; /* not implemented yet */
  1837. break;
  1838. default:
  1839. goto reject;
  1840. }
  1841. break;
  1842. default:
  1843. goto reject;
  1844. }
  1845. restart:
  1846. if (msgclear == TRUE) {
  1847. data->msgin_len = 0;
  1848. /*
  1849. * If restarting AutoSCSI, but there are some message to out
  1850. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1851. * (MV_VALID = 0). When commandcontrol is written with
  1852. * AutoSCSI restart, at the same time MsgOutOccur should be
  1853. * happened (however, such situation is really possible...?).
  1854. */
  1855. if (data->msgout_len > 0) {
  1856. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1857. command |= AUTO_ATN;
  1858. }
  1859. /*
  1860. * restart AutoSCSI
  1861. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1862. */
  1863. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1864. /*
  1865. * If current msgin03 is TRUE, then flag on.
  1866. */
  1867. if (data->cur_lunt->msgin03 == TRUE) {
  1868. command |= AUTO_MSGIN_03;
  1869. }
  1870. data->cur_lunt->msgin03 = FALSE;
  1871. } else {
  1872. data->msgin_len++;
  1873. }
  1874. /*
  1875. * restart AutoSCSI
  1876. */
  1877. nsp32_restart_autoscsi(SCpnt, command);
  1878. /*
  1879. * wait SCSI REQ negate for REQ-ACK handshake
  1880. */
  1881. nsp32_wait_req(data, NEGATE);
  1882. /*
  1883. * negate SCSI ACK
  1884. */
  1885. nsp32_sack_negate(data);
  1886. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1887. return;
  1888. reject:
  1889. nsp32_msg(KERN_WARNING,
  1890. "invalid or unsupported MessageIn, rejected. "
  1891. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1892. msg, data->msgin_len, msgtype);
  1893. nsp32_build_reject(SCpnt);
  1894. data->msgin_len = 0;
  1895. goto restart;
  1896. }
  1897. /*
  1898. *
  1899. */
  1900. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1901. {
  1902. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1903. nsp32_target *target = data->cur_target;
  1904. nsp32_sync_table *synct;
  1905. unsigned char get_period = data->msginbuf[3];
  1906. unsigned char get_offset = data->msginbuf[4];
  1907. int entry;
  1908. int syncnum;
  1909. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1910. synct = data->synct;
  1911. syncnum = data->syncnum;
  1912. /*
  1913. * If this inititor sent the SDTR message, then target responds SDTR,
  1914. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1915. * Messages are not appropriate, then send back reject message.
  1916. * If initiator did not send the SDTR, but target sends SDTR,
  1917. * initiator calculator the appropriate parameter and send back SDTR.
  1918. */
  1919. if (target->sync_flag & SDTR_INITIATOR) {
  1920. /*
  1921. * Initiator sent SDTR, the target responds and
  1922. * send back negotiation SDTR.
  1923. */
  1924. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1925. target->sync_flag &= ~SDTR_INITIATOR;
  1926. target->sync_flag |= SDTR_DONE;
  1927. /*
  1928. * offset:
  1929. */
  1930. if (get_offset > SYNC_OFFSET) {
  1931. /*
  1932. * Negotiation is failed, the target send back
  1933. * unexpected offset value.
  1934. */
  1935. goto reject;
  1936. }
  1937. if (get_offset == ASYNC_OFFSET) {
  1938. /*
  1939. * Negotiation is succeeded, the target want
  1940. * to fall back into asynchronous transfer mode.
  1941. */
  1942. goto async;
  1943. }
  1944. /*
  1945. * period:
  1946. * Check whether sync period is too short. If too short,
  1947. * fall back to async mode. If it's ok, then investigate
  1948. * the received sync period. If sync period is acceptable
  1949. * between sync table start_period and end_period, then
  1950. * set this I_T nexus as sent offset and period.
  1951. * If it's not acceptable, send back reject and fall back
  1952. * to async mode.
  1953. */
  1954. if (get_period < data->synct[0].period_num) {
  1955. /*
  1956. * Negotiation is failed, the target send back
  1957. * unexpected period value.
  1958. */
  1959. goto reject;
  1960. }
  1961. entry = nsp32_search_period_entry(data, target, get_period);
  1962. if (entry < 0) {
  1963. /*
  1964. * Target want to use long period which is not
  1965. * acceptable NinjaSCSI-32Bi/UDE.
  1966. */
  1967. goto reject;
  1968. }
  1969. /*
  1970. * Set new sync table and offset in this I_T nexus.
  1971. */
  1972. nsp32_set_sync_entry(data, target, entry, get_offset);
  1973. } else {
  1974. /* Target send SDTR to initiator. */
  1975. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  1976. target->sync_flag |= SDTR_INITIATOR;
  1977. /* offset: */
  1978. if (get_offset > SYNC_OFFSET) {
  1979. /* send back as SYNC_OFFSET */
  1980. get_offset = SYNC_OFFSET;
  1981. }
  1982. /* period: */
  1983. if (get_period < data->synct[0].period_num) {
  1984. get_period = data->synct[0].period_num;
  1985. }
  1986. entry = nsp32_search_period_entry(data, target, get_period);
  1987. if (get_offset == ASYNC_OFFSET || entry < 0) {
  1988. nsp32_set_async(data, target);
  1989. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  1990. } else {
  1991. nsp32_set_sync_entry(data, target, entry, get_offset);
  1992. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  1993. }
  1994. }
  1995. target->period = get_period;
  1996. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1997. return;
  1998. reject:
  1999. /*
  2000. * If the current message is unacceptable, send back to the target
  2001. * with reject message.
  2002. */
  2003. nsp32_build_reject(SCpnt);
  2004. async:
  2005. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2006. target->period = 0;
  2007. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2008. return;
  2009. }
  2010. /*
  2011. * Search config entry number matched in sync_table from given
  2012. * target and speed period value. If failed to search, return negative value.
  2013. */
  2014. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2015. nsp32_target *target,
  2016. unsigned char period)
  2017. {
  2018. int i;
  2019. if (target->limit_entry >= data->syncnum) {
  2020. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2021. target->limit_entry = 0;
  2022. }
  2023. for (i = target->limit_entry; i < data->syncnum; i++) {
  2024. if (period >= data->synct[i].start_period &&
  2025. period <= data->synct[i].end_period) {
  2026. break;
  2027. }
  2028. }
  2029. /*
  2030. * Check given period value is over the sync_table value.
  2031. * If so, return max value.
  2032. */
  2033. if (i == data->syncnum) {
  2034. i = -1;
  2035. }
  2036. return i;
  2037. }
  2038. /*
  2039. * target <-> initiator use ASYNC transfer
  2040. */
  2041. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2042. {
  2043. unsigned char period = data->synct[target->limit_entry].period_num;
  2044. target->offset = ASYNC_OFFSET;
  2045. target->period = 0;
  2046. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2047. target->ackwidth = 0;
  2048. target->sample_reg = 0;
  2049. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2050. }
  2051. /*
  2052. * target <-> initiator use maximum SYNC transfer
  2053. */
  2054. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2055. nsp32_target *target,
  2056. unsigned char *period,
  2057. unsigned char *offset)
  2058. {
  2059. unsigned char period_num, ackwidth;
  2060. period_num = data->synct[target->limit_entry].period_num;
  2061. *period = data->synct[target->limit_entry].start_period;
  2062. ackwidth = data->synct[target->limit_entry].ackwidth;
  2063. *offset = SYNC_OFFSET;
  2064. target->syncreg = TO_SYNCREG(period_num, *offset);
  2065. target->ackwidth = ackwidth;
  2066. target->offset = *offset;
  2067. target->sample_reg = 0; /* disable SREQ sampling */
  2068. }
  2069. /*
  2070. * target <-> initiator use entry number speed
  2071. */
  2072. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2073. nsp32_target *target,
  2074. int entry,
  2075. unsigned char offset)
  2076. {
  2077. unsigned char period, ackwidth, sample_rate;
  2078. period = data->synct[entry].period_num;
  2079. ackwidth = data->synct[entry].ackwidth;
  2080. offset = offset;
  2081. sample_rate = data->synct[entry].sample_rate;
  2082. target->syncreg = TO_SYNCREG(period, offset);
  2083. target->ackwidth = ackwidth;
  2084. target->offset = offset;
  2085. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2086. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2087. }
  2088. /*
  2089. * It waits until SCSI REQ becomes assertion or negation state.
  2090. *
  2091. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2092. * connected target responds SCSI REQ negation. We have to wait
  2093. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2094. * REQ-ACK handshake.
  2095. */
  2096. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2097. {
  2098. unsigned int base = data->BaseAddress;
  2099. int wait_time = 0;
  2100. unsigned char bus, req_bit;
  2101. if (!((state == ASSERT) || (state == NEGATE))) {
  2102. nsp32_msg(KERN_ERR, "unknown state designation");
  2103. }
  2104. /* REQ is BIT(5) */
  2105. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2106. do {
  2107. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2108. if ((bus & BUSMON_REQ) == req_bit) {
  2109. nsp32_dbg(NSP32_DEBUG_WAIT,
  2110. "wait_time: %d", wait_time);
  2111. return;
  2112. }
  2113. udelay(1);
  2114. wait_time++;
  2115. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2116. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2117. }
  2118. /*
  2119. * It waits until SCSI SACK becomes assertion or negation state.
  2120. */
  2121. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2122. {
  2123. unsigned int base = data->BaseAddress;
  2124. int wait_time = 0;
  2125. unsigned char bus, ack_bit;
  2126. if (!((state == ASSERT) || (state == NEGATE))) {
  2127. nsp32_msg(KERN_ERR, "unknown state designation");
  2128. }
  2129. /* ACK is BIT(4) */
  2130. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2131. do {
  2132. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2133. if ((bus & BUSMON_ACK) == ack_bit) {
  2134. nsp32_dbg(NSP32_DEBUG_WAIT,
  2135. "wait_time: %d", wait_time);
  2136. return;
  2137. }
  2138. udelay(1);
  2139. wait_time++;
  2140. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2141. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2142. }
  2143. /*
  2144. * assert SCSI ACK
  2145. *
  2146. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2147. */
  2148. static void nsp32_sack_assert(nsp32_hw_data *data)
  2149. {
  2150. unsigned int base = data->BaseAddress;
  2151. unsigned char busctrl;
  2152. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2153. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2154. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2155. }
  2156. /*
  2157. * negate SCSI ACK
  2158. */
  2159. static void nsp32_sack_negate(nsp32_hw_data *data)
  2160. {
  2161. unsigned int base = data->BaseAddress;
  2162. unsigned char busctrl;
  2163. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2164. busctrl &= ~BUSCTL_ACK;
  2165. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2166. }
  2167. /*
  2168. * Note: n_io_port is defined as 0x7f because I/O register port is
  2169. * assigned as:
  2170. * 0x800-0x8ff: memory mapped I/O port
  2171. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2172. * 0xc00-0xfff: CardBus status registers
  2173. */
  2174. static int nsp32_detect(struct pci_dev *pdev)
  2175. {
  2176. struct Scsi_Host *host; /* registered host structure */
  2177. struct resource *res;
  2178. nsp32_hw_data *data;
  2179. int ret;
  2180. int i, j;
  2181. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2182. /*
  2183. * register this HBA as SCSI device
  2184. */
  2185. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2186. if (host == NULL) {
  2187. nsp32_msg (KERN_ERR, "failed to scsi register");
  2188. goto err;
  2189. }
  2190. /*
  2191. * set nsp32_hw_data
  2192. */
  2193. data = (nsp32_hw_data *)host->hostdata;
  2194. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2195. host->irq = data->IrqNumber;
  2196. host->io_port = data->BaseAddress;
  2197. host->unique_id = data->BaseAddress;
  2198. host->n_io_port = data->NumAddress;
  2199. host->base = (unsigned long)data->MmioAddress;
  2200. data->Host = host;
  2201. spin_lock_init(&(data->Lock));
  2202. data->cur_lunt = NULL;
  2203. data->cur_target = NULL;
  2204. /*
  2205. * Bus master transfer mode is supported currently.
  2206. */
  2207. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2208. /*
  2209. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2210. * dividing * 100ns/4).
  2211. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2212. */
  2213. data->clock = CLOCK_4;
  2214. /*
  2215. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2216. */
  2217. switch (data->clock) {
  2218. case CLOCK_4:
  2219. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2220. data->synct = nsp32_sync_table_40M;
  2221. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2222. break;
  2223. case CLOCK_2:
  2224. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2225. data->synct = nsp32_sync_table_20M;
  2226. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2227. break;
  2228. case PCICLK:
  2229. /* If data->clock is PCICLK, then select pci sync table. */
  2230. data->synct = nsp32_sync_table_pci;
  2231. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2232. break;
  2233. default:
  2234. nsp32_msg(KERN_WARNING,
  2235. "Invalid clock div is selected, set CLOCK_4.");
  2236. /* Use default value CLOCK_4 */
  2237. data->clock = CLOCK_4;
  2238. data->synct = nsp32_sync_table_40M;
  2239. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2240. }
  2241. /*
  2242. * setup nsp32_lunt
  2243. */
  2244. /*
  2245. * setup DMA
  2246. */
  2247. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
  2248. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2249. goto scsi_unregister;
  2250. }
  2251. /*
  2252. * allocate autoparam DMA resource.
  2253. */
  2254. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2255. if (data->autoparam == NULL) {
  2256. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2257. goto scsi_unregister;
  2258. }
  2259. /*
  2260. * allocate scatter-gather DMA resource.
  2261. */
  2262. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2263. &(data->sg_paddr));
  2264. if (data->sg_list == NULL) {
  2265. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2266. goto free_autoparam;
  2267. }
  2268. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2269. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2270. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2271. nsp32_lunt tmp = {
  2272. .SCpnt = NULL,
  2273. .save_datp = 0,
  2274. .msgin03 = FALSE,
  2275. .sg_num = 0,
  2276. .cur_entry = 0,
  2277. .sglun = &(data->sg_list[offset]),
  2278. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2279. };
  2280. data->lunt[i][j] = tmp;
  2281. }
  2282. }
  2283. /*
  2284. * setup target
  2285. */
  2286. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2287. nsp32_target *target = &(data->target[i]);
  2288. target->limit_entry = 0;
  2289. target->sync_flag = 0;
  2290. nsp32_set_async(data, target);
  2291. }
  2292. /*
  2293. * EEPROM check
  2294. */
  2295. ret = nsp32_getprom_param(data);
  2296. if (ret == FALSE) {
  2297. data->resettime = 3; /* default 3 */
  2298. }
  2299. /*
  2300. * setup HBA
  2301. */
  2302. nsp32hw_init(data);
  2303. snprintf(data->info_str, sizeof(data->info_str),
  2304. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2305. host->irq, host->io_port, host->n_io_port);
  2306. /*
  2307. * SCSI bus reset
  2308. *
  2309. * Note: It's important to reset SCSI bus in initialization phase.
  2310. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2311. * system is coming up, so SCSI devices connected to HBA is set as
  2312. * un-asynchronous mode. It brings the merit that this HBA is
  2313. * ready to start synchronous transfer without any preparation,
  2314. * but we are difficult to control transfer speed. In addition,
  2315. * it prevents device transfer speed from effecting EEPROM start-up
  2316. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2317. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2318. * connected same or more than 4 devices. It should be avoided
  2319. * depending on this specification. Thus, resetting the SCSI bus
  2320. * restores all connected SCSI devices to asynchronous mode, then
  2321. * this driver set SDTR safely later, and we can control all SCSI
  2322. * device transfer mode.
  2323. */
  2324. nsp32_do_bus_reset(data);
  2325. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2326. if (ret < 0) {
  2327. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2328. "SCSI PCI controller. Interrupt: %d", host->irq);
  2329. goto free_sg_list;
  2330. }
  2331. /*
  2332. * PCI IO register
  2333. */
  2334. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2335. if (res == NULL) {
  2336. nsp32_msg(KERN_ERR,
  2337. "I/O region 0x%lx+0x%lx is already used",
  2338. data->BaseAddress, data->NumAddress);
  2339. goto free_irq;
  2340. }
  2341. ret = scsi_add_host(host, &pdev->dev);
  2342. if (ret) {
  2343. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2344. goto free_region;
  2345. }
  2346. scsi_scan_host(host);
  2347. pci_set_drvdata(pdev, host);
  2348. return 0;
  2349. free_region:
  2350. release_region(host->io_port, host->n_io_port);
  2351. free_irq:
  2352. free_irq(host->irq, data);
  2353. free_sg_list:
  2354. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2355. data->sg_list, data->sg_paddr);
  2356. free_autoparam:
  2357. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2358. data->autoparam, data->auto_paddr);
  2359. scsi_unregister:
  2360. scsi_host_put(host);
  2361. err:
  2362. return 1;
  2363. }
  2364. static int nsp32_release(struct Scsi_Host *host)
  2365. {
  2366. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2367. if (data->autoparam) {
  2368. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2369. data->autoparam, data->auto_paddr);
  2370. }
  2371. if (data->sg_list) {
  2372. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2373. data->sg_list, data->sg_paddr);
  2374. }
  2375. if (host->irq) {
  2376. free_irq(host->irq, data);
  2377. }
  2378. if (host->io_port && host->n_io_port) {
  2379. release_region(host->io_port, host->n_io_port);
  2380. }
  2381. if (data->MmioAddress) {
  2382. iounmap(data->MmioAddress);
  2383. }
  2384. return 0;
  2385. }
  2386. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2387. {
  2388. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2389. return data->info_str;
  2390. }
  2391. /****************************************************************************
  2392. * error handler
  2393. */
  2394. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2395. {
  2396. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2397. unsigned int base = SCpnt->device->host->io_port;
  2398. nsp32_msg(KERN_WARNING, "abort");
  2399. if (data->cur_lunt->SCpnt == NULL) {
  2400. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2401. return FAILED;
  2402. }
  2403. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2404. /* reset SDTR negotiation */
  2405. data->cur_target->sync_flag = 0;
  2406. nsp32_set_async(data, data->cur_target);
  2407. }
  2408. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2409. nsp32_write2(base, BM_CNT, 0);
  2410. SCpnt->result = DID_ABORT << 16;
  2411. nsp32_scsi_done(SCpnt);
  2412. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2413. return SUCCESS;
  2414. }
  2415. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2416. {
  2417. unsigned int base = data->BaseAddress;
  2418. unsigned short intrdat;
  2419. int i;
  2420. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2421. /*
  2422. * stop all transfer
  2423. * clear TRANSFERCONTROL_BM_START
  2424. * clear counter
  2425. */
  2426. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2427. nsp32_write4(base, BM_CNT, 0);
  2428. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2429. /*
  2430. * fall back to asynchronous transfer mode
  2431. * initialize SDTR negotiation flag
  2432. */
  2433. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2434. nsp32_target *target = &data->target[i];
  2435. target->sync_flag = 0;
  2436. nsp32_set_async(data, target);
  2437. }
  2438. /*
  2439. * reset SCSI bus
  2440. */
  2441. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2442. mdelay(RESET_HOLD_TIME / 1000);
  2443. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2444. for(i = 0; i < 5; i++) {
  2445. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2446. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2447. }
  2448. data->CurrentSC = NULL;
  2449. }
  2450. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2451. {
  2452. struct Scsi_Host *host = SCpnt->device->host;
  2453. unsigned int base = SCpnt->device->host->io_port;
  2454. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2455. nsp32_msg(KERN_INFO, "Host Reset");
  2456. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2457. spin_lock_irq(SCpnt->device->host->host_lock);
  2458. nsp32hw_init(data);
  2459. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2460. nsp32_do_bus_reset(data);
  2461. nsp32_write2(base, IRQ_CONTROL, 0);
  2462. spin_unlock_irq(SCpnt->device->host->host_lock);
  2463. return SUCCESS; /* Host reset is succeeded at any time. */
  2464. }
  2465. /**************************************************************************
  2466. * EEPROM handler
  2467. */
  2468. /*
  2469. * getting EEPROM parameter
  2470. */
  2471. static int nsp32_getprom_param(nsp32_hw_data *data)
  2472. {
  2473. int vendor = data->pci_devid->vendor;
  2474. int device = data->pci_devid->device;
  2475. int ret, val, i;
  2476. /*
  2477. * EEPROM checking.
  2478. */
  2479. ret = nsp32_prom_read(data, 0x7e);
  2480. if (ret != 0x55) {
  2481. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2482. return FALSE;
  2483. }
  2484. ret = nsp32_prom_read(data, 0x7f);
  2485. if (ret != 0xaa) {
  2486. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2487. return FALSE;
  2488. }
  2489. /*
  2490. * check EEPROM type
  2491. */
  2492. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2493. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2494. ret = nsp32_getprom_c16(data);
  2495. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2496. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2497. ret = nsp32_getprom_at24(data);
  2498. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2499. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2500. ret = nsp32_getprom_at24(data);
  2501. } else {
  2502. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2503. ret = FALSE;
  2504. }
  2505. /* for debug : SPROM data full checking */
  2506. for (i = 0; i <= 0x1f; i++) {
  2507. val = nsp32_prom_read(data, i);
  2508. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2509. "rom address 0x%x : 0x%x", i, val);
  2510. }
  2511. return ret;
  2512. }
  2513. /*
  2514. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2515. *
  2516. * ROMADDR
  2517. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2518. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2519. * 0x07 : HBA Synchronous Transfer Period
  2520. * Value 0: AutoSync, 1: Manual Setting
  2521. * 0x08 - 0x0f : Not Used? (0x0)
  2522. * 0x10 : Bus Termination
  2523. * Value 0: Auto[ON], 1: ON, 2: OFF
  2524. * 0x11 : Not Used? (0)
  2525. * 0x12 : Bus Reset Delay Time (0x03)
  2526. * 0x13 : Bootable CD Support
  2527. * Value 0: Disable, 1: Enable
  2528. * 0x14 : Device Scan
  2529. * Bit 7 6 5 4 3 2 1 0
  2530. * | <----------------->
  2531. * | SCSI ID: Value 0: Skip, 1: YES
  2532. * |-> Value 0: ALL scan, Value 1: Manual
  2533. * 0x15 - 0x1b : Not Used? (0)
  2534. * 0x1c : Constant? (0x01) (clock div?)
  2535. * 0x1d - 0x7c : Not Used (0xff)
  2536. * 0x7d : Not Used? (0xff)
  2537. * 0x7e : Constant (0x55), Validity signature
  2538. * 0x7f : Constant (0xaa), Validity signature
  2539. */
  2540. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2541. {
  2542. int ret, i;
  2543. int auto_sync;
  2544. nsp32_target *target;
  2545. int entry;
  2546. /*
  2547. * Reset time which is designated by EEPROM.
  2548. *
  2549. * TODO: Not used yet.
  2550. */
  2551. data->resettime = nsp32_prom_read(data, 0x12);
  2552. /*
  2553. * HBA Synchronous Transfer Period
  2554. *
  2555. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2556. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2557. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2558. * On the contrary if connected SCSI devices are same or higher
  2559. * than 4, then transfer speed is set as FAST-10M.
  2560. *
  2561. * I break this rule. The number of connected SCSI devices are
  2562. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2563. * forced as ULTRA-20M.
  2564. */
  2565. ret = nsp32_prom_read(data, 0x07);
  2566. switch (ret) {
  2567. case 0:
  2568. auto_sync = TRUE;
  2569. break;
  2570. case 1:
  2571. auto_sync = FALSE;
  2572. break;
  2573. default:
  2574. nsp32_msg(KERN_WARNING,
  2575. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2576. auto_sync = TRUE;
  2577. }
  2578. if (trans_mode == ULTRA20M_MODE) {
  2579. auto_sync = TRUE;
  2580. }
  2581. /*
  2582. * each device Synchronous Transfer Period
  2583. */
  2584. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2585. target = &data->target[i];
  2586. if (auto_sync == TRUE) {
  2587. target->limit_entry = 0; /* set as ULTRA20M */
  2588. } else {
  2589. ret = nsp32_prom_read(data, i);
  2590. entry = nsp32_search_period_entry(data, target, ret);
  2591. if (entry < 0) {
  2592. /* search failed... set maximum speed */
  2593. entry = 0;
  2594. }
  2595. target->limit_entry = entry;
  2596. }
  2597. }
  2598. return TRUE;
  2599. }
  2600. /*
  2601. * C16 110 (I-O Data: SC-NBD) data map:
  2602. *
  2603. * ROMADDR
  2604. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2605. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2606. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2607. * 0x08 - 0x0f : Not Used? (0x0)
  2608. * 0x10 : Transfer Mode
  2609. * Value 0: PIO, 1: Busmater
  2610. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2611. * 0x12 : Bus Termination
  2612. * Value 0: Disable, 1: Enable
  2613. * 0x13 - 0x19 : Disconnection
  2614. * Value 0: Disable, 1: Enable
  2615. * 0x1a - 0x7c : Not Used? (0)
  2616. * 0x7d : Not Used? (0xf8)
  2617. * 0x7e : Constant (0x55), Validity signature
  2618. * 0x7f : Constant (0xaa), Validity signature
  2619. */
  2620. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2621. {
  2622. int ret, i;
  2623. nsp32_target *target;
  2624. int entry, val;
  2625. /*
  2626. * Reset time which is designated by EEPROM.
  2627. *
  2628. * TODO: Not used yet.
  2629. */
  2630. data->resettime = nsp32_prom_read(data, 0x11);
  2631. /*
  2632. * each device Synchronous Transfer Period
  2633. */
  2634. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2635. target = &data->target[i];
  2636. ret = nsp32_prom_read(data, i);
  2637. switch (ret) {
  2638. case 0: /* 20MB/s */
  2639. val = 0x0c;
  2640. break;
  2641. case 1: /* 10MB/s */
  2642. val = 0x19;
  2643. break;
  2644. case 2: /* 5MB/s */
  2645. val = 0x32;
  2646. break;
  2647. case 3: /* ASYNC */
  2648. val = 0x00;
  2649. break;
  2650. default: /* default 20MB/s */
  2651. val = 0x0c;
  2652. break;
  2653. }
  2654. entry = nsp32_search_period_entry(data, target, val);
  2655. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2656. /* search failed... set maximum speed */
  2657. entry = 0;
  2658. }
  2659. target->limit_entry = entry;
  2660. }
  2661. return TRUE;
  2662. }
  2663. /*
  2664. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2665. */
  2666. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2667. {
  2668. int i, val;
  2669. /* start condition */
  2670. nsp32_prom_start(data);
  2671. /* device address */
  2672. nsp32_prom_write_bit(data, 1); /* 1 */
  2673. nsp32_prom_write_bit(data, 0); /* 0 */
  2674. nsp32_prom_write_bit(data, 1); /* 1 */
  2675. nsp32_prom_write_bit(data, 0); /* 0 */
  2676. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2677. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2678. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2679. /* R/W: W for dummy write */
  2680. nsp32_prom_write_bit(data, 0);
  2681. /* ack */
  2682. nsp32_prom_write_bit(data, 0);
  2683. /* word address */
  2684. for (i = 7; i >= 0; i--) {
  2685. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2686. }
  2687. /* ack */
  2688. nsp32_prom_write_bit(data, 0);
  2689. /* start condition */
  2690. nsp32_prom_start(data);
  2691. /* device address */
  2692. nsp32_prom_write_bit(data, 1); /* 1 */
  2693. nsp32_prom_write_bit(data, 0); /* 0 */
  2694. nsp32_prom_write_bit(data, 1); /* 1 */
  2695. nsp32_prom_write_bit(data, 0); /* 0 */
  2696. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2697. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2698. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2699. /* R/W: R */
  2700. nsp32_prom_write_bit(data, 1);
  2701. /* ack */
  2702. nsp32_prom_write_bit(data, 0);
  2703. /* data... */
  2704. val = 0;
  2705. for (i = 7; i >= 0; i--) {
  2706. val += (nsp32_prom_read_bit(data) << i);
  2707. }
  2708. /* no ack */
  2709. nsp32_prom_write_bit(data, 1);
  2710. /* stop condition */
  2711. nsp32_prom_stop(data);
  2712. return val;
  2713. }
  2714. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2715. {
  2716. int base = data->BaseAddress;
  2717. int tmp;
  2718. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2719. if (val == 0) {
  2720. tmp &= ~bit;
  2721. } else {
  2722. tmp |= bit;
  2723. }
  2724. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2725. udelay(10);
  2726. }
  2727. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2728. {
  2729. int base = data->BaseAddress;
  2730. int tmp, ret;
  2731. if (bit != SDA) {
  2732. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2733. return 0;
  2734. }
  2735. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2736. if (tmp == 0) {
  2737. ret = 0;
  2738. } else {
  2739. ret = 1;
  2740. }
  2741. udelay(10);
  2742. return ret;
  2743. }
  2744. static void nsp32_prom_start (nsp32_hw_data *data)
  2745. {
  2746. /* start condition */
  2747. nsp32_prom_set(data, SCL, 1);
  2748. nsp32_prom_set(data, SDA, 1);
  2749. nsp32_prom_set(data, ENA, 1); /* output mode */
  2750. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2751. * SDA 1->0 is start condition */
  2752. nsp32_prom_set(data, SCL, 0);
  2753. }
  2754. static void nsp32_prom_stop (nsp32_hw_data *data)
  2755. {
  2756. /* stop condition */
  2757. nsp32_prom_set(data, SCL, 1);
  2758. nsp32_prom_set(data, SDA, 0);
  2759. nsp32_prom_set(data, ENA, 1); /* output mode */
  2760. nsp32_prom_set(data, SDA, 1);
  2761. nsp32_prom_set(data, SCL, 0);
  2762. }
  2763. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2764. {
  2765. /* write */
  2766. nsp32_prom_set(data, SDA, val);
  2767. nsp32_prom_set(data, SCL, 1 );
  2768. nsp32_prom_set(data, SCL, 0 );
  2769. }
  2770. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2771. {
  2772. int val;
  2773. /* read */
  2774. nsp32_prom_set(data, ENA, 0); /* input mode */
  2775. nsp32_prom_set(data, SCL, 1);
  2776. val = nsp32_prom_get(data, SDA);
  2777. nsp32_prom_set(data, SCL, 0);
  2778. nsp32_prom_set(data, ENA, 1); /* output mode */
  2779. return val;
  2780. }
  2781. /**************************************************************************
  2782. * Power Management
  2783. */
  2784. #ifdef CONFIG_PM
  2785. /* Device suspended */
  2786. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2787. {
  2788. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2789. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2790. pci_save_state (pdev);
  2791. pci_disable_device (pdev);
  2792. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2793. return 0;
  2794. }
  2795. /* Device woken up */
  2796. static int nsp32_resume(struct pci_dev *pdev)
  2797. {
  2798. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2799. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2800. unsigned short reg;
  2801. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2802. pci_set_power_state(pdev, PCI_D0);
  2803. pci_enable_wake (pdev, PCI_D0, 0);
  2804. pci_restore_state (pdev);
  2805. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2806. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2807. if (reg == 0xffff) {
  2808. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2809. return 0;
  2810. }
  2811. nsp32hw_init (data);
  2812. nsp32_do_bus_reset(data);
  2813. nsp32_msg(KERN_INFO, "resume success");
  2814. return 0;
  2815. }
  2816. #endif
  2817. /************************************************************************
  2818. * PCI/Cardbus probe/remove routine
  2819. */
  2820. static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2821. {
  2822. int ret;
  2823. nsp32_hw_data *data = &nsp32_data_base;
  2824. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2825. ret = pci_enable_device(pdev);
  2826. if (ret) {
  2827. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2828. return ret;
  2829. }
  2830. data->Pci = pdev;
  2831. data->pci_devid = id;
  2832. data->IrqNumber = pdev->irq;
  2833. data->BaseAddress = pci_resource_start(pdev, 0);
  2834. data->NumAddress = pci_resource_len (pdev, 0);
  2835. data->MmioAddress = pci_ioremap_bar(pdev, 1);
  2836. data->MmioLength = pci_resource_len (pdev, 1);
  2837. pci_set_master(pdev);
  2838. ret = nsp32_detect(pdev);
  2839. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2840. pdev->irq,
  2841. data->MmioAddress, data->MmioLength,
  2842. pci_name(pdev),
  2843. nsp32_model[id->driver_data]);
  2844. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2845. return ret;
  2846. }
  2847. static void nsp32_remove(struct pci_dev *pdev)
  2848. {
  2849. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2850. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2851. scsi_remove_host(host);
  2852. nsp32_release(host);
  2853. scsi_host_put(host);
  2854. }
  2855. static struct pci_driver nsp32_driver = {
  2856. .name = "nsp32",
  2857. .id_table = nsp32_pci_table,
  2858. .probe = nsp32_probe,
  2859. .remove = nsp32_remove,
  2860. #ifdef CONFIG_PM
  2861. .suspend = nsp32_suspend,
  2862. .resume = nsp32_resume,
  2863. #endif
  2864. };
  2865. /*********************************************************************
  2866. * Moule entry point
  2867. */
  2868. static int __init init_nsp32(void) {
  2869. nsp32_msg(KERN_INFO, "loading...");
  2870. return pci_register_driver(&nsp32_driver);
  2871. }
  2872. static void __exit exit_nsp32(void) {
  2873. nsp32_msg(KERN_INFO, "unloading...");
  2874. pci_unregister_driver(&nsp32_driver);
  2875. }
  2876. module_init(init_nsp32);
  2877. module_exit(exit_nsp32);
  2878. /* end */