c67x00-sched.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * c67x00-sched.c: Cypress C67X00 USB Host Controller Driver - TD scheduling
  4. *
  5. * Copyright (C) 2006-2008 Barco N.V.
  6. * Derived from the Cypress cy7c67200/300 ezusb linux driver and
  7. * based on multiple host controller drivers inside the linux kernel.
  8. */
  9. #include <linux/kthread.h>
  10. #include <linux/slab.h>
  11. #include "c67x00.h"
  12. #include "c67x00-hcd.h"
  13. /*
  14. * These are the stages for a control urb, they are kept
  15. * in both urb->interval and td->privdata.
  16. */
  17. #define SETUP_STAGE 0
  18. #define DATA_STAGE 1
  19. #define STATUS_STAGE 2
  20. /* -------------------------------------------------------------------------- */
  21. /**
  22. * struct c67x00_ep_data: Host endpoint data structure
  23. */
  24. struct c67x00_ep_data {
  25. struct list_head queue;
  26. struct list_head node;
  27. struct usb_host_endpoint *hep;
  28. struct usb_device *dev;
  29. u16 next_frame; /* For int/isoc transactions */
  30. };
  31. /**
  32. * struct c67x00_td
  33. *
  34. * Hardware parts are little endiannes, SW in CPU endianess.
  35. */
  36. struct c67x00_td {
  37. /* HW specific part */
  38. __le16 ly_base_addr; /* Bytes 0-1 */
  39. __le16 port_length; /* Bytes 2-3 */
  40. u8 pid_ep; /* Byte 4 */
  41. u8 dev_addr; /* Byte 5 */
  42. u8 ctrl_reg; /* Byte 6 */
  43. u8 status; /* Byte 7 */
  44. u8 retry_cnt; /* Byte 8 */
  45. #define TT_OFFSET 2
  46. #define TT_CONTROL 0
  47. #define TT_ISOCHRONOUS 1
  48. #define TT_BULK 2
  49. #define TT_INTERRUPT 3
  50. u8 residue; /* Byte 9 */
  51. __le16 next_td_addr; /* Bytes 10-11 */
  52. /* SW part */
  53. struct list_head td_list;
  54. u16 td_addr;
  55. void *data;
  56. struct urb *urb;
  57. unsigned long privdata;
  58. /* These are needed for handling the toggle bits:
  59. * an urb can be dequeued while a td is in progress
  60. * after checking the td, the toggle bit might need to
  61. * be fixed */
  62. struct c67x00_ep_data *ep_data;
  63. unsigned int pipe;
  64. };
  65. struct c67x00_urb_priv {
  66. struct list_head hep_node;
  67. struct urb *urb;
  68. int port;
  69. int cnt; /* packet number for isoc */
  70. int status;
  71. struct c67x00_ep_data *ep_data;
  72. };
  73. #define td_udev(td) ((td)->ep_data->dev)
  74. #define CY_TD_SIZE 12
  75. #define TD_PIDEP_OFFSET 0x04
  76. #define TD_PIDEPMASK_PID 0xF0
  77. #define TD_PIDEPMASK_EP 0x0F
  78. #define TD_PORTLENMASK_DL 0x03FF
  79. #define TD_PORTLENMASK_PN 0xC000
  80. #define TD_STATUS_OFFSET 0x07
  81. #define TD_STATUSMASK_ACK 0x01
  82. #define TD_STATUSMASK_ERR 0x02
  83. #define TD_STATUSMASK_TMOUT 0x04
  84. #define TD_STATUSMASK_SEQ 0x08
  85. #define TD_STATUSMASK_SETUP 0x10
  86. #define TD_STATUSMASK_OVF 0x20
  87. #define TD_STATUSMASK_NAK 0x40
  88. #define TD_STATUSMASK_STALL 0x80
  89. #define TD_ERROR_MASK (TD_STATUSMASK_ERR | TD_STATUSMASK_TMOUT | \
  90. TD_STATUSMASK_STALL)
  91. #define TD_RETRYCNT_OFFSET 0x08
  92. #define TD_RETRYCNTMASK_ACT_FLG 0x10
  93. #define TD_RETRYCNTMASK_TX_TYPE 0x0C
  94. #define TD_RETRYCNTMASK_RTY_CNT 0x03
  95. #define TD_RESIDUE_OVERFLOW 0x80
  96. #define TD_PID_IN 0x90
  97. /* Residue: signed 8bits, neg -> OVERFLOW, pos -> UNDERFLOW */
  98. #define td_residue(td) ((__s8)(td->residue))
  99. #define td_ly_base_addr(td) (__le16_to_cpu((td)->ly_base_addr))
  100. #define td_port_length(td) (__le16_to_cpu((td)->port_length))
  101. #define td_next_td_addr(td) (__le16_to_cpu((td)->next_td_addr))
  102. #define td_active(td) ((td)->retry_cnt & TD_RETRYCNTMASK_ACT_FLG)
  103. #define td_length(td) (td_port_length(td) & TD_PORTLENMASK_DL)
  104. #define td_sequence_ok(td) (!td->status || \
  105. (!(td->status & TD_STATUSMASK_SEQ) == \
  106. !(td->ctrl_reg & SEQ_SEL)))
  107. #define td_acked(td) (!td->status || \
  108. (td->status & TD_STATUSMASK_ACK))
  109. #define td_actual_bytes(td) (td_length(td) - td_residue(td))
  110. /* -------------------------------------------------------------------------- */
  111. /**
  112. * dbg_td - Dump the contents of the TD
  113. */
  114. static void dbg_td(struct c67x00_hcd *c67x00, struct c67x00_td *td, char *msg)
  115. {
  116. struct device *dev = c67x00_hcd_dev(c67x00);
  117. dev_dbg(dev, "### %s at 0x%04x\n", msg, td->td_addr);
  118. dev_dbg(dev, "urb: 0x%p\n", td->urb);
  119. dev_dbg(dev, "endpoint: %4d\n", usb_pipeendpoint(td->pipe));
  120. dev_dbg(dev, "pipeout: %4d\n", usb_pipeout(td->pipe));
  121. dev_dbg(dev, "ly_base_addr: 0x%04x\n", td_ly_base_addr(td));
  122. dev_dbg(dev, "port_length: 0x%04x\n", td_port_length(td));
  123. dev_dbg(dev, "pid_ep: 0x%02x\n", td->pid_ep);
  124. dev_dbg(dev, "dev_addr: 0x%02x\n", td->dev_addr);
  125. dev_dbg(dev, "ctrl_reg: 0x%02x\n", td->ctrl_reg);
  126. dev_dbg(dev, "status: 0x%02x\n", td->status);
  127. dev_dbg(dev, "retry_cnt: 0x%02x\n", td->retry_cnt);
  128. dev_dbg(dev, "residue: 0x%02x\n", td->residue);
  129. dev_dbg(dev, "next_td_addr: 0x%04x\n", td_next_td_addr(td));
  130. dev_dbg(dev, "data: %*ph\n", td_length(td), td->data);
  131. }
  132. /* -------------------------------------------------------------------------- */
  133. /* Helper functions */
  134. static inline u16 c67x00_get_current_frame_number(struct c67x00_hcd *c67x00)
  135. {
  136. return c67x00_ll_husb_get_frame(c67x00->sie) & HOST_FRAME_MASK;
  137. }
  138. /**
  139. * frame_add
  140. * Software wraparound for framenumbers.
  141. */
  142. static inline u16 frame_add(u16 a, u16 b)
  143. {
  144. return (a + b) & HOST_FRAME_MASK;
  145. }
  146. /**
  147. * frame_after - is frame a after frame b
  148. */
  149. static inline int frame_after(u16 a, u16 b)
  150. {
  151. return ((HOST_FRAME_MASK + a - b) & HOST_FRAME_MASK) <
  152. (HOST_FRAME_MASK / 2);
  153. }
  154. /**
  155. * frame_after_eq - is frame a after or equal to frame b
  156. */
  157. static inline int frame_after_eq(u16 a, u16 b)
  158. {
  159. return ((HOST_FRAME_MASK + 1 + a - b) & HOST_FRAME_MASK) <
  160. (HOST_FRAME_MASK / 2);
  161. }
  162. /* -------------------------------------------------------------------------- */
  163. /**
  164. * c67x00_release_urb - remove link from all tds to this urb
  165. * Disconnects the urb from it's tds, so that it can be given back.
  166. * pre: urb->hcpriv != NULL
  167. */
  168. static void c67x00_release_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  169. {
  170. struct c67x00_td *td;
  171. struct c67x00_urb_priv *urbp;
  172. BUG_ON(!urb);
  173. c67x00->urb_count--;
  174. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  175. c67x00->urb_iso_count--;
  176. if (c67x00->urb_iso_count == 0)
  177. c67x00->max_frame_bw = MAX_FRAME_BW_STD;
  178. }
  179. /* TODO this might be not so efficient when we've got many urbs!
  180. * Alternatives:
  181. * * only clear when needed
  182. * * keep a list of tds with each urbp
  183. */
  184. list_for_each_entry(td, &c67x00->td_list, td_list)
  185. if (urb == td->urb)
  186. td->urb = NULL;
  187. urbp = urb->hcpriv;
  188. urb->hcpriv = NULL;
  189. list_del(&urbp->hep_node);
  190. kfree(urbp);
  191. }
  192. /* -------------------------------------------------------------------------- */
  193. static struct c67x00_ep_data *
  194. c67x00_ep_data_alloc(struct c67x00_hcd *c67x00, struct urb *urb)
  195. {
  196. struct usb_host_endpoint *hep = urb->ep;
  197. struct c67x00_ep_data *ep_data;
  198. int type;
  199. c67x00->current_frame = c67x00_get_current_frame_number(c67x00);
  200. /* Check if endpoint already has a c67x00_ep_data struct allocated */
  201. if (hep->hcpriv) {
  202. ep_data = hep->hcpriv;
  203. if (frame_after(c67x00->current_frame, ep_data->next_frame))
  204. ep_data->next_frame =
  205. frame_add(c67x00->current_frame, 1);
  206. return hep->hcpriv;
  207. }
  208. /* Allocate and initialize a new c67x00 endpoint data structure */
  209. ep_data = kzalloc(sizeof(*ep_data), GFP_ATOMIC);
  210. if (!ep_data)
  211. return NULL;
  212. INIT_LIST_HEAD(&ep_data->queue);
  213. INIT_LIST_HEAD(&ep_data->node);
  214. ep_data->hep = hep;
  215. /* hold a reference to udev as long as this endpoint lives,
  216. * this is needed to possibly fix the data toggle */
  217. ep_data->dev = usb_get_dev(urb->dev);
  218. hep->hcpriv = ep_data;
  219. /* For ISOC and INT endpoints, start ASAP: */
  220. ep_data->next_frame = frame_add(c67x00->current_frame, 1);
  221. /* Add the endpoint data to one of the pipe lists; must be added
  222. in order of endpoint address */
  223. type = usb_pipetype(urb->pipe);
  224. if (list_empty(&ep_data->node)) {
  225. list_add(&ep_data->node, &c67x00->list[type]);
  226. } else {
  227. struct c67x00_ep_data *prev;
  228. list_for_each_entry(prev, &c67x00->list[type], node) {
  229. if (prev->hep->desc.bEndpointAddress >
  230. hep->desc.bEndpointAddress) {
  231. list_add(&ep_data->node, prev->node.prev);
  232. break;
  233. }
  234. }
  235. }
  236. return ep_data;
  237. }
  238. static int c67x00_ep_data_free(struct usb_host_endpoint *hep)
  239. {
  240. struct c67x00_ep_data *ep_data = hep->hcpriv;
  241. if (!ep_data)
  242. return 0;
  243. if (!list_empty(&ep_data->queue))
  244. return -EBUSY;
  245. usb_put_dev(ep_data->dev);
  246. list_del(&ep_data->queue);
  247. list_del(&ep_data->node);
  248. kfree(ep_data);
  249. hep->hcpriv = NULL;
  250. return 0;
  251. }
  252. void c67x00_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  253. {
  254. struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
  255. unsigned long flags;
  256. if (!list_empty(&ep->urb_list))
  257. dev_warn(c67x00_hcd_dev(c67x00), "error: urb list not empty\n");
  258. spin_lock_irqsave(&c67x00->lock, flags);
  259. /* loop waiting for all transfers in the endpoint queue to complete */
  260. while (c67x00_ep_data_free(ep)) {
  261. /* Drop the lock so we can sleep waiting for the hardware */
  262. spin_unlock_irqrestore(&c67x00->lock, flags);
  263. /* it could happen that we reinitialize this completion, while
  264. * somebody was waiting for that completion. The timeout and
  265. * while loop handle such cases, but this might be improved */
  266. reinit_completion(&c67x00->endpoint_disable);
  267. c67x00_sched_kick(c67x00);
  268. wait_for_completion_timeout(&c67x00->endpoint_disable, 1 * HZ);
  269. spin_lock_irqsave(&c67x00->lock, flags);
  270. }
  271. spin_unlock_irqrestore(&c67x00->lock, flags);
  272. }
  273. /* -------------------------------------------------------------------------- */
  274. static inline int get_root_port(struct usb_device *dev)
  275. {
  276. while (dev->parent->parent)
  277. dev = dev->parent;
  278. return dev->portnum;
  279. }
  280. int c67x00_urb_enqueue(struct usb_hcd *hcd,
  281. struct urb *urb, gfp_t mem_flags)
  282. {
  283. int ret;
  284. unsigned long flags;
  285. struct c67x00_urb_priv *urbp;
  286. struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
  287. int port = get_root_port(urb->dev)-1;
  288. /* Allocate and initialize urb private data */
  289. urbp = kzalloc(sizeof(*urbp), mem_flags);
  290. if (!urbp) {
  291. ret = -ENOMEM;
  292. goto err_urbp;
  293. }
  294. spin_lock_irqsave(&c67x00->lock, flags);
  295. /* Make sure host controller is running */
  296. if (!HC_IS_RUNNING(hcd->state)) {
  297. ret = -ENODEV;
  298. goto err_not_linked;
  299. }
  300. ret = usb_hcd_link_urb_to_ep(hcd, urb);
  301. if (ret)
  302. goto err_not_linked;
  303. INIT_LIST_HEAD(&urbp->hep_node);
  304. urbp->urb = urb;
  305. urbp->port = port;
  306. urbp->ep_data = c67x00_ep_data_alloc(c67x00, urb);
  307. if (!urbp->ep_data) {
  308. ret = -ENOMEM;
  309. goto err_epdata;
  310. }
  311. /* TODO claim bandwidth with usb_claim_bandwidth?
  312. * also release it somewhere! */
  313. urb->hcpriv = urbp;
  314. urb->actual_length = 0; /* Nothing received/transmitted yet */
  315. switch (usb_pipetype(urb->pipe)) {
  316. case PIPE_CONTROL:
  317. urb->interval = SETUP_STAGE;
  318. break;
  319. case PIPE_INTERRUPT:
  320. break;
  321. case PIPE_BULK:
  322. break;
  323. case PIPE_ISOCHRONOUS:
  324. if (c67x00->urb_iso_count == 0)
  325. c67x00->max_frame_bw = MAX_FRAME_BW_ISO;
  326. c67x00->urb_iso_count++;
  327. /* Assume always URB_ISO_ASAP, FIXME */
  328. if (list_empty(&urbp->ep_data->queue))
  329. urb->start_frame = urbp->ep_data->next_frame;
  330. else {
  331. /* Go right after the last one */
  332. struct urb *last_urb;
  333. last_urb = list_entry(urbp->ep_data->queue.prev,
  334. struct c67x00_urb_priv,
  335. hep_node)->urb;
  336. urb->start_frame =
  337. frame_add(last_urb->start_frame,
  338. last_urb->number_of_packets *
  339. last_urb->interval);
  340. }
  341. urbp->cnt = 0;
  342. break;
  343. }
  344. /* Add the URB to the endpoint queue */
  345. list_add_tail(&urbp->hep_node, &urbp->ep_data->queue);
  346. /* If this is the only URB, kick start the controller */
  347. if (!c67x00->urb_count++)
  348. c67x00_ll_hpi_enable_sofeop(c67x00->sie);
  349. c67x00_sched_kick(c67x00);
  350. spin_unlock_irqrestore(&c67x00->lock, flags);
  351. return 0;
  352. err_epdata:
  353. usb_hcd_unlink_urb_from_ep(hcd, urb);
  354. err_not_linked:
  355. spin_unlock_irqrestore(&c67x00->lock, flags);
  356. kfree(urbp);
  357. err_urbp:
  358. return ret;
  359. }
  360. int c67x00_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  361. {
  362. struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
  363. unsigned long flags;
  364. int rc;
  365. spin_lock_irqsave(&c67x00->lock, flags);
  366. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  367. if (rc)
  368. goto done;
  369. c67x00_release_urb(c67x00, urb);
  370. usb_hcd_unlink_urb_from_ep(hcd, urb);
  371. spin_unlock(&c67x00->lock);
  372. usb_hcd_giveback_urb(hcd, urb, status);
  373. spin_lock(&c67x00->lock);
  374. spin_unlock_irqrestore(&c67x00->lock, flags);
  375. return 0;
  376. done:
  377. spin_unlock_irqrestore(&c67x00->lock, flags);
  378. return rc;
  379. }
  380. /* -------------------------------------------------------------------------- */
  381. /*
  382. * pre: c67x00 locked, urb unlocked
  383. */
  384. static void
  385. c67x00_giveback_urb(struct c67x00_hcd *c67x00, struct urb *urb, int status)
  386. {
  387. struct c67x00_urb_priv *urbp;
  388. if (!urb)
  389. return;
  390. urbp = urb->hcpriv;
  391. urbp->status = status;
  392. list_del_init(&urbp->hep_node);
  393. c67x00_release_urb(c67x00, urb);
  394. usb_hcd_unlink_urb_from_ep(c67x00_hcd_to_hcd(c67x00), urb);
  395. spin_unlock(&c67x00->lock);
  396. usb_hcd_giveback_urb(c67x00_hcd_to_hcd(c67x00), urb, status);
  397. spin_lock(&c67x00->lock);
  398. }
  399. /* -------------------------------------------------------------------------- */
  400. static int c67x00_claim_frame_bw(struct c67x00_hcd *c67x00, struct urb *urb,
  401. int len, int periodic)
  402. {
  403. struct c67x00_urb_priv *urbp = urb->hcpriv;
  404. int bit_time;
  405. /* According to the C67x00 BIOS user manual, page 3-18,19, the
  406. * following calculations provide the full speed bit times for
  407. * a transaction.
  408. *
  409. * FS(in) = 112.5 + 9.36*BC + HOST_DELAY
  410. * FS(in,iso) = 90.5 + 9.36*BC + HOST_DELAY
  411. * FS(out) = 112.5 + 9.36*BC + HOST_DELAY
  412. * FS(out,iso) = 78.4 + 9.36*BC + HOST_DELAY
  413. * LS(in) = 802.4 + 75.78*BC + HOST_DELAY
  414. * LS(out) = 802.6 + 74.67*BC + HOST_DELAY
  415. *
  416. * HOST_DELAY == 106 for the c67200 and c67300.
  417. */
  418. /* make calculations in 1/100 bit times to maintain resolution */
  419. if (urbp->ep_data->dev->speed == USB_SPEED_LOW) {
  420. /* Low speed pipe */
  421. if (usb_pipein(urb->pipe))
  422. bit_time = 80240 + 7578*len;
  423. else
  424. bit_time = 80260 + 7467*len;
  425. } else {
  426. /* FS pipes */
  427. if (usb_pipeisoc(urb->pipe))
  428. bit_time = usb_pipein(urb->pipe) ? 9050 : 7840;
  429. else
  430. bit_time = 11250;
  431. bit_time += 936*len;
  432. }
  433. /* Scale back down to integer bit times. Use a host delay of 106.
  434. * (this is the only place it is used) */
  435. bit_time = ((bit_time+50) / 100) + 106;
  436. if (unlikely(bit_time + c67x00->bandwidth_allocated >=
  437. c67x00->max_frame_bw))
  438. return -EMSGSIZE;
  439. if (unlikely(c67x00->next_td_addr + CY_TD_SIZE >=
  440. c67x00->td_base_addr + SIE_TD_SIZE))
  441. return -EMSGSIZE;
  442. if (unlikely(c67x00->next_buf_addr + len >=
  443. c67x00->buf_base_addr + SIE_TD_BUF_SIZE))
  444. return -EMSGSIZE;
  445. if (periodic) {
  446. if (unlikely(bit_time + c67x00->periodic_bw_allocated >=
  447. MAX_PERIODIC_BW(c67x00->max_frame_bw)))
  448. return -EMSGSIZE;
  449. c67x00->periodic_bw_allocated += bit_time;
  450. }
  451. c67x00->bandwidth_allocated += bit_time;
  452. return 0;
  453. }
  454. /* -------------------------------------------------------------------------- */
  455. /**
  456. * td_addr and buf_addr must be word aligned
  457. */
  458. static int c67x00_create_td(struct c67x00_hcd *c67x00, struct urb *urb,
  459. void *data, int len, int pid, int toggle,
  460. unsigned long privdata)
  461. {
  462. struct c67x00_td *td;
  463. struct c67x00_urb_priv *urbp = urb->hcpriv;
  464. const __u8 active_flag = 1, retry_cnt = 3;
  465. __u8 cmd = 0;
  466. int tt = 0;
  467. if (c67x00_claim_frame_bw(c67x00, urb, len, usb_pipeisoc(urb->pipe)
  468. || usb_pipeint(urb->pipe)))
  469. return -EMSGSIZE; /* Not really an error, but expected */
  470. td = kzalloc(sizeof(*td), GFP_ATOMIC);
  471. if (!td)
  472. return -ENOMEM;
  473. td->pipe = urb->pipe;
  474. td->ep_data = urbp->ep_data;
  475. if ((td_udev(td)->speed == USB_SPEED_LOW) &&
  476. !(c67x00->low_speed_ports & (1 << urbp->port)))
  477. cmd |= PREAMBLE_EN;
  478. switch (usb_pipetype(td->pipe)) {
  479. case PIPE_ISOCHRONOUS:
  480. tt = TT_ISOCHRONOUS;
  481. cmd |= ISO_EN;
  482. break;
  483. case PIPE_CONTROL:
  484. tt = TT_CONTROL;
  485. break;
  486. case PIPE_BULK:
  487. tt = TT_BULK;
  488. break;
  489. case PIPE_INTERRUPT:
  490. tt = TT_INTERRUPT;
  491. break;
  492. }
  493. if (toggle)
  494. cmd |= SEQ_SEL;
  495. cmd |= ARM_EN;
  496. /* SW part */
  497. td->td_addr = c67x00->next_td_addr;
  498. c67x00->next_td_addr = c67x00->next_td_addr + CY_TD_SIZE;
  499. /* HW part */
  500. td->ly_base_addr = __cpu_to_le16(c67x00->next_buf_addr);
  501. td->port_length = __cpu_to_le16((c67x00->sie->sie_num << 15) |
  502. (urbp->port << 14) | (len & 0x3FF));
  503. td->pid_ep = ((pid & 0xF) << TD_PIDEP_OFFSET) |
  504. (usb_pipeendpoint(td->pipe) & 0xF);
  505. td->dev_addr = usb_pipedevice(td->pipe) & 0x7F;
  506. td->ctrl_reg = cmd;
  507. td->status = 0;
  508. td->retry_cnt = (tt << TT_OFFSET) | (active_flag << 4) | retry_cnt;
  509. td->residue = 0;
  510. td->next_td_addr = __cpu_to_le16(c67x00->next_td_addr);
  511. /* SW part */
  512. td->data = data;
  513. td->urb = urb;
  514. td->privdata = privdata;
  515. c67x00->next_buf_addr += (len + 1) & ~0x01; /* properly align */
  516. list_add_tail(&td->td_list, &c67x00->td_list);
  517. return 0;
  518. }
  519. static inline void c67x00_release_td(struct c67x00_td *td)
  520. {
  521. list_del_init(&td->td_list);
  522. kfree(td);
  523. }
  524. /* -------------------------------------------------------------------------- */
  525. static int c67x00_add_data_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  526. {
  527. int remaining;
  528. int toggle;
  529. int pid;
  530. int ret = 0;
  531. int maxps;
  532. int need_empty;
  533. toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  534. usb_pipeout(urb->pipe));
  535. remaining = urb->transfer_buffer_length - urb->actual_length;
  536. maxps = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
  537. need_empty = (urb->transfer_flags & URB_ZERO_PACKET) &&
  538. usb_pipeout(urb->pipe) && !(remaining % maxps);
  539. while (remaining || need_empty) {
  540. int len;
  541. char *td_buf;
  542. len = (remaining > maxps) ? maxps : remaining;
  543. if (!len)
  544. need_empty = 0;
  545. pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
  546. td_buf = urb->transfer_buffer + urb->transfer_buffer_length -
  547. remaining;
  548. ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, toggle,
  549. DATA_STAGE);
  550. if (ret)
  551. return ret; /* td wasn't created */
  552. toggle ^= 1;
  553. remaining -= len;
  554. if (usb_pipecontrol(urb->pipe))
  555. break;
  556. }
  557. return 0;
  558. }
  559. /**
  560. * return 0 in case more bandwidth is available, else errorcode
  561. */
  562. static int c67x00_add_ctrl_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  563. {
  564. int ret;
  565. int pid;
  566. switch (urb->interval) {
  567. default:
  568. case SETUP_STAGE:
  569. ret = c67x00_create_td(c67x00, urb, urb->setup_packet,
  570. 8, USB_PID_SETUP, 0, SETUP_STAGE);
  571. if (ret)
  572. return ret;
  573. urb->interval = SETUP_STAGE;
  574. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  575. usb_pipeout(urb->pipe), 1);
  576. break;
  577. case DATA_STAGE:
  578. if (urb->transfer_buffer_length) {
  579. ret = c67x00_add_data_urb(c67x00, urb);
  580. if (ret)
  581. return ret;
  582. break;
  583. } /* else fallthrough */
  584. case STATUS_STAGE:
  585. pid = !usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
  586. ret = c67x00_create_td(c67x00, urb, NULL, 0, pid, 1,
  587. STATUS_STAGE);
  588. if (ret)
  589. return ret;
  590. break;
  591. }
  592. return 0;
  593. }
  594. /*
  595. * return 0 in case more bandwidth is available, else errorcode
  596. */
  597. static int c67x00_add_int_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  598. {
  599. struct c67x00_urb_priv *urbp = urb->hcpriv;
  600. if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) {
  601. urbp->ep_data->next_frame =
  602. frame_add(urbp->ep_data->next_frame, urb->interval);
  603. return c67x00_add_data_urb(c67x00, urb);
  604. }
  605. return 0;
  606. }
  607. static int c67x00_add_iso_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  608. {
  609. struct c67x00_urb_priv *urbp = urb->hcpriv;
  610. if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) {
  611. char *td_buf;
  612. int len, pid, ret;
  613. BUG_ON(urbp->cnt >= urb->number_of_packets);
  614. td_buf = urb->transfer_buffer +
  615. urb->iso_frame_desc[urbp->cnt].offset;
  616. len = urb->iso_frame_desc[urbp->cnt].length;
  617. pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
  618. ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, 0,
  619. urbp->cnt);
  620. if (ret) {
  621. dev_dbg(c67x00_hcd_dev(c67x00), "create failed: %d\n",
  622. ret);
  623. urb->iso_frame_desc[urbp->cnt].actual_length = 0;
  624. urb->iso_frame_desc[urbp->cnt].status = ret;
  625. if (urbp->cnt + 1 == urb->number_of_packets)
  626. c67x00_giveback_urb(c67x00, urb, 0);
  627. }
  628. urbp->ep_data->next_frame =
  629. frame_add(urbp->ep_data->next_frame, urb->interval);
  630. urbp->cnt++;
  631. }
  632. return 0;
  633. }
  634. /* -------------------------------------------------------------------------- */
  635. static void c67x00_fill_from_list(struct c67x00_hcd *c67x00, int type,
  636. int (*add)(struct c67x00_hcd *, struct urb *))
  637. {
  638. struct c67x00_ep_data *ep_data;
  639. struct urb *urb;
  640. /* traverse every endpoint on the list */
  641. list_for_each_entry(ep_data, &c67x00->list[type], node) {
  642. if (!list_empty(&ep_data->queue)) {
  643. /* and add the first urb */
  644. /* isochronous transfer rely on this */
  645. urb = list_entry(ep_data->queue.next,
  646. struct c67x00_urb_priv,
  647. hep_node)->urb;
  648. add(c67x00, urb);
  649. }
  650. }
  651. }
  652. static void c67x00_fill_frame(struct c67x00_hcd *c67x00)
  653. {
  654. struct c67x00_td *td, *ttd;
  655. /* Check if we can proceed */
  656. if (!list_empty(&c67x00->td_list)) {
  657. dev_warn(c67x00_hcd_dev(c67x00),
  658. "TD list not empty! This should not happen!\n");
  659. list_for_each_entry_safe(td, ttd, &c67x00->td_list, td_list) {
  660. dbg_td(c67x00, td, "Unprocessed td");
  661. c67x00_release_td(td);
  662. }
  663. }
  664. /* Reinitialize variables */
  665. c67x00->bandwidth_allocated = 0;
  666. c67x00->periodic_bw_allocated = 0;
  667. c67x00->next_td_addr = c67x00->td_base_addr;
  668. c67x00->next_buf_addr = c67x00->buf_base_addr;
  669. /* Fill the list */
  670. c67x00_fill_from_list(c67x00, PIPE_ISOCHRONOUS, c67x00_add_iso_urb);
  671. c67x00_fill_from_list(c67x00, PIPE_INTERRUPT, c67x00_add_int_urb);
  672. c67x00_fill_from_list(c67x00, PIPE_CONTROL, c67x00_add_ctrl_urb);
  673. c67x00_fill_from_list(c67x00, PIPE_BULK, c67x00_add_data_urb);
  674. }
  675. /* -------------------------------------------------------------------------- */
  676. /**
  677. * Get TD from C67X00
  678. */
  679. static inline void
  680. c67x00_parse_td(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  681. {
  682. c67x00_ll_read_mem_le16(c67x00->sie->dev,
  683. td->td_addr, td, CY_TD_SIZE);
  684. if (usb_pipein(td->pipe) && td_actual_bytes(td))
  685. c67x00_ll_read_mem_le16(c67x00->sie->dev, td_ly_base_addr(td),
  686. td->data, td_actual_bytes(td));
  687. }
  688. static int c67x00_td_to_error(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  689. {
  690. if (td->status & TD_STATUSMASK_ERR) {
  691. dbg_td(c67x00, td, "ERROR_FLAG");
  692. return -EILSEQ;
  693. }
  694. if (td->status & TD_STATUSMASK_STALL) {
  695. /* dbg_td(c67x00, td, "STALL"); */
  696. return -EPIPE;
  697. }
  698. if (td->status & TD_STATUSMASK_TMOUT) {
  699. dbg_td(c67x00, td, "TIMEOUT");
  700. return -ETIMEDOUT;
  701. }
  702. return 0;
  703. }
  704. static inline int c67x00_end_of_data(struct c67x00_td *td)
  705. {
  706. int maxps, need_empty, remaining;
  707. struct urb *urb = td->urb;
  708. int act_bytes;
  709. act_bytes = td_actual_bytes(td);
  710. if (unlikely(!act_bytes))
  711. return 1; /* This was an empty packet */
  712. maxps = usb_maxpacket(td_udev(td), td->pipe, usb_pipeout(td->pipe));
  713. if (unlikely(act_bytes < maxps))
  714. return 1; /* Smaller then full packet */
  715. remaining = urb->transfer_buffer_length - urb->actual_length;
  716. need_empty = (urb->transfer_flags & URB_ZERO_PACKET) &&
  717. usb_pipeout(urb->pipe) && !(remaining % maxps);
  718. if (unlikely(!remaining && !need_empty))
  719. return 1;
  720. return 0;
  721. }
  722. /* -------------------------------------------------------------------------- */
  723. /* Remove all td's from the list which come
  724. * after last_td and are meant for the same pipe.
  725. * This is used when a short packet has occurred */
  726. static inline void c67x00_clear_pipe(struct c67x00_hcd *c67x00,
  727. struct c67x00_td *last_td)
  728. {
  729. struct c67x00_td *td, *tmp;
  730. td = last_td;
  731. tmp = last_td;
  732. while (td->td_list.next != &c67x00->td_list) {
  733. td = list_entry(td->td_list.next, struct c67x00_td, td_list);
  734. if (td->pipe == last_td->pipe) {
  735. c67x00_release_td(td);
  736. td = tmp;
  737. }
  738. tmp = td;
  739. }
  740. }
  741. /* -------------------------------------------------------------------------- */
  742. static void c67x00_handle_successful_td(struct c67x00_hcd *c67x00,
  743. struct c67x00_td *td)
  744. {
  745. struct urb *urb = td->urb;
  746. if (!urb)
  747. return;
  748. urb->actual_length += td_actual_bytes(td);
  749. switch (usb_pipetype(td->pipe)) {
  750. /* isochronous tds are handled separately */
  751. case PIPE_CONTROL:
  752. switch (td->privdata) {
  753. case SETUP_STAGE:
  754. urb->interval =
  755. urb->transfer_buffer_length ?
  756. DATA_STAGE : STATUS_STAGE;
  757. /* Don't count setup_packet with normal data: */
  758. urb->actual_length = 0;
  759. break;
  760. case DATA_STAGE:
  761. if (c67x00_end_of_data(td)) {
  762. urb->interval = STATUS_STAGE;
  763. c67x00_clear_pipe(c67x00, td);
  764. }
  765. break;
  766. case STATUS_STAGE:
  767. urb->interval = 0;
  768. c67x00_giveback_urb(c67x00, urb, 0);
  769. break;
  770. }
  771. break;
  772. case PIPE_INTERRUPT:
  773. case PIPE_BULK:
  774. if (unlikely(c67x00_end_of_data(td))) {
  775. c67x00_clear_pipe(c67x00, td);
  776. c67x00_giveback_urb(c67x00, urb, 0);
  777. }
  778. break;
  779. }
  780. }
  781. static void c67x00_handle_isoc(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  782. {
  783. struct urb *urb = td->urb;
  784. int cnt;
  785. if (!urb)
  786. return;
  787. cnt = td->privdata;
  788. if (td->status & TD_ERROR_MASK)
  789. urb->error_count++;
  790. urb->iso_frame_desc[cnt].actual_length = td_actual_bytes(td);
  791. urb->iso_frame_desc[cnt].status = c67x00_td_to_error(c67x00, td);
  792. if (cnt + 1 == urb->number_of_packets) /* Last packet */
  793. c67x00_giveback_urb(c67x00, urb, 0);
  794. }
  795. /* -------------------------------------------------------------------------- */
  796. /**
  797. * c67x00_check_td_list - handle tds which have been processed by the c67x00
  798. * pre: current_td == 0
  799. */
  800. static inline void c67x00_check_td_list(struct c67x00_hcd *c67x00)
  801. {
  802. struct c67x00_td *td, *tmp;
  803. struct urb *urb;
  804. int ack_ok;
  805. int clear_endpoint;
  806. list_for_each_entry_safe(td, tmp, &c67x00->td_list, td_list) {
  807. /* get the TD */
  808. c67x00_parse_td(c67x00, td);
  809. urb = td->urb; /* urb can be NULL! */
  810. ack_ok = 0;
  811. clear_endpoint = 1;
  812. /* Handle isochronous transfers separately */
  813. if (usb_pipeisoc(td->pipe)) {
  814. clear_endpoint = 0;
  815. c67x00_handle_isoc(c67x00, td);
  816. goto cont;
  817. }
  818. /* When an error occurs, all td's for that pipe go into an
  819. * inactive state. This state matches successful transfers so
  820. * we must make sure not to service them. */
  821. if (td->status & TD_ERROR_MASK) {
  822. c67x00_giveback_urb(c67x00, urb,
  823. c67x00_td_to_error(c67x00, td));
  824. goto cont;
  825. }
  826. if ((td->status & TD_STATUSMASK_NAK) || !td_sequence_ok(td) ||
  827. !td_acked(td))
  828. goto cont;
  829. /* Sequence ok and acked, don't need to fix toggle */
  830. ack_ok = 1;
  831. if (unlikely(td->status & TD_STATUSMASK_OVF)) {
  832. if (td_residue(td) & TD_RESIDUE_OVERFLOW) {
  833. /* Overflow */
  834. c67x00_giveback_urb(c67x00, urb, -EOVERFLOW);
  835. goto cont;
  836. }
  837. }
  838. clear_endpoint = 0;
  839. c67x00_handle_successful_td(c67x00, td);
  840. cont:
  841. if (clear_endpoint)
  842. c67x00_clear_pipe(c67x00, td);
  843. if (ack_ok)
  844. usb_settoggle(td_udev(td), usb_pipeendpoint(td->pipe),
  845. usb_pipeout(td->pipe),
  846. !(td->ctrl_reg & SEQ_SEL));
  847. /* next in list could have been removed, due to clear_pipe! */
  848. tmp = list_entry(td->td_list.next, typeof(*td), td_list);
  849. c67x00_release_td(td);
  850. }
  851. }
  852. /* -------------------------------------------------------------------------- */
  853. static inline int c67x00_all_tds_processed(struct c67x00_hcd *c67x00)
  854. {
  855. /* If all tds are processed, we can check the previous frame (if
  856. * there was any) and start our next frame.
  857. */
  858. return !c67x00_ll_husb_get_current_td(c67x00->sie);
  859. }
  860. /**
  861. * Send td to C67X00
  862. */
  863. static void c67x00_send_td(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  864. {
  865. int len = td_length(td);
  866. if (len && ((td->pid_ep & TD_PIDEPMASK_PID) != TD_PID_IN))
  867. c67x00_ll_write_mem_le16(c67x00->sie->dev, td_ly_base_addr(td),
  868. td->data, len);
  869. c67x00_ll_write_mem_le16(c67x00->sie->dev,
  870. td->td_addr, td, CY_TD_SIZE);
  871. }
  872. static void c67x00_send_frame(struct c67x00_hcd *c67x00)
  873. {
  874. struct c67x00_td *td;
  875. if (list_empty(&c67x00->td_list))
  876. dev_warn(c67x00_hcd_dev(c67x00),
  877. "%s: td list should not be empty here!\n",
  878. __func__);
  879. list_for_each_entry(td, &c67x00->td_list, td_list) {
  880. if (td->td_list.next == &c67x00->td_list)
  881. td->next_td_addr = 0; /* Last td in list */
  882. c67x00_send_td(c67x00, td);
  883. }
  884. c67x00_ll_husb_set_current_td(c67x00->sie, c67x00->td_base_addr);
  885. }
  886. /* -------------------------------------------------------------------------- */
  887. /**
  888. * c67x00_do_work - Schedulers state machine
  889. */
  890. static void c67x00_do_work(struct c67x00_hcd *c67x00)
  891. {
  892. spin_lock(&c67x00->lock);
  893. /* Make sure all tds are processed */
  894. if (!c67x00_all_tds_processed(c67x00))
  895. goto out;
  896. c67x00_check_td_list(c67x00);
  897. /* no td's are being processed (current == 0)
  898. * and all have been "checked" */
  899. complete(&c67x00->endpoint_disable);
  900. if (!list_empty(&c67x00->td_list))
  901. goto out;
  902. c67x00->current_frame = c67x00_get_current_frame_number(c67x00);
  903. if (c67x00->current_frame == c67x00->last_frame)
  904. goto out; /* Don't send tds in same frame */
  905. c67x00->last_frame = c67x00->current_frame;
  906. /* If no urbs are scheduled, our work is done */
  907. if (!c67x00->urb_count) {
  908. c67x00_ll_hpi_disable_sofeop(c67x00->sie);
  909. goto out;
  910. }
  911. c67x00_fill_frame(c67x00);
  912. if (!list_empty(&c67x00->td_list))
  913. /* TD's have been added to the frame */
  914. c67x00_send_frame(c67x00);
  915. out:
  916. spin_unlock(&c67x00->lock);
  917. }
  918. /* -------------------------------------------------------------------------- */
  919. static void c67x00_sched_tasklet(unsigned long __c67x00)
  920. {
  921. struct c67x00_hcd *c67x00 = (struct c67x00_hcd *)__c67x00;
  922. c67x00_do_work(c67x00);
  923. }
  924. void c67x00_sched_kick(struct c67x00_hcd *c67x00)
  925. {
  926. tasklet_hi_schedule(&c67x00->tasklet);
  927. }
  928. int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00)
  929. {
  930. tasklet_init(&c67x00->tasklet, c67x00_sched_tasklet,
  931. (unsigned long)c67x00);
  932. return 0;
  933. }
  934. void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00)
  935. {
  936. tasklet_kill(&c67x00->tasklet);
  937. }