amd5536udc_pci.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * amd5536udc_pci.c -- AMD 5536 UDC high/full speed USB device controller
  4. *
  5. * Copyright (C) 2005-2007 AMD (http://www.amd.com)
  6. * Author: Thomas Dahlmann
  7. */
  8. /*
  9. * The AMD5536 UDC is part of the x86 southbridge AMD Geode CS5536.
  10. * It is a USB Highspeed DMA capable USB device controller. Beside ep0 it
  11. * provides 4 IN and 4 OUT endpoints (bulk or interrupt type).
  12. *
  13. * Make sure that UDC is assigned to port 4 by BIOS settings (port can also
  14. * be used as host port) and UOC bits PAD_EN and APU are set (should be done
  15. * by BIOS init).
  16. *
  17. * UDC DMA requires 32-bit aligned buffers so DMA with gadget ether does not
  18. * work without updating NET_IP_ALIGN. Or PIO mode (module param "use_dma=0")
  19. * can be used with gadget ether.
  20. *
  21. * This file does pci device registration, and the core driver implementation
  22. * is done in amd5536udc.c
  23. *
  24. * The driver is split so as to use the core UDC driver which is based on
  25. * Synopsys device controller IP (different than HS OTG IP) in UDCs
  26. * integrated to SoC platforms.
  27. *
  28. */
  29. /* Driver strings */
  30. #define UDC_MOD_DESCRIPTION "AMD 5536 UDC - USB Device Controller"
  31. /* system */
  32. #include <linux/device.h>
  33. #include <linux/dmapool.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/io.h>
  36. #include <linux/irq.h>
  37. #include <linux/module.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/prefetch.h>
  40. #include <linux/pci.h>
  41. /* udc specific */
  42. #include "amd5536udc.h"
  43. /* pointer to device object */
  44. static struct udc *udc;
  45. /* description */
  46. static const char mod_desc[] = UDC_MOD_DESCRIPTION;
  47. static const char name[] = "amd5536udc-pci";
  48. /* Reset all pci context */
  49. static void udc_pci_remove(struct pci_dev *pdev)
  50. {
  51. struct udc *dev;
  52. dev = pci_get_drvdata(pdev);
  53. usb_del_gadget_udc(&udc->gadget);
  54. /* gadget driver must not be registered */
  55. if (WARN_ON(dev->driver))
  56. return;
  57. /* dma pool cleanup */
  58. free_dma_pools(dev);
  59. /* reset controller */
  60. writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg);
  61. free_irq(pdev->irq, dev);
  62. iounmap(dev->virt_addr);
  63. release_mem_region(pci_resource_start(pdev, 0),
  64. pci_resource_len(pdev, 0));
  65. pci_disable_device(pdev);
  66. udc_remove(dev);
  67. }
  68. /* Called by pci bus driver to init pci context */
  69. static int udc_pci_probe(
  70. struct pci_dev *pdev,
  71. const struct pci_device_id *id
  72. )
  73. {
  74. struct udc *dev;
  75. unsigned long resource;
  76. unsigned long len;
  77. int retval = 0;
  78. /* one udc only */
  79. if (udc) {
  80. dev_dbg(&pdev->dev, "already probed\n");
  81. return -EBUSY;
  82. }
  83. /* init */
  84. dev = kzalloc(sizeof(struct udc), GFP_KERNEL);
  85. if (!dev)
  86. return -ENOMEM;
  87. /* pci setup */
  88. if (pci_enable_device(pdev) < 0) {
  89. retval = -ENODEV;
  90. goto err_pcidev;
  91. }
  92. /* PCI resource allocation */
  93. resource = pci_resource_start(pdev, 0);
  94. len = pci_resource_len(pdev, 0);
  95. if (!request_mem_region(resource, len, name)) {
  96. dev_dbg(&pdev->dev, "pci device used already\n");
  97. retval = -EBUSY;
  98. goto err_memreg;
  99. }
  100. dev->virt_addr = ioremap_nocache(resource, len);
  101. if (!dev->virt_addr) {
  102. dev_dbg(&pdev->dev, "start address cannot be mapped\n");
  103. retval = -EFAULT;
  104. goto err_ioremap;
  105. }
  106. if (!pdev->irq) {
  107. dev_err(&pdev->dev, "irq not set\n");
  108. retval = -ENODEV;
  109. goto err_irq;
  110. }
  111. spin_lock_init(&dev->lock);
  112. /* udc csr registers base */
  113. dev->csr = dev->virt_addr + UDC_CSR_ADDR;
  114. /* dev registers base */
  115. dev->regs = dev->virt_addr + UDC_DEVCFG_ADDR;
  116. /* ep registers base */
  117. dev->ep_regs = dev->virt_addr + UDC_EPREGS_ADDR;
  118. /* fifo's base */
  119. dev->rxfifo = (u32 __iomem *)(dev->virt_addr + UDC_RXFIFO_ADDR);
  120. dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR);
  121. if (request_irq(pdev->irq, udc_irq, IRQF_SHARED, name, dev) != 0) {
  122. dev_dbg(&pdev->dev, "request_irq(%d) fail\n", pdev->irq);
  123. retval = -EBUSY;
  124. goto err_irq;
  125. }
  126. pci_set_drvdata(pdev, dev);
  127. /* chip revision for Hs AMD5536 */
  128. dev->chiprev = pdev->revision;
  129. pci_set_master(pdev);
  130. pci_try_set_mwi(pdev);
  131. dev->phys_addr = resource;
  132. dev->irq = pdev->irq;
  133. dev->pdev = pdev;
  134. dev->dev = &pdev->dev;
  135. /* init dma pools */
  136. if (use_dma) {
  137. retval = init_dma_pools(dev);
  138. if (retval != 0)
  139. goto err_dma;
  140. }
  141. /* general probing */
  142. if (udc_probe(dev)) {
  143. retval = -ENODEV;
  144. goto err_probe;
  145. }
  146. return 0;
  147. err_probe:
  148. if (use_dma)
  149. free_dma_pools(dev);
  150. err_dma:
  151. free_irq(pdev->irq, dev);
  152. err_irq:
  153. iounmap(dev->virt_addr);
  154. err_ioremap:
  155. release_mem_region(resource, len);
  156. err_memreg:
  157. pci_disable_device(pdev);
  158. err_pcidev:
  159. kfree(dev);
  160. return retval;
  161. }
  162. /* PCI device parameters */
  163. static const struct pci_device_id pci_id[] = {
  164. {
  165. PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x2096),
  166. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  167. .class_mask = 0xffffffff,
  168. },
  169. {},
  170. };
  171. MODULE_DEVICE_TABLE(pci, pci_id);
  172. /* PCI functions */
  173. static struct pci_driver udc_pci_driver = {
  174. .name = (char *) name,
  175. .id_table = pci_id,
  176. .probe = udc_pci_probe,
  177. .remove = udc_pci_remove,
  178. };
  179. module_pci_driver(udc_pci_driver);
  180. MODULE_DESCRIPTION(UDC_MOD_DESCRIPTION);
  181. MODULE_AUTHOR("Thomas Dahlmann");
  182. MODULE_LICENSE("GPL");