efuse.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Reinhard Pfau <reinhard.pfau@gdsys.cc>
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/cpu.h>
  10. #include <asm/arch/efuse.h>
  11. #include <asm/arch/soc.h>
  12. #include <linux/mbus.h>
  13. #if defined(CONFIG_MVEBU_EFUSE_FAKE)
  14. #define DRY_RUN
  15. #else
  16. #undef DRY_RUN
  17. #endif
  18. #define MBUS_EFUSE_BASE 0xF6000000
  19. #define MBUS_EFUSE_SIZE BIT(20)
  20. #define MVEBU_EFUSE_CONTROL (MVEBU_REGISTER(0xE4008))
  21. enum {
  22. MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31),
  23. };
  24. struct mvebu_hd_efuse {
  25. u32 bits_31_0;
  26. u32 bits_63_32;
  27. u32 bit64;
  28. u32 reserved0;
  29. };
  30. #ifndef DRY_RUN
  31. static struct mvebu_hd_efuse *efuses =
  32. (struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000);
  33. #else
  34. static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1];
  35. #endif
  36. static int efuse_initialised;
  37. static struct mvebu_hd_efuse *get_efuse_line(int nr)
  38. {
  39. if (nr < 0 || nr > 63 || !efuse_initialised)
  40. return NULL;
  41. return efuses + nr;
  42. }
  43. static void enable_efuse_program(void)
  44. {
  45. #ifndef DRY_RUN
  46. setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
  47. #endif
  48. }
  49. static void disable_efuse_program(void)
  50. {
  51. #ifndef DRY_RUN
  52. clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
  53. #endif
  54. }
  55. static int do_prog_efuse(struct mvebu_hd_efuse *efuse,
  56. struct efuse_val *new_val, u32 mask0, u32 mask1)
  57. {
  58. struct efuse_val val;
  59. val.dwords.d[0] = readl(&efuse->bits_31_0);
  60. val.dwords.d[1] = readl(&efuse->bits_63_32);
  61. val.lock = readl(&efuse->bit64);
  62. if (val.lock & 1)
  63. return -EPERM;
  64. val.dwords.d[0] |= (new_val->dwords.d[0] & mask0);
  65. val.dwords.d[1] |= (new_val->dwords.d[1] & mask1);
  66. val.lock |= new_val->lock;
  67. writel(val.dwords.d[0], &efuse->bits_31_0);
  68. mdelay(1);
  69. writel(val.dwords.d[1], &efuse->bits_63_32);
  70. mdelay(1);
  71. writel(val.lock, &efuse->bit64);
  72. mdelay(5);
  73. return 0;
  74. }
  75. static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
  76. {
  77. struct mvebu_hd_efuse *efuse;
  78. int res = 0;
  79. res = mvebu_efuse_init_hw();
  80. if (res)
  81. return res;
  82. efuse = get_efuse_line(nr);
  83. if (!efuse)
  84. return -ENODEV;
  85. if (!new_val)
  86. return -EINVAL;
  87. /* only write a fuse line with lock bit */
  88. if (!new_val->lock)
  89. return -EINVAL;
  90. /* according to specs ECC protection bits must be 0 on write */
  91. if (new_val->bytes.d[7] & 0xFE)
  92. return -EINVAL;
  93. if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
  94. return 0;
  95. enable_efuse_program();
  96. res = do_prog_efuse(efuse, new_val, mask0, mask1);
  97. disable_efuse_program();
  98. return res;
  99. }
  100. int mvebu_efuse_init_hw(void)
  101. {
  102. int ret;
  103. if (efuse_initialised)
  104. return 0;
  105. ret = mvebu_mbus_add_window_by_id(
  106. CPU_TARGET_SATA23_DFX, 0xA, MBUS_EFUSE_BASE, MBUS_EFUSE_SIZE);
  107. if (ret)
  108. return ret;
  109. efuse_initialised = 1;
  110. return 0;
  111. }
  112. int mvebu_read_efuse(int nr, struct efuse_val *val)
  113. {
  114. struct mvebu_hd_efuse *efuse;
  115. int res;
  116. res = mvebu_efuse_init_hw();
  117. if (res)
  118. return res;
  119. efuse = get_efuse_line(nr);
  120. if (!efuse)
  121. return -ENODEV;
  122. if (!val)
  123. return -EINVAL;
  124. val->dwords.d[0] = readl(&efuse->bits_31_0);
  125. val->dwords.d[1] = readl(&efuse->bits_63_32);
  126. val->lock = readl(&efuse->bit64);
  127. return 0;
  128. }
  129. int mvebu_write_efuse(int nr, struct efuse_val *val)
  130. {
  131. return prog_efuse(nr, val, ~0, ~0);
  132. }
  133. int mvebu_lock_efuse(int nr)
  134. {
  135. struct efuse_val val = {
  136. .lock = 1,
  137. };
  138. return prog_efuse(nr, &val, 0, 0);
  139. }
  140. /*
  141. * wrapper funcs providing the fuse API
  142. *
  143. * we use the following mapping:
  144. * "bank" -> eFuse line
  145. * "word" -> 0: bits 0-31
  146. * 1: bits 32-63
  147. * 2: bit 64 (lock)
  148. */
  149. static struct efuse_val prog_val;
  150. static int valid_prog_words;
  151. int fuse_read(u32 bank, u32 word, u32 *val)
  152. {
  153. struct efuse_val fuse_line;
  154. int res;
  155. if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
  156. return -EINVAL;
  157. res = mvebu_read_efuse(bank, &fuse_line);
  158. if (res)
  159. return res;
  160. if (word < 2)
  161. *val = fuse_line.dwords.d[word];
  162. else
  163. *val = fuse_line.lock;
  164. return res;
  165. }
  166. int fuse_sense(u32 bank, u32 word, u32 *val)
  167. {
  168. /* not supported */
  169. return -ENOSYS;
  170. }
  171. int fuse_prog(u32 bank, u32 word, u32 val)
  172. {
  173. int res = 0;
  174. /*
  175. * NOTE: Fuse line should be written as whole.
  176. * So how can we do that with this API?
  177. * For now: remember values for word == 0 and word == 1 and write the
  178. * whole line when word == 2.
  179. * This implies that we always require all 3 fuse prog cmds (one for
  180. * for each word) to write a single fuse line.
  181. * Exception is a single write to word 2 which will lock the fuse line.
  182. *
  183. * Hope that will be OK.
  184. */
  185. if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
  186. return -EINVAL;
  187. if (word < 2) {
  188. prog_val.dwords.d[word] = val;
  189. valid_prog_words |= (1 << word);
  190. } else if ((valid_prog_words & 3) == 0 && val) {
  191. res = mvebu_lock_efuse(bank);
  192. valid_prog_words = 0;
  193. } else if ((valid_prog_words & 3) != 3 || !val) {
  194. res = -EINVAL;
  195. } else {
  196. prog_val.lock = val != 0;
  197. res = mvebu_write_efuse(bank, &prog_val);
  198. valid_prog_words = 0;
  199. }
  200. return res;
  201. }
  202. int fuse_override(u32 bank, u32 word, u32 val)
  203. {
  204. /* not supported */
  205. return -ENOSYS;
  206. }