m5253.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  4. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  5. */
  6. #ifndef m5253_h
  7. #define m5253_h
  8. /****************************************************************************/
  9. /*
  10. * PLL Module (PLL)
  11. */
  12. /* Register read/write macros */
  13. #define PLL_PLLCR (0x000180)
  14. #define SIM_RSR (0x000000)
  15. #define SIM_SYPCR (0x000001)
  16. #define SIM_SWIVR (0x000002)
  17. #define SIM_SWSR (0x000003)
  18. #define SIM_MPARK (0x00000C)
  19. /* Bit definitions and macros for RSR */
  20. #define SIM_RSR_SWTR (0x20)
  21. #define SIM_RSR_HRST (0x80)
  22. /* Register read/write macros */
  23. #define CIM_MISCCR (0x000500)
  24. #define CIM_ATA_DADDR (0x000504)
  25. #define CIM_ATA_DCOUNT (0x000508)
  26. #define CIM_RTC_TIME (0x00050C)
  27. #define CIM_USB_CANCLK (0x000510)
  28. /* Bit definitions and macros for MISCCR */
  29. #define CIM_MISCCR_ADTA (0x00000001)
  30. #define CIM_MISCCR_ADTD (0x00000002)
  31. #define CIM_MISCCR_ADIE (0x00000004)
  32. #define CIM_MISCCR_ADIC (0x00000008)
  33. #define CIM_MISCCR_ADIP (0x00000010)
  34. #define CIM_MISCCR_CPUEND (0x00000020)
  35. #define CIM_MISCCR_DMAEND (0x00000040)
  36. #define CIM_MISCCR_RTCCLR (0x00000080)
  37. #define CIM_MISCCR_RTCPL (0x00000100)
  38. #define CIM_MISCCR_URIE (0x00000800)
  39. #define CIM_MISCCR_URIC (0x00001000)
  40. #define CIM_MISCCR_URIP (0x00002000)
  41. /* Bit definitions and macros for ATA_DADDR */
  42. #define CIM_ATA_DADDR_ATAADDR(x) (((x)&0x00003FFF)<<2)
  43. #define CIM_ATA_DADDR_RAMADDR(x) (((x)&0x00003FFF)<<18)
  44. /* Bit definitions and macros for ATA_DCOUNT */
  45. #define CIM_ATA_DCOUNT_COUNT(x) (((x)&0x0000FFFF))
  46. #endif /* m5253_h */