io.h 14 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * linux/include/asm-nds/io.h
  4. *
  5. * Copyright (C) 1996-2000 Russell King
  6. *
  7. * Copyright (C) 2011 Andes Technology Corporation
  8. * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
  9. * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
  10. *
  11. * Modifications:
  12. * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
  13. * constant addresses and variable addresses.
  14. * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
  15. * specific IO header files.
  16. * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
  17. * 04-Apr-1999 PJB Added check_signature.
  18. * 12-Dec-1999 RMK More cleanups
  19. * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
  20. */
  21. #ifndef __ASM_NDS_IO_H
  22. #define __ASM_NDS_IO_H
  23. /*
  24. * CAUTION:
  25. * - do not implement for NDS32 Arch yet.
  26. * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
  27. * iinclude asm/io.h
  28. */
  29. #ifdef __KERNEL__
  30. #include <linux/types.h>
  31. #include <asm/byteorder.h>
  32. static inline void sync(void)
  33. {
  34. }
  35. #ifdef CONFIG_ARCH_MAP_SYSMEM
  36. static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
  37. {
  38. if(paddr <PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE)
  39. paddr = paddr | 0x40000000;
  40. return (void *)(uintptr_t)paddr;
  41. }
  42. static inline void *unmap_sysmem(const void *vaddr)
  43. {
  44. phys_addr_t paddr = (phys_addr_t)vaddr;
  45. paddr = paddr & ~0x40000000;
  46. return (void *)(uintptr_t)paddr;
  47. }
  48. static inline phys_addr_t map_to_sysmem(const void *ptr)
  49. {
  50. return (phys_addr_t)(uintptr_t)ptr;
  51. }
  52. #endif
  53. /*
  54. * Generic virtual read/write. Note that we don't support half-word
  55. * read/writes. We define __arch_*[bl] here, and leave __arch_*w
  56. * to the architecture specific code.
  57. */
  58. #define __arch_getb(a) (*(unsigned char *)(a))
  59. #define __arch_getw(a) (*(unsigned short *)(a))
  60. #define __arch_getl(a) (*(unsigned int *)(a))
  61. #define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
  62. #define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
  63. #define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
  64. extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
  65. extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
  66. extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
  67. extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
  68. extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
  69. extern void __raw_readsl(unsigned int addr, void *data, int longlen);
  70. #define __raw_writeb(v, a) __arch_putb(v, a)
  71. #define __raw_writew(v, a) __arch_putw(v, a)
  72. #define __raw_writel(v, a) __arch_putl(v, a)
  73. #define __raw_readb(a) __arch_getb(a)
  74. #define __raw_readw(a) __arch_getw(a)
  75. #define __raw_readl(a) __arch_getl(a)
  76. /*
  77. * TODO: The kernel offers some more advanced versions of barriers, it might
  78. * have some advantages to use them instead of the simple one here.
  79. */
  80. #define dmb() __asm__ __volatile__ ("" : : : "memory")
  81. #define __iormb() dmb()
  82. #define __iowmb() dmb()
  83. static inline void writeb(u8 val, volatile void __iomem *addr)
  84. {
  85. __iowmb();
  86. __arch_putb(val, addr);
  87. }
  88. static inline void writew(u16 val, volatile void __iomem *addr)
  89. {
  90. __iowmb();
  91. __arch_putw(val, addr);
  92. }
  93. static inline void writel(u32 val, volatile void __iomem *addr)
  94. {
  95. __iowmb();
  96. __arch_putl(val, addr);
  97. }
  98. static inline u8 readb(const volatile void __iomem *addr)
  99. {
  100. u8 val;
  101. val = __arch_getb(addr);
  102. __iormb();
  103. return val;
  104. }
  105. static inline u16 readw(const volatile void __iomem *addr)
  106. {
  107. u16 val;
  108. val = __arch_getw(addr);
  109. __iormb();
  110. return val;
  111. }
  112. static inline u32 readl(const volatile void __iomem *addr)
  113. {
  114. u32 val;
  115. val = __arch_getl(addr);
  116. __iormb();
  117. return val;
  118. }
  119. /*
  120. * The compiler seems to be incapable of optimising constants
  121. * properly. Spell it out to the compiler in some cases.
  122. * These are only valid for small values of "off" (< 1<<12)
  123. */
  124. #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
  125. #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
  126. #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
  127. #define __raw_base_readb(base, off) __arch_base_getb(base, off)
  128. #define __raw_base_readw(base, off) __arch_base_getw(base, off)
  129. #define __raw_base_readl(base, off) __arch_base_getl(base, off)
  130. #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
  131. #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
  132. #define out_le32(a, v) out_arch(l, le32, a, v)
  133. #define out_le16(a, v) out_arch(w, le16, a, v)
  134. #define in_le32(a) in_arch(l, le32, a)
  135. #define in_le16(a) in_arch(w, le16, a)
  136. #define out_be32(a, v) out_arch(l, be32, a, v)
  137. #define out_be16(a, v) out_arch(w, be16, a, v)
  138. #define in_be32(a) in_arch(l, be32, a)
  139. #define in_be16(a) in_arch(w, be16, a)
  140. #define out_8(a, v) __raw_writeb(v, a)
  141. #define in_8(a) __raw_readb(a)
  142. /*
  143. * Clear and set bits in one shot. These macros can be used to clear and
  144. * set multiple bits in a register using a single call. These macros can
  145. * also be used to set a multiple-bit bit pattern using a mask, by
  146. * specifying the mask in the 'clear' parameter and the new bit pattern
  147. * in the 'set' parameter.
  148. */
  149. #define clrbits(type, addr, clear) \
  150. out_##type((addr), in_##type(addr) & ~(clear))
  151. #define setbits(type, addr, set) \
  152. out_##type((addr), in_##type(addr) | (set))
  153. #define clrsetbits(type, addr, clear, set) \
  154. out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
  155. #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
  156. #define setbits_be32(addr, set) setbits(be32, addr, set)
  157. #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
  158. #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
  159. #define setbits_le32(addr, set) setbits(le32, addr, set)
  160. #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
  161. #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
  162. #define setbits_be16(addr, set) setbits(be16, addr, set)
  163. #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
  164. #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
  165. #define setbits_le16(addr, set) setbits(le16, addr, set)
  166. #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
  167. #define clrbits_8(addr, clear) clrbits(8, addr, clear)
  168. #define setbits_8(addr, set) setbits(8, addr, set)
  169. #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
  170. /*
  171. * Now, pick up the machine-defined IO definitions
  172. * #include <asm/arch/io.h>
  173. */
  174. /*
  175. * IO port access primitives
  176. * -------------------------
  177. *
  178. * The NDS32 doesn't have special IO access instructions just like ARM;
  179. * all IO is memory mapped.
  180. * Note that these are defined to perform little endian accesses
  181. * only. Their primary purpose is to access PCI and ISA peripherals.
  182. *
  183. * Note that for a big endian machine, this implies that the following
  184. * big endian mode connectivity is in place, as described by numerious
  185. * ARM documents:
  186. *
  187. * PCI: D0-D7 D8-D15 D16-D23 D24-D31
  188. * ARM: D24-D31 D16-D23 D8-D15 D0-D7
  189. *
  190. * The machine specific io.h include defines __io to translate an "IO"
  191. * address to a memory address.
  192. *
  193. * Note that we prevent GCC re-ordering or caching values in expressions
  194. * by introducing sequence points into the in*() definitions. Note that
  195. * __raw_* do not guarantee this behaviour.
  196. *
  197. * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  198. */
  199. #ifdef __io
  200. #define outb(v, p) __raw_writeb(v, __io(p))
  201. #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
  202. #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
  203. #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
  204. #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
  205. #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
  206. #define outsb(p, d, l) writesb(__io(p), d, l)
  207. #define outsw(p, d, l) writesw(__io(p), d, l)
  208. #define outsl(p, d, l) writesl(__io(p), d, l)
  209. #define insb(p, d, l) readsb(__io(p), d, l)
  210. #define insw(p, d, l) readsw(__io(p), d, l)
  211. #define insl(p, d, l) readsl(__io(p), d, l)
  212. static inline void readsb(unsigned int *addr, void * data, int bytelen)
  213. {
  214. unsigned char *ptr = (unsigned char *)addr;
  215. unsigned char *ptr2 = (unsigned char *)data;
  216. while (bytelen) {
  217. *ptr2 = *ptr;
  218. ptr2++;
  219. bytelen--;
  220. }
  221. }
  222. static inline void readsw(unsigned int *addr, void * data, int wordlen)
  223. {
  224. unsigned short *ptr = (unsigned short *)addr;
  225. unsigned short *ptr2 = (unsigned short *)data;
  226. while (wordlen) {
  227. *ptr2 = *ptr;
  228. ptr2++;
  229. wordlen--;
  230. }
  231. }
  232. static inline void readsl(unsigned int *addr, void * data, int longlen)
  233. {
  234. unsigned int *ptr = (unsigned int *)addr;
  235. unsigned int *ptr2 = (unsigned int *)data;
  236. while (longlen) {
  237. *ptr2 = *ptr;
  238. ptr2++;
  239. longlen--;
  240. }
  241. }
  242. static inline void writesb(unsigned int *addr, const void * data, int bytelen)
  243. {
  244. unsigned char *ptr = (unsigned char *)addr;
  245. unsigned char *ptr2 = (unsigned char *)data;
  246. while (bytelen) {
  247. *ptr = *ptr2;
  248. ptr2++;
  249. bytelen--;
  250. }
  251. }
  252. static inline void writesw(unsigned int *addr, const void * data, int wordlen)
  253. {
  254. unsigned short *ptr = (unsigned short *)addr;
  255. unsigned short *ptr2 = (unsigned short *)data;
  256. while (wordlen) {
  257. *ptr = *ptr2;
  258. ptr2++;
  259. wordlen--;
  260. }
  261. }
  262. static inline void writesl(unsigned int *addr, const void * data, int longlen)
  263. {
  264. unsigned int *ptr = (unsigned int *)addr;
  265. unsigned int *ptr2 = (unsigned int *)data;
  266. while (longlen) {
  267. *ptr = *ptr2;
  268. ptr2++;
  269. longlen--;
  270. }
  271. }
  272. #endif
  273. #define outb_p(val, port) outb((val), (port))
  274. #define outw_p(val, port) outw((val), (port))
  275. #define outl_p(val, port) outl((val), (port))
  276. #define inb_p(port) inb((port))
  277. #define inw_p(port) inw((port))
  278. #define inl_p(port) inl((port))
  279. #define outsb_p(port, from, len) outsb(port, from, len)
  280. #define outsw_p(port, from, len) outsw(port, from, len)
  281. #define outsl_p(port, from, len) outsl(port, from, len)
  282. #define insb_p(port, to, len) insb(port, to, len)
  283. #define insw_p(port, to, len) insw(port, to, len)
  284. #define insl_p(port, to, len) insl(port, to, len)
  285. /*
  286. * DMA-consistent mapping functions. These allocate/free a region of
  287. * uncached, unwrite-buffered mapped memory space for use with DMA
  288. * devices. This is the "generic" version. The PCI specific version
  289. * is in pci.h
  290. */
  291. extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
  292. extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
  293. extern void consistent_sync(void *vaddr, size_t size, int rw);
  294. /*
  295. * String version of IO memory access ops:
  296. */
  297. extern void _memcpy_fromio(void *, unsigned long, size_t);
  298. extern void _memcpy_toio(unsigned long, const void *, size_t);
  299. extern void _memset_io(unsigned long, int, size_t);
  300. extern void __readwrite_bug(const char *fn);
  301. /*
  302. * If this architecture has PCI memory IO, then define the read/write
  303. * macros. These should only be used with the cookie passed from
  304. * ioremap.
  305. */
  306. #ifdef __mem_pci
  307. #define readb(c) ({ unsigned int __v = \
  308. __raw_readb(__mem_pci(c)); __v; })
  309. #define readw(c) ({ unsigned int __v = \
  310. le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
  311. #define readl(c) ({ unsigned int __v = \
  312. le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
  313. #define writeb(v, c) __raw_writeb(v, __mem_pci(c))
  314. #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
  315. #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
  316. #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
  317. #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
  318. #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
  319. #define eth_io_copy_and_sum(s, c, l, b) \
  320. eth_copy_and_sum((s), __mem_pci(c), (l), (b))
  321. static inline int
  322. check_signature(unsigned long io_addr, const unsigned char *signature,
  323. int length)
  324. {
  325. int retval = 0;
  326. do {
  327. if (readb(io_addr) != *signature)
  328. goto out;
  329. io_addr++;
  330. signature++;
  331. length--;
  332. } while (length);
  333. retval = 1;
  334. out:
  335. return retval;
  336. }
  337. #endif /* __mem_pci */
  338. /*
  339. * If this architecture has ISA IO, then define the isa_read/isa_write
  340. * macros.
  341. */
  342. #ifdef __mem_isa
  343. #define isa_readb(addr) __raw_readb(__mem_isa(addr))
  344. #define isa_readw(addr) __raw_readw(__mem_isa(addr))
  345. #define isa_readl(addr) __raw_readl(__mem_isa(addr))
  346. #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
  347. #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
  348. #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
  349. #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
  350. #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
  351. #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
  352. #define isa_eth_io_copy_and_sum(a, b, c, d) \
  353. eth_copy_and_sum((a), __mem_isa(b), (c), (d))
  354. static inline int
  355. isa_check_signature(unsigned long io_addr, const unsigned char *signature,
  356. int length)
  357. {
  358. int retval = 0;
  359. do {
  360. if (isa_readb(io_addr) != *signature)
  361. goto out;
  362. io_addr++;
  363. signature++;
  364. length--;
  365. } while (length);
  366. retval = 1;
  367. out:
  368. return retval;
  369. }
  370. #else /* __mem_isa */
  371. #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
  372. #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
  373. #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
  374. #define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
  375. #define isa_writew(val, addr) __readwrite_bug("isa_writew")
  376. #define isa_writel(val, addr) __readwrite_bug("isa_writel")
  377. #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
  378. #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
  379. #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
  380. #define isa_eth_io_copy_and_sum(a, b, c, d) \
  381. __readwrite_bug("isa_eth_io_copy_and_sum")
  382. #define isa_check_signature(io, sig, len) (0)
  383. #endif /* __mem_isa */
  384. #include <asm-generic/io.h>
  385. #endif /* __KERNEL__ */
  386. #endif /* __ASM_NDS_IO_H */