byteorder.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Based on Linux/Xtensa kernel version
  4. *
  5. * Copyright (C) 2001 - 2007 Tensilica Inc.
  6. */
  7. #ifndef _XTENSA_BYTEORDER_H
  8. #define _XTENSA_BYTEORDER_H
  9. #include <asm/types.h>
  10. static inline __attribute__((const)) __u32 ___arch__swab32(__u32 x)
  11. {
  12. __u32 res;
  13. /* instruction sequence from Xtensa ISA release 2/2000 */
  14. __asm__("ssai 8\n\t"
  15. "srli %0, %1, 16\n\t"
  16. "src %0, %0, %1\n\t"
  17. "src %0, %0, %0\n\t"
  18. "src %0, %1, %0\n"
  19. : "=&a" (res)
  20. : "a" (x)
  21. );
  22. return res;
  23. }
  24. static inline __attribute__((const)) __u16 ___arch__swab16(__u16 x)
  25. {
  26. /*
  27. * Given that 'short' values are signed (i.e., can be negative),
  28. * we cannot assume that the upper 16-bits of the register are
  29. * zero. We are careful to mask values after shifting.
  30. */
  31. /*
  32. * There exists an anomaly between xt-gcc and xt-xcc. xt-gcc
  33. * inserts an extui instruction after putting this function inline
  34. * to ensure that it uses only the least-significant 16 bits of
  35. * the result. xt-xcc doesn't use an extui, but assumes the
  36. * __asm__ macro follows convention that the upper 16 bits of an
  37. * 'unsigned short' result are still zero. This macro doesn't
  38. * follow convention; indeed, it leaves garbage in the upport 16
  39. * bits of the register.
  40. *
  41. * Declaring the temporary variables 'res' and 'tmp' to be 32-bit
  42. * types while the return type of the function is a 16-bit type
  43. * forces both compilers to insert exactly one extui instruction
  44. * (or equivalent) to mask off the upper 16 bits.
  45. */
  46. __u32 res;
  47. __u32 tmp;
  48. __asm__("extui %1, %2, 8, 8\n\t"
  49. "slli %0, %2, 8\n\t"
  50. "or %0, %0, %1\n"
  51. : "=&a" (res), "=&a" (tmp)
  52. : "a" (x)
  53. );
  54. return res;
  55. }
  56. #define __arch__swab32(x) ___arch__swab32(x)
  57. #define __arch__swab16(x) ___arch__swab16(x)
  58. #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
  59. # define __BYTEORDER_HAS_U64__
  60. # define __SWAB_64_THRU_32__
  61. #endif
  62. #ifdef __XTENSA_EL__
  63. # include <linux/byteorder/little_endian.h>
  64. #elif defined(__XTENSA_EB__)
  65. # include <linux/byteorder/big_endian.h>
  66. #else
  67. # error processor byte order undefined!
  68. #endif
  69. #endif /* _XTENSA_BYTEORDER_H */