sleep.S 4.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #include <linux/errno.h>
  3. #include <linux/linkage.h>
  4. #include <asm/asm-offsets.h>
  5. #include <asm/assembler.h>
  6. .text
  7. /*
  8. * Implementation of MPIDR_EL1 hash algorithm through shifting
  9. * and OR'ing.
  10. *
  11. * @dst: register containing hash result
  12. * @rs0: register containing affinity level 0 bit shift
  13. * @rs1: register containing affinity level 1 bit shift
  14. * @rs2: register containing affinity level 2 bit shift
  15. * @rs3: register containing affinity level 3 bit shift
  16. * @mpidr: register containing MPIDR_EL1 value
  17. * @mask: register containing MPIDR mask
  18. *
  19. * Pseudo C-code:
  20. *
  21. *u32 dst;
  22. *
  23. *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
  24. * u32 aff0, aff1, aff2, aff3;
  25. * u64 mpidr_masked = mpidr & mask;
  26. * aff0 = mpidr_masked & 0xff;
  27. * aff1 = mpidr_masked & 0xff00;
  28. * aff2 = mpidr_masked & 0xff0000;
  29. * aff2 = mpidr_masked & 0xff00000000;
  30. * dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
  31. *}
  32. * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
  33. * Output register: dst
  34. * Note: input and output registers must be disjoint register sets
  35. (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
  36. */
  37. .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
  38. and \mpidr, \mpidr, \mask // mask out MPIDR bits
  39. and \dst, \mpidr, #0xff // mask=aff0
  40. lsr \dst ,\dst, \rs0 // dst=aff0>>rs0
  41. and \mask, \mpidr, #0xff00 // mask = aff1
  42. lsr \mask ,\mask, \rs1
  43. orr \dst, \dst, \mask // dst|=(aff1>>rs1)
  44. and \mask, \mpidr, #0xff0000 // mask = aff2
  45. lsr \mask ,\mask, \rs2
  46. orr \dst, \dst, \mask // dst|=(aff2>>rs2)
  47. and \mask, \mpidr, #0xff00000000 // mask = aff3
  48. lsr \mask ,\mask, \rs3
  49. orr \dst, \dst, \mask // dst|=(aff3>>rs3)
  50. .endm
  51. /*
  52. * Save CPU state in the provided sleep_stack_data area, and publish its
  53. * location for cpu_resume()'s use in sleep_save_stash.
  54. *
  55. * cpu_resume() will restore this saved state, and return. Because the
  56. * link-register is saved and restored, it will appear to return from this
  57. * function. So that the caller can tell the suspend/resume paths apart,
  58. * __cpu_suspend_enter() will always return a non-zero value, whereas the
  59. * path through cpu_resume() will return 0.
  60. *
  61. * x0 = struct sleep_stack_data area
  62. */
  63. ENTRY(__cpu_suspend_enter)
  64. stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
  65. stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
  66. stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
  67. stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
  68. stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
  69. stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
  70. /* save the sp in cpu_suspend_ctx */
  71. mov x2, sp
  72. str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
  73. /* find the mpidr_hash */
  74. ldr_l x1, sleep_save_stash
  75. mrs x7, mpidr_el1
  76. adr_l x9, mpidr_hash
  77. ldr x10, [x9, #MPIDR_HASH_MASK]
  78. /*
  79. * Following code relies on the struct mpidr_hash
  80. * members size.
  81. */
  82. ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS]
  83. ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
  84. compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
  85. add x1, x1, x8, lsl #3
  86. str x0, [x1]
  87. add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
  88. stp x29, lr, [sp, #-16]!
  89. bl cpu_do_suspend
  90. ldp x29, lr, [sp], #16
  91. mov x0, #1
  92. ret
  93. ENDPROC(__cpu_suspend_enter)
  94. .pushsection ".idmap.text", "awx"
  95. ENTRY(cpu_resume)
  96. bl el2_setup // if in EL2 drop to EL1 cleanly
  97. bl __cpu_setup
  98. /* enable the MMU early - so we can access sleep_save_stash by va */
  99. bl __enable_mmu
  100. ldr x8, =_cpu_resume
  101. br x8
  102. ENDPROC(cpu_resume)
  103. .ltorg
  104. .popsection
  105. ENTRY(_cpu_resume)
  106. mrs x1, mpidr_el1
  107. adr_l x8, mpidr_hash // x8 = struct mpidr_hash virt address
  108. /* retrieve mpidr_hash members to compute the hash */
  109. ldr x2, [x8, #MPIDR_HASH_MASK]
  110. ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
  111. ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
  112. compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
  113. /* x7 contains hash index, let's use it to grab context pointer */
  114. ldr_l x0, sleep_save_stash
  115. ldr x0, [x0, x7, lsl #3]
  116. add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
  117. add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
  118. /* load sp from context */
  119. ldr x2, [x0, #CPU_CTX_SP]
  120. mov sp, x2
  121. /*
  122. * cpu_do_resume expects x0 to contain context address pointer
  123. */
  124. bl cpu_do_resume
  125. #ifdef CONFIG_KASAN
  126. mov x0, sp
  127. bl kasan_unpoison_task_stack_below
  128. #endif
  129. ldp x19, x20, [x29, #16]
  130. ldp x21, x22, [x29, #32]
  131. ldp x23, x24, [x29, #48]
  132. ldp x25, x26, [x29, #64]
  133. ldp x27, x28, [x29, #80]
  134. ldp x29, lr, [x29]
  135. mov x0, #0
  136. ret
  137. ENDPROC(_cpu_resume)