i2c-algo-bit.c 17 KB

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  1. /* -------------------------------------------------------------------------
  2. * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
  3. * -------------------------------------------------------------------------
  4. * Copyright (C) 1995-2000 Simon G. Vogl
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. * ------------------------------------------------------------------------- */
  14. /* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
  15. <kmalkki@cc.hut.fi> and Jean Delvare <jdelvare@suse.de> */
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/delay.h>
  19. #include <linux/errno.h>
  20. #include <linux/sched.h>
  21. #include <linux/i2c.h>
  22. #include <linux/i2c-algo-bit.h>
  23. /* ----- global defines ----------------------------------------------- */
  24. #ifdef DEBUG
  25. #define bit_dbg(level, dev, format, args...) \
  26. do { \
  27. if (i2c_debug >= level) \
  28. dev_dbg(dev, format, ##args); \
  29. } while (0)
  30. #else
  31. #define bit_dbg(level, dev, format, args...) \
  32. do {} while (0)
  33. #endif /* DEBUG */
  34. /* ----- global variables --------------------------------------------- */
  35. static int bit_test; /* see if the line-setting functions work */
  36. module_param(bit_test, int, S_IRUGO);
  37. MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
  38. #ifdef DEBUG
  39. static int i2c_debug = 1;
  40. module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
  41. MODULE_PARM_DESC(i2c_debug,
  42. "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
  43. #endif
  44. /* --- setting states on the bus with the right timing: --------------- */
  45. #define setsda(adap, val) adap->setsda(adap->data, val)
  46. #define setscl(adap, val) adap->setscl(adap->data, val)
  47. #define getsda(adap) adap->getsda(adap->data)
  48. #define getscl(adap) adap->getscl(adap->data)
  49. static inline void sdalo(struct i2c_algo_bit_data *adap)
  50. {
  51. setsda(adap, 0);
  52. udelay((adap->udelay + 1) / 2);
  53. }
  54. static inline void sdahi(struct i2c_algo_bit_data *adap)
  55. {
  56. setsda(adap, 1);
  57. udelay((adap->udelay + 1) / 2);
  58. }
  59. static inline void scllo(struct i2c_algo_bit_data *adap)
  60. {
  61. setscl(adap, 0);
  62. udelay(adap->udelay / 2);
  63. }
  64. /*
  65. * Raise scl line, and do checking for delays. This is necessary for slower
  66. * devices.
  67. */
  68. static int sclhi(struct i2c_algo_bit_data *adap)
  69. {
  70. unsigned long start;
  71. setscl(adap, 1);
  72. /* Not all adapters have scl sense line... */
  73. if (!adap->getscl)
  74. goto done;
  75. start = jiffies;
  76. while (!getscl(adap)) {
  77. /* This hw knows how to read the clock line, so we wait
  78. * until it actually gets high. This is safer as some
  79. * chips may hold it low ("clock stretching") while they
  80. * are processing data internally.
  81. */
  82. if (time_after(jiffies, start + adap->timeout)) {
  83. /* Test one last time, as we may have been preempted
  84. * between last check and timeout test.
  85. */
  86. if (getscl(adap))
  87. break;
  88. return -ETIMEDOUT;
  89. }
  90. cpu_relax();
  91. }
  92. #ifdef DEBUG
  93. if (jiffies != start && i2c_debug >= 3)
  94. pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n",
  95. jiffies - start);
  96. #endif
  97. done:
  98. udelay(adap->udelay);
  99. return 0;
  100. }
  101. /* --- other auxiliary functions -------------------------------------- */
  102. static void i2c_start(struct i2c_algo_bit_data *adap)
  103. {
  104. /* assert: scl, sda are high */
  105. setsda(adap, 0);
  106. udelay(adap->udelay);
  107. scllo(adap);
  108. }
  109. static void i2c_repstart(struct i2c_algo_bit_data *adap)
  110. {
  111. /* assert: scl is low */
  112. sdahi(adap);
  113. sclhi(adap);
  114. setsda(adap, 0);
  115. udelay(adap->udelay);
  116. scllo(adap);
  117. }
  118. static void i2c_stop(struct i2c_algo_bit_data *adap)
  119. {
  120. /* assert: scl is low */
  121. sdalo(adap);
  122. sclhi(adap);
  123. setsda(adap, 1);
  124. udelay(adap->udelay);
  125. }
  126. /* send a byte without start cond., look for arbitration,
  127. check ackn. from slave */
  128. /* returns:
  129. * 1 if the device acknowledged
  130. * 0 if the device did not ack
  131. * -ETIMEDOUT if an error occurred (while raising the scl line)
  132. */
  133. static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
  134. {
  135. int i;
  136. int sb;
  137. int ack;
  138. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  139. /* assert: scl is low */
  140. for (i = 7; i >= 0; i--) {
  141. sb = (c >> i) & 1;
  142. setsda(adap, sb);
  143. udelay((adap->udelay + 1) / 2);
  144. if (sclhi(adap) < 0) { /* timed out */
  145. bit_dbg(1, &i2c_adap->dev,
  146. "i2c_outb: 0x%02x, timeout at bit #%d\n",
  147. (int)c, i);
  148. return -ETIMEDOUT;
  149. }
  150. /* FIXME do arbitration here:
  151. * if (sb && !getsda(adap)) -> ouch! Get out of here.
  152. *
  153. * Report a unique code, so higher level code can retry
  154. * the whole (combined) message and *NOT* issue STOP.
  155. */
  156. scllo(adap);
  157. }
  158. sdahi(adap);
  159. if (sclhi(adap) < 0) { /* timeout */
  160. bit_dbg(1, &i2c_adap->dev,
  161. "i2c_outb: 0x%02x, timeout at ack\n", (int)c);
  162. return -ETIMEDOUT;
  163. }
  164. /* read ack: SDA should be pulled down by slave, or it may
  165. * NAK (usually to report problems with the data we wrote).
  166. */
  167. ack = !getsda(adap); /* ack: sda is pulled low -> success */
  168. bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
  169. ack ? "A" : "NA");
  170. scllo(adap);
  171. return ack;
  172. /* assert: scl is low (sda undef) */
  173. }
  174. static int i2c_inb(struct i2c_adapter *i2c_adap)
  175. {
  176. /* read byte via i2c port, without start/stop sequence */
  177. /* acknowledge is sent in i2c_read. */
  178. int i;
  179. unsigned char indata = 0;
  180. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  181. /* assert: scl is low */
  182. sdahi(adap);
  183. for (i = 0; i < 8; i++) {
  184. if (sclhi(adap) < 0) { /* timeout */
  185. bit_dbg(1, &i2c_adap->dev,
  186. "i2c_inb: timeout at bit #%d\n",
  187. 7 - i);
  188. return -ETIMEDOUT;
  189. }
  190. indata *= 2;
  191. if (getsda(adap))
  192. indata |= 0x01;
  193. setscl(adap, 0);
  194. udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
  195. }
  196. /* assert: scl is low */
  197. return indata;
  198. }
  199. /*
  200. * Sanity check for the adapter hardware - check the reaction of
  201. * the bus lines only if it seems to be idle.
  202. */
  203. static int test_bus(struct i2c_adapter *i2c_adap)
  204. {
  205. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  206. const char *name = i2c_adap->name;
  207. int scl, sda, ret;
  208. if (adap->pre_xfer) {
  209. ret = adap->pre_xfer(i2c_adap);
  210. if (ret < 0)
  211. return -ENODEV;
  212. }
  213. if (adap->getscl == NULL)
  214. pr_info("%s: Testing SDA only, SCL is not readable\n", name);
  215. sda = getsda(adap);
  216. scl = (adap->getscl == NULL) ? 1 : getscl(adap);
  217. if (!scl || !sda) {
  218. printk(KERN_WARNING
  219. "%s: bus seems to be busy (scl=%d, sda=%d)\n",
  220. name, scl, sda);
  221. goto bailout;
  222. }
  223. sdalo(adap);
  224. sda = getsda(adap);
  225. scl = (adap->getscl == NULL) ? 1 : getscl(adap);
  226. if (sda) {
  227. printk(KERN_WARNING "%s: SDA stuck high!\n", name);
  228. goto bailout;
  229. }
  230. if (!scl) {
  231. printk(KERN_WARNING
  232. "%s: SCL unexpected low while pulling SDA low!\n",
  233. name);
  234. goto bailout;
  235. }
  236. sdahi(adap);
  237. sda = getsda(adap);
  238. scl = (adap->getscl == NULL) ? 1 : getscl(adap);
  239. if (!sda) {
  240. printk(KERN_WARNING "%s: SDA stuck low!\n", name);
  241. goto bailout;
  242. }
  243. if (!scl) {
  244. printk(KERN_WARNING
  245. "%s: SCL unexpected low while pulling SDA high!\n",
  246. name);
  247. goto bailout;
  248. }
  249. scllo(adap);
  250. sda = getsda(adap);
  251. scl = (adap->getscl == NULL) ? 0 : getscl(adap);
  252. if (scl) {
  253. printk(KERN_WARNING "%s: SCL stuck high!\n", name);
  254. goto bailout;
  255. }
  256. if (!sda) {
  257. printk(KERN_WARNING
  258. "%s: SDA unexpected low while pulling SCL low!\n",
  259. name);
  260. goto bailout;
  261. }
  262. sclhi(adap);
  263. sda = getsda(adap);
  264. scl = (adap->getscl == NULL) ? 1 : getscl(adap);
  265. if (!scl) {
  266. printk(KERN_WARNING "%s: SCL stuck low!\n", name);
  267. goto bailout;
  268. }
  269. if (!sda) {
  270. printk(KERN_WARNING
  271. "%s: SDA unexpected low while pulling SCL high!\n",
  272. name);
  273. goto bailout;
  274. }
  275. if (adap->post_xfer)
  276. adap->post_xfer(i2c_adap);
  277. pr_info("%s: Test OK\n", name);
  278. return 0;
  279. bailout:
  280. sdahi(adap);
  281. sclhi(adap);
  282. if (adap->post_xfer)
  283. adap->post_xfer(i2c_adap);
  284. return -ENODEV;
  285. }
  286. /* ----- Utility functions
  287. */
  288. /* try_address tries to contact a chip for a number of
  289. * times before it gives up.
  290. * return values:
  291. * 1 chip answered
  292. * 0 chip did not answer
  293. * -x transmission error
  294. */
  295. static int try_address(struct i2c_adapter *i2c_adap,
  296. unsigned char addr, int retries)
  297. {
  298. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  299. int i, ret = 0;
  300. for (i = 0; i <= retries; i++) {
  301. ret = i2c_outb(i2c_adap, addr);
  302. if (ret == 1 || i == retries)
  303. break;
  304. bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
  305. i2c_stop(adap);
  306. udelay(adap->udelay);
  307. yield();
  308. bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
  309. i2c_start(adap);
  310. }
  311. if (i && ret)
  312. bit_dbg(1, &i2c_adap->dev,
  313. "Used %d tries to %s client at 0x%02x: %s\n", i + 1,
  314. addr & 1 ? "read from" : "write to", addr >> 1,
  315. ret == 1 ? "success" : "failed, timeout?");
  316. return ret;
  317. }
  318. static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
  319. {
  320. const unsigned char *temp = msg->buf;
  321. int count = msg->len;
  322. unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
  323. int retval;
  324. int wrcount = 0;
  325. while (count > 0) {
  326. retval = i2c_outb(i2c_adap, *temp);
  327. /* OK/ACK; or ignored NAK */
  328. if ((retval > 0) || (nak_ok && (retval == 0))) {
  329. count--;
  330. temp++;
  331. wrcount++;
  332. /* A slave NAKing the master means the slave didn't like
  333. * something about the data it saw. For example, maybe
  334. * the SMBus PEC was wrong.
  335. */
  336. } else if (retval == 0) {
  337. dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
  338. return -EIO;
  339. /* Timeout; or (someday) lost arbitration
  340. *
  341. * FIXME Lost ARB implies retrying the transaction from
  342. * the first message, after the "winning" master issues
  343. * its STOP. As a rule, upper layer code has no reason
  344. * to know or care about this ... it is *NOT* an error.
  345. */
  346. } else {
  347. dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
  348. retval);
  349. return retval;
  350. }
  351. }
  352. return wrcount;
  353. }
  354. static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
  355. {
  356. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  357. /* assert: sda is high */
  358. if (is_ack) /* send ack */
  359. setsda(adap, 0);
  360. udelay((adap->udelay + 1) / 2);
  361. if (sclhi(adap) < 0) { /* timeout */
  362. dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
  363. return -ETIMEDOUT;
  364. }
  365. scllo(adap);
  366. return 0;
  367. }
  368. static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
  369. {
  370. int inval;
  371. int rdcount = 0; /* counts bytes read */
  372. unsigned char *temp = msg->buf;
  373. int count = msg->len;
  374. const unsigned flags = msg->flags;
  375. while (count > 0) {
  376. inval = i2c_inb(i2c_adap);
  377. if (inval >= 0) {
  378. *temp = inval;
  379. rdcount++;
  380. } else { /* read timed out */
  381. break;
  382. }
  383. temp++;
  384. count--;
  385. /* Some SMBus transactions require that we receive the
  386. transaction length as the first read byte. */
  387. if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
  388. if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
  389. if (!(flags & I2C_M_NO_RD_ACK))
  390. acknak(i2c_adap, 0);
  391. dev_err(&i2c_adap->dev,
  392. "readbytes: invalid block length (%d)\n",
  393. inval);
  394. return -EPROTO;
  395. }
  396. /* The original count value accounts for the extra
  397. bytes, that is, either 1 for a regular transaction,
  398. or 2 for a PEC transaction. */
  399. count += inval;
  400. msg->len += inval;
  401. }
  402. bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
  403. inval,
  404. (flags & I2C_M_NO_RD_ACK)
  405. ? "(no ack/nak)"
  406. : (count ? "A" : "NA"));
  407. if (!(flags & I2C_M_NO_RD_ACK)) {
  408. inval = acknak(i2c_adap, count);
  409. if (inval < 0)
  410. return inval;
  411. }
  412. }
  413. return rdcount;
  414. }
  415. /* doAddress initiates the transfer by generating the start condition (in
  416. * try_address) and transmits the address in the necessary format to handle
  417. * reads, writes as well as 10bit-addresses.
  418. * returns:
  419. * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
  420. * -x an error occurred (like: -ENXIO if the device did not answer, or
  421. * -ETIMEDOUT, for example if the lines are stuck...)
  422. */
  423. static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
  424. {
  425. unsigned short flags = msg->flags;
  426. unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
  427. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  428. unsigned char addr;
  429. int ret, retries;
  430. retries = nak_ok ? 0 : i2c_adap->retries;
  431. if (flags & I2C_M_TEN) {
  432. /* a ten bit address */
  433. addr = 0xf0 | ((msg->addr >> 7) & 0x06);
  434. bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
  435. /* try extended address code...*/
  436. ret = try_address(i2c_adap, addr, retries);
  437. if ((ret != 1) && !nak_ok) {
  438. dev_err(&i2c_adap->dev,
  439. "died at extended address code\n");
  440. return -ENXIO;
  441. }
  442. /* the remaining 8 bit address */
  443. ret = i2c_outb(i2c_adap, msg->addr & 0xff);
  444. if ((ret != 1) && !nak_ok) {
  445. /* the chip did not ack / xmission error occurred */
  446. dev_err(&i2c_adap->dev, "died at 2nd address code\n");
  447. return -ENXIO;
  448. }
  449. if (flags & I2C_M_RD) {
  450. bit_dbg(3, &i2c_adap->dev,
  451. "emitting repeated start condition\n");
  452. i2c_repstart(adap);
  453. /* okay, now switch into reading mode */
  454. addr |= 0x01;
  455. ret = try_address(i2c_adap, addr, retries);
  456. if ((ret != 1) && !nak_ok) {
  457. dev_err(&i2c_adap->dev,
  458. "died at repeated address code\n");
  459. return -EIO;
  460. }
  461. }
  462. } else { /* normal 7bit address */
  463. addr = i2c_8bit_addr_from_msg(msg);
  464. if (flags & I2C_M_REV_DIR_ADDR)
  465. addr ^= 1;
  466. ret = try_address(i2c_adap, addr, retries);
  467. if ((ret != 1) && !nak_ok)
  468. return -ENXIO;
  469. }
  470. return 0;
  471. }
  472. static int bit_xfer(struct i2c_adapter *i2c_adap,
  473. struct i2c_msg msgs[], int num)
  474. {
  475. struct i2c_msg *pmsg;
  476. struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
  477. int i, ret;
  478. unsigned short nak_ok;
  479. if (adap->pre_xfer) {
  480. ret = adap->pre_xfer(i2c_adap);
  481. if (ret < 0)
  482. return ret;
  483. }
  484. bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
  485. i2c_start(adap);
  486. for (i = 0; i < num; i++) {
  487. pmsg = &msgs[i];
  488. nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
  489. if (!(pmsg->flags & I2C_M_NOSTART)) {
  490. if (i) {
  491. if (msgs[i - 1].flags & I2C_M_STOP) {
  492. bit_dbg(3, &i2c_adap->dev,
  493. "emitting enforced stop/start condition\n");
  494. i2c_stop(adap);
  495. i2c_start(adap);
  496. } else {
  497. bit_dbg(3, &i2c_adap->dev,
  498. "emitting repeated start condition\n");
  499. i2c_repstart(adap);
  500. }
  501. }
  502. ret = bit_doAddress(i2c_adap, pmsg);
  503. if ((ret != 0) && !nak_ok) {
  504. bit_dbg(1, &i2c_adap->dev,
  505. "NAK from device addr 0x%02x msg #%d\n",
  506. msgs[i].addr, i);
  507. goto bailout;
  508. }
  509. }
  510. if (pmsg->flags & I2C_M_RD) {
  511. /* read bytes into buffer*/
  512. ret = readbytes(i2c_adap, pmsg);
  513. if (ret >= 1)
  514. bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
  515. ret, ret == 1 ? "" : "s");
  516. if (ret < pmsg->len) {
  517. if (ret >= 0)
  518. ret = -EIO;
  519. goto bailout;
  520. }
  521. } else {
  522. /* write bytes from buffer */
  523. ret = sendbytes(i2c_adap, pmsg);
  524. if (ret >= 1)
  525. bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
  526. ret, ret == 1 ? "" : "s");
  527. if (ret < pmsg->len) {
  528. if (ret >= 0)
  529. ret = -EIO;
  530. goto bailout;
  531. }
  532. }
  533. }
  534. ret = i;
  535. bailout:
  536. bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
  537. i2c_stop(adap);
  538. if (adap->post_xfer)
  539. adap->post_xfer(i2c_adap);
  540. return ret;
  541. }
  542. static u32 bit_func(struct i2c_adapter *adap)
  543. {
  544. return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |
  545. I2C_FUNC_SMBUS_READ_BLOCK_DATA |
  546. I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
  547. I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
  548. }
  549. /* -----exported algorithm data: ------------------------------------- */
  550. const struct i2c_algorithm i2c_bit_algo = {
  551. .master_xfer = bit_xfer,
  552. .functionality = bit_func,
  553. };
  554. EXPORT_SYMBOL(i2c_bit_algo);
  555. static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
  556. .flags = I2C_AQ_NO_CLK_STRETCH,
  557. };
  558. /*
  559. * registering functions to load algorithms at runtime
  560. */
  561. static int __i2c_bit_add_bus(struct i2c_adapter *adap,
  562. int (*add_adapter)(struct i2c_adapter *))
  563. {
  564. struct i2c_algo_bit_data *bit_adap = adap->algo_data;
  565. int ret;
  566. if (bit_test) {
  567. ret = test_bus(adap);
  568. if (bit_test >= 2 && ret < 0)
  569. return -ENODEV;
  570. }
  571. /* register new adapter to i2c module... */
  572. adap->algo = &i2c_bit_algo;
  573. adap->retries = 3;
  574. if (bit_adap->getscl == NULL)
  575. adap->quirks = &i2c_bit_quirk_no_clk_stretch;
  576. /*
  577. * We tried forcing SCL/SDA to an initial state here. But that caused a
  578. * regression, sadly. Check Bugzilla #200045 for details.
  579. */
  580. ret = add_adapter(adap);
  581. if (ret < 0)
  582. return ret;
  583. /* Complain if SCL can't be read */
  584. if (bit_adap->getscl == NULL) {
  585. dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
  586. dev_warn(&adap->dev, "Bus may be unreliable\n");
  587. }
  588. return 0;
  589. }
  590. int i2c_bit_add_bus(struct i2c_adapter *adap)
  591. {
  592. return __i2c_bit_add_bus(adap, i2c_add_adapter);
  593. }
  594. EXPORT_SYMBOL(i2c_bit_add_bus);
  595. int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
  596. {
  597. return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
  598. }
  599. EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
  600. MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
  601. MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
  602. MODULE_LICENSE("GPL");