dwl_linux.h 4.1 KB

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  1. /*------------------------------------------------------------------------------
  2. -- --
  3. -- This software is confidential and proprietary and may be used --
  4. -- only as expressly authorized by a licensing agreement from --
  5. -- --
  6. -- Hantro Products Oy. --
  7. -- --
  8. -- (C) COPYRIGHT 2006 HANTRO PRODUCTS OY --
  9. -- ALL RIGHTS RESERVED --
  10. -- --
  11. -- The entire notice above must be reproduced --
  12. -- on all copies and should not be removed. --
  13. -- --
  14. --------------------------------------------------------------------------------
  15. --
  16. -- Description : dwl common part header file
  17. --
  18. ------------------------------------------------------------------------------
  19. --
  20. -- Version control information, please leave untouched.
  21. --
  22. -- $RCSfile: dwl_linux.h,v $
  23. -- $Revision: 1.8 $
  24. -- $Date: 2008/11/28 12:32:33 $
  25. --
  26. ------------------------------------------------------------------------------*/
  27. #include <linux/module.h>
  28. #include <linux/platform_device.h>
  29. #include "basetype.h"
  30. #include "dwl.h"
  31. //#include <assert.h>
  32. //#include <stdio.h>
  33. //#include <stdlib.h>
  34. //#include <string.h>
  35. #ifdef USE_EFENCE
  36. #include "efence.h"
  37. #endif
  38. //#define _DWL_DEBUG
  39. #ifdef _DWL_DEBUG
  40. #define DWL_DEBUG(fmt, args...) printf(__FILE__ ":%d: " fmt, __LINE__ , ## args)
  41. #else
  42. #define DWL_DEBUG(fmt, args...) //printk(__FILE__ ":%d: " fmt, __LINE__ , ## args)/* not debugging: nothing */
  43. #endif
  44. #ifdef INTERNAL_TEST
  45. #define REG_DUMP_FILE "swreg.trc"
  46. #endif
  47. #ifndef HX170DEC_IO_BASE
  48. #define HX170DEC_IO_BASE 0xE0900000U
  49. #endif
  50. #define HX170PP_REG_START 0xF0
  51. #define HX170DEC_REG_START 0x4
  52. #define HX170PP_SYNTH_CFG 100
  53. #define HX170DEC_SYNTH_CFG 50
  54. #define HX170DEC_SYNTH_CFG_2 54
  55. #define HX170PP_FUSE_CFG 99
  56. #define HX170DEC_FUSE_CFG 57
  57. #define DWL_DECODER_INT ((DWLReadReg(dec_dwl, HX170DEC_REG_START) >> 12) & 0xFFU)
  58. #define DWL_PP_INT ((DWLReadReg(dec_dwl, HX170PP_REG_START) >> 12) & 0xFFU)
  59. #define DEC_IRQ_ABORT (1 << 11)
  60. #define DEC_IRQ_RDY (1 << 12)
  61. #define DEC_IRQ_BUS (1 << 13)
  62. #define DEC_IRQ_BUFFER (1 << 14)
  63. #define DEC_IRQ_ASO (1 << 15)
  64. #define DEC_IRQ_ERROR (1 << 16)
  65. #define DEC_IRQ_SLICE (1 << 17)
  66. #define DEC_IRQ_TIMEOUT (1 << 18)
  67. #define PP_IRQ_RDY (1 << 12)
  68. #define PP_IRQ_BUS (1 << 13)
  69. #define DWL_STREAM_ERROR_BIT 0x010000 /* 16th bit */
  70. #define DWL_HW_TIMEOUT_BIT 0x040000 /* 18th bit */
  71. #define DWL_HW_ENABLE_BIT 0x000001 /* 0th bit */
  72. #define DWL_HW_PIC_RDY_BIT 0x001000 /* 12th bit */
  73. #ifdef _DWL_HW_PERFORMANCE
  74. /* signal that decoder/pp is enabled */
  75. void DwlDecoderEnable(void);
  76. void DwlPpEnable(void);
  77. #endif
  78. /* Function prototypes */
  79. /* wrapper information */
  80. typedef struct hX170dwl
  81. {
  82. u32 clientType;
  83. u32 numCores;
  84. int fd_memalloc; /* linear memory allocator */
  85. volatile u32 *pRegBase; /* IO mem base */
  86. u32 regSize; /* IO mem size */
  87. u32 freeLinMem; /* Start address of free linear memory */
  88. u32 freeRefFrmMem; /* Start address of free reference frame memory */
  89. #ifdef INTERNAL_TEST
  90. FILE *regDump;
  91. #endif
  92. u32 bPPReserved;
  93. } hX170dwl_t;
  94. i32 DWLWaitPpHwReady(const void *instance, u32 timeout);
  95. i32 DWLWaitDecHwReady(const void *instance, u32 timeout);
  96. u32 *DWLMapRegisters(int mem_dev, unsigned int base,
  97. unsigned int regSize, u32 write);
  98. void DWLUnmapRegisters(const void *io, unsigned int regSize);
  99. void DWLSoftResetAsic(void);