spi-mem.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Exceet Electronics GmbH
  4. * Copyright (C) 2018 Bootlin
  5. *
  6. * Author: Boris Brezillon <boris.brezillon@bootlin.com>
  7. */
  8. #include <linux/dmaengine.h>
  9. #include <linux/pm_runtime.h>
  10. #include <linux/spi/spi.h>
  11. #include <linux/spi/spi-mem.h>
  12. #include "internals.h"
  13. #define SPI_MEM_MAX_BUSWIDTH 4
  14. /**
  15. * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
  16. * memory operation
  17. * @ctlr: the SPI controller requesting this dma_map()
  18. * @op: the memory operation containing the buffer to map
  19. * @sgt: a pointer to a non-initialized sg_table that will be filled by this
  20. * function
  21. *
  22. * Some controllers might want to do DMA on the data buffer embedded in @op.
  23. * This helper prepares everything for you and provides a ready-to-use
  24. * sg_table. This function is not intended to be called from spi drivers.
  25. * Only SPI controller drivers should use it.
  26. * Note that the caller must ensure the memory region pointed by
  27. * op->data.buf.{in,out} is DMA-able before calling this function.
  28. *
  29. * Return: 0 in case of success, a negative error code otherwise.
  30. */
  31. int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
  32. const struct spi_mem_op *op,
  33. struct sg_table *sgt)
  34. {
  35. struct device *dmadev;
  36. if (!op->data.nbytes)
  37. return -EINVAL;
  38. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  39. dmadev = ctlr->dma_tx->device->dev;
  40. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  41. dmadev = ctlr->dma_rx->device->dev;
  42. else
  43. dmadev = ctlr->dev.parent;
  44. if (!dmadev)
  45. return -EINVAL;
  46. return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
  47. op->data.dir == SPI_MEM_DATA_IN ?
  48. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  49. }
  50. EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
  51. /**
  52. * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
  53. * memory operation
  54. * @ctlr: the SPI controller requesting this dma_unmap()
  55. * @op: the memory operation containing the buffer to unmap
  56. * @sgt: a pointer to an sg_table previously initialized by
  57. * spi_controller_dma_map_mem_op_data()
  58. *
  59. * Some controllers might want to do DMA on the data buffer embedded in @op.
  60. * This helper prepares things so that the CPU can access the
  61. * op->data.buf.{in,out} buffer again.
  62. *
  63. * This function is not intended to be called from SPI drivers. Only SPI
  64. * controller drivers should use it.
  65. *
  66. * This function should be called after the DMA operation has finished and is
  67. * only valid if the previous spi_controller_dma_map_mem_op_data() call
  68. * returned 0.
  69. *
  70. * Return: 0 in case of success, a negative error code otherwise.
  71. */
  72. void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
  73. const struct spi_mem_op *op,
  74. struct sg_table *sgt)
  75. {
  76. struct device *dmadev;
  77. if (!op->data.nbytes)
  78. return;
  79. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  80. dmadev = ctlr->dma_tx->device->dev;
  81. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  82. dmadev = ctlr->dma_rx->device->dev;
  83. else
  84. dmadev = ctlr->dev.parent;
  85. spi_unmap_buf(ctlr, dmadev, sgt,
  86. op->data.dir == SPI_MEM_DATA_IN ?
  87. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  88. }
  89. EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
  90. static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
  91. {
  92. u32 mode = mem->spi->mode;
  93. switch (buswidth) {
  94. case 1:
  95. return 0;
  96. case 2:
  97. if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
  98. (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
  99. return 0;
  100. break;
  101. case 4:
  102. if ((tx && (mode & SPI_TX_QUAD)) ||
  103. (!tx && (mode & SPI_RX_QUAD)))
  104. return 0;
  105. break;
  106. default:
  107. break;
  108. }
  109. return -ENOTSUPP;
  110. }
  111. static bool spi_mem_default_supports_op(struct spi_mem *mem,
  112. const struct spi_mem_op *op)
  113. {
  114. if (spi_check_buswidth_req(mem, op->cmd.buswidth, true))
  115. return false;
  116. if (op->addr.nbytes &&
  117. spi_check_buswidth_req(mem, op->addr.buswidth, true))
  118. return false;
  119. if (op->dummy.nbytes &&
  120. spi_check_buswidth_req(mem, op->dummy.buswidth, true))
  121. return false;
  122. if (op->data.nbytes &&
  123. spi_check_buswidth_req(mem, op->data.buswidth,
  124. op->data.dir == SPI_MEM_DATA_OUT))
  125. return false;
  126. return true;
  127. }
  128. EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
  129. static bool spi_mem_buswidth_is_valid(u8 buswidth)
  130. {
  131. if (hweight8(buswidth) > 1 || buswidth > SPI_MEM_MAX_BUSWIDTH)
  132. return false;
  133. return true;
  134. }
  135. static int spi_mem_check_op(const struct spi_mem_op *op)
  136. {
  137. if (!op->cmd.buswidth)
  138. return -EINVAL;
  139. if ((op->addr.nbytes && !op->addr.buswidth) ||
  140. (op->dummy.nbytes && !op->dummy.buswidth) ||
  141. (op->data.nbytes && !op->data.buswidth))
  142. return -EINVAL;
  143. if (!spi_mem_buswidth_is_valid(op->cmd.buswidth) ||
  144. !spi_mem_buswidth_is_valid(op->addr.buswidth) ||
  145. !spi_mem_buswidth_is_valid(op->dummy.buswidth) ||
  146. !spi_mem_buswidth_is_valid(op->data.buswidth))
  147. return -EINVAL;
  148. return 0;
  149. }
  150. static bool spi_mem_internal_supports_op(struct spi_mem *mem,
  151. const struct spi_mem_op *op)
  152. {
  153. struct spi_controller *ctlr = mem->spi->controller;
  154. if (ctlr->mem_ops && ctlr->mem_ops->supports_op)
  155. return ctlr->mem_ops->supports_op(mem, op);
  156. return spi_mem_default_supports_op(mem, op);
  157. }
  158. /**
  159. * spi_mem_supports_op() - Check if a memory device and the controller it is
  160. * connected to support a specific memory operation
  161. * @mem: the SPI memory
  162. * @op: the memory operation to check
  163. *
  164. * Some controllers are only supporting Single or Dual IOs, others might only
  165. * support specific opcodes, or it can even be that the controller and device
  166. * both support Quad IOs but the hardware prevents you from using it because
  167. * only 2 IO lines are connected.
  168. *
  169. * This function checks whether a specific operation is supported.
  170. *
  171. * Return: true if @op is supported, false otherwise.
  172. */
  173. bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
  174. {
  175. if (spi_mem_check_op(op))
  176. return false;
  177. return spi_mem_internal_supports_op(mem, op);
  178. }
  179. EXPORT_SYMBOL_GPL(spi_mem_supports_op);
  180. /**
  181. * spi_mem_exec_op() - Execute a memory operation
  182. * @mem: the SPI memory
  183. * @op: the memory operation to execute
  184. *
  185. * Executes a memory operation.
  186. *
  187. * This function first checks that @op is supported and then tries to execute
  188. * it.
  189. *
  190. * Return: 0 in case of success, a negative error code otherwise.
  191. */
  192. int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
  193. {
  194. unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
  195. struct spi_controller *ctlr = mem->spi->controller;
  196. struct spi_transfer xfers[4] = { };
  197. struct spi_message msg;
  198. u8 *tmpbuf;
  199. int ret;
  200. ret = spi_mem_check_op(op);
  201. if (ret)
  202. return ret;
  203. if (!spi_mem_internal_supports_op(mem, op))
  204. return -ENOTSUPP;
  205. if (ctlr->mem_ops) {
  206. /*
  207. * Flush the message queue before executing our SPI memory
  208. * operation to prevent preemption of regular SPI transfers.
  209. */
  210. spi_flush_queue(ctlr);
  211. if (ctlr->auto_runtime_pm) {
  212. ret = pm_runtime_get_sync(ctlr->dev.parent);
  213. if (ret < 0) {
  214. dev_err(&ctlr->dev,
  215. "Failed to power device: %d\n",
  216. ret);
  217. return ret;
  218. }
  219. }
  220. mutex_lock(&ctlr->bus_lock_mutex);
  221. mutex_lock(&ctlr->io_mutex);
  222. ret = ctlr->mem_ops->exec_op(mem, op);
  223. mutex_unlock(&ctlr->io_mutex);
  224. mutex_unlock(&ctlr->bus_lock_mutex);
  225. if (ctlr->auto_runtime_pm)
  226. pm_runtime_put(ctlr->dev.parent);
  227. /*
  228. * Some controllers only optimize specific paths (typically the
  229. * read path) and expect the core to use the regular SPI
  230. * interface in other cases.
  231. */
  232. if (!ret || ret != -ENOTSUPP)
  233. return ret;
  234. }
  235. tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
  236. op->dummy.nbytes;
  237. /*
  238. * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
  239. * we're guaranteed that this buffer is DMA-able, as required by the
  240. * SPI layer.
  241. */
  242. tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
  243. if (!tmpbuf)
  244. return -ENOMEM;
  245. spi_message_init(&msg);
  246. tmpbuf[0] = op->cmd.opcode;
  247. xfers[xferpos].tx_buf = tmpbuf;
  248. xfers[xferpos].len = sizeof(op->cmd.opcode);
  249. xfers[xferpos].tx_nbits = op->cmd.buswidth;
  250. spi_message_add_tail(&xfers[xferpos], &msg);
  251. xferpos++;
  252. totalxferlen++;
  253. if (op->addr.nbytes) {
  254. int i;
  255. for (i = 0; i < op->addr.nbytes; i++)
  256. tmpbuf[i + 1] = op->addr.val >>
  257. (8 * (op->addr.nbytes - i - 1));
  258. xfers[xferpos].tx_buf = tmpbuf + 1;
  259. xfers[xferpos].len = op->addr.nbytes;
  260. xfers[xferpos].tx_nbits = op->addr.buswidth;
  261. spi_message_add_tail(&xfers[xferpos], &msg);
  262. xferpos++;
  263. totalxferlen += op->addr.nbytes;
  264. }
  265. if (op->dummy.nbytes) {
  266. memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
  267. xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
  268. xfers[xferpos].len = op->dummy.nbytes;
  269. xfers[xferpos].tx_nbits = op->dummy.buswidth;
  270. spi_message_add_tail(&xfers[xferpos], &msg);
  271. xferpos++;
  272. totalxferlen += op->dummy.nbytes;
  273. }
  274. if (op->data.nbytes) {
  275. if (op->data.dir == SPI_MEM_DATA_IN) {
  276. xfers[xferpos].rx_buf = op->data.buf.in;
  277. xfers[xferpos].rx_nbits = op->data.buswidth;
  278. } else {
  279. xfers[xferpos].tx_buf = op->data.buf.out;
  280. xfers[xferpos].tx_nbits = op->data.buswidth;
  281. }
  282. xfers[xferpos].len = op->data.nbytes;
  283. spi_message_add_tail(&xfers[xferpos], &msg);
  284. xferpos++;
  285. totalxferlen += op->data.nbytes;
  286. }
  287. ret = spi_sync(mem->spi, &msg);
  288. kfree(tmpbuf);
  289. if (ret)
  290. return ret;
  291. if (msg.actual_length != totalxferlen)
  292. return -EIO;
  293. return 0;
  294. }
  295. EXPORT_SYMBOL_GPL(spi_mem_exec_op);
  296. /**
  297. * spi_mem_get_name() - Return the SPI mem device name to be used by the
  298. * upper layer if necessary
  299. * @mem: the SPI memory
  300. *
  301. * This function allows SPI mem users to retrieve the SPI mem device name.
  302. * It is useful if the upper layer needs to expose a custom name for
  303. * compatibility reasons.
  304. *
  305. * Return: a string containing the name of the memory device to be used
  306. * by the SPI mem user
  307. */
  308. const char *spi_mem_get_name(struct spi_mem *mem)
  309. {
  310. return mem->name;
  311. }
  312. EXPORT_SYMBOL_GPL(spi_mem_get_name);
  313. /**
  314. * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
  315. * match controller limitations
  316. * @mem: the SPI memory
  317. * @op: the operation to adjust
  318. *
  319. * Some controllers have FIFO limitations and must split a data transfer
  320. * operation into multiple ones, others require a specific alignment for
  321. * optimized accesses. This function allows SPI mem drivers to split a single
  322. * operation into multiple sub-operations when required.
  323. *
  324. * Return: a negative error code if the controller can't properly adjust @op,
  325. * 0 otherwise. Note that @op->data.nbytes will be updated if @op
  326. * can't be handled in a single step.
  327. */
  328. int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
  329. {
  330. struct spi_controller *ctlr = mem->spi->controller;
  331. size_t len;
  332. len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
  333. if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size)
  334. return ctlr->mem_ops->adjust_op_size(mem, op);
  335. if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
  336. if (len > spi_max_transfer_size(mem->spi))
  337. return -EINVAL;
  338. op->data.nbytes = min3((size_t)op->data.nbytes,
  339. spi_max_transfer_size(mem->spi),
  340. spi_max_message_size(mem->spi) -
  341. len);
  342. if (!op->data.nbytes)
  343. return -EINVAL;
  344. }
  345. return 0;
  346. }
  347. EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
  348. static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
  349. {
  350. return container_of(drv, struct spi_mem_driver, spidrv.driver);
  351. }
  352. static int spi_mem_probe(struct spi_device *spi)
  353. {
  354. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  355. struct spi_controller *ctlr = spi->controller;
  356. struct spi_mem *mem;
  357. mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
  358. if (!mem)
  359. return -ENOMEM;
  360. mem->spi = spi;
  361. if (ctlr->mem_ops && ctlr->mem_ops->get_name)
  362. mem->name = ctlr->mem_ops->get_name(mem);
  363. else
  364. mem->name = dev_name(&spi->dev);
  365. if (IS_ERR_OR_NULL(mem->name))
  366. return PTR_ERR(mem->name);
  367. spi_set_drvdata(spi, mem);
  368. return memdrv->probe(mem);
  369. }
  370. static int spi_mem_remove(struct spi_device *spi)
  371. {
  372. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  373. struct spi_mem *mem = spi_get_drvdata(spi);
  374. if (memdrv->remove)
  375. return memdrv->remove(mem);
  376. return 0;
  377. }
  378. static void spi_mem_shutdown(struct spi_device *spi)
  379. {
  380. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  381. struct spi_mem *mem = spi_get_drvdata(spi);
  382. if (memdrv->shutdown)
  383. memdrv->shutdown(mem);
  384. }
  385. /**
  386. * spi_mem_driver_register_with_owner() - Register a SPI memory driver
  387. * @memdrv: the SPI memory driver to register
  388. * @owner: the owner of this driver
  389. *
  390. * Registers a SPI memory driver.
  391. *
  392. * Return: 0 in case of success, a negative error core otherwise.
  393. */
  394. int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
  395. struct module *owner)
  396. {
  397. memdrv->spidrv.probe = spi_mem_probe;
  398. memdrv->spidrv.remove = spi_mem_remove;
  399. memdrv->spidrv.shutdown = spi_mem_shutdown;
  400. return __spi_register_driver(owner, &memdrv->spidrv);
  401. }
  402. EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
  403. /**
  404. * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
  405. * @memdrv: the SPI memory driver to unregister
  406. *
  407. * Unregisters a SPI memory driver.
  408. */
  409. void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
  410. {
  411. spi_unregister_driver(&memdrv->spidrv);
  412. }
  413. EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);