spectrum_buffers.c 28 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
  2. /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
  3. #include <linux/kernel.h>
  4. #include <linux/types.h>
  5. #include <linux/dcbnl.h>
  6. #include <linux/if_ether.h>
  7. #include <linux/list.h>
  8. #include "spectrum.h"
  9. #include "core.h"
  10. #include "port.h"
  11. #include "reg.h"
  12. struct mlxsw_sp_sb_pr {
  13. enum mlxsw_reg_sbpr_mode mode;
  14. u32 size;
  15. };
  16. struct mlxsw_cp_sb_occ {
  17. u32 cur;
  18. u32 max;
  19. };
  20. struct mlxsw_sp_sb_cm {
  21. u32 min_buff;
  22. u32 max_buff;
  23. u8 pool;
  24. struct mlxsw_cp_sb_occ occ;
  25. };
  26. struct mlxsw_sp_sb_pm {
  27. u32 min_buff;
  28. u32 max_buff;
  29. struct mlxsw_cp_sb_occ occ;
  30. };
  31. #define MLXSW_SP_SB_POOL_COUNT 4
  32. #define MLXSW_SP_SB_TC_COUNT 8
  33. struct mlxsw_sp_sb_port {
  34. struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
  35. struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
  36. };
  37. struct mlxsw_sp_sb {
  38. struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
  39. struct mlxsw_sp_sb_port *ports;
  40. u32 cell_size;
  41. };
  42. u32 mlxsw_sp_cells_bytes(const struct mlxsw_sp *mlxsw_sp, u32 cells)
  43. {
  44. return mlxsw_sp->sb->cell_size * cells;
  45. }
  46. u32 mlxsw_sp_bytes_cells(const struct mlxsw_sp *mlxsw_sp, u32 bytes)
  47. {
  48. return DIV_ROUND_UP(bytes, mlxsw_sp->sb->cell_size);
  49. }
  50. static struct mlxsw_sp_sb_pr *mlxsw_sp_sb_pr_get(struct mlxsw_sp *mlxsw_sp,
  51. u8 pool,
  52. enum mlxsw_reg_sbxx_dir dir)
  53. {
  54. return &mlxsw_sp->sb->prs[dir][pool];
  55. }
  56. static struct mlxsw_sp_sb_cm *mlxsw_sp_sb_cm_get(struct mlxsw_sp *mlxsw_sp,
  57. u8 local_port, u8 pg_buff,
  58. enum mlxsw_reg_sbxx_dir dir)
  59. {
  60. return &mlxsw_sp->sb->ports[local_port].cms[dir][pg_buff];
  61. }
  62. static struct mlxsw_sp_sb_pm *mlxsw_sp_sb_pm_get(struct mlxsw_sp *mlxsw_sp,
  63. u8 local_port, u8 pool,
  64. enum mlxsw_reg_sbxx_dir dir)
  65. {
  66. return &mlxsw_sp->sb->ports[local_port].pms[dir][pool];
  67. }
  68. static int mlxsw_sp_sb_pr_write(struct mlxsw_sp *mlxsw_sp, u8 pool,
  69. enum mlxsw_reg_sbxx_dir dir,
  70. enum mlxsw_reg_sbpr_mode mode, u32 size)
  71. {
  72. char sbpr_pl[MLXSW_REG_SBPR_LEN];
  73. struct mlxsw_sp_sb_pr *pr;
  74. int err;
  75. mlxsw_reg_sbpr_pack(sbpr_pl, pool, dir, mode, size);
  76. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl);
  77. if (err)
  78. return err;
  79. pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool, dir);
  80. pr->mode = mode;
  81. pr->size = size;
  82. return 0;
  83. }
  84. static int mlxsw_sp_sb_cm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  85. u8 pg_buff, enum mlxsw_reg_sbxx_dir dir,
  86. u32 min_buff, u32 max_buff, u8 pool)
  87. {
  88. char sbcm_pl[MLXSW_REG_SBCM_LEN];
  89. int err;
  90. mlxsw_reg_sbcm_pack(sbcm_pl, local_port, pg_buff, dir,
  91. min_buff, max_buff, pool);
  92. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl);
  93. if (err)
  94. return err;
  95. if (pg_buff < MLXSW_SP_SB_TC_COUNT) {
  96. struct mlxsw_sp_sb_cm *cm;
  97. cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, pg_buff, dir);
  98. cm->min_buff = min_buff;
  99. cm->max_buff = max_buff;
  100. cm->pool = pool;
  101. }
  102. return 0;
  103. }
  104. static int mlxsw_sp_sb_pm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  105. u8 pool, enum mlxsw_reg_sbxx_dir dir,
  106. u32 min_buff, u32 max_buff)
  107. {
  108. char sbpm_pl[MLXSW_REG_SBPM_LEN];
  109. struct mlxsw_sp_sb_pm *pm;
  110. int err;
  111. mlxsw_reg_sbpm_pack(sbpm_pl, local_port, pool, dir, false,
  112. min_buff, max_buff);
  113. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl);
  114. if (err)
  115. return err;
  116. pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool, dir);
  117. pm->min_buff = min_buff;
  118. pm->max_buff = max_buff;
  119. return 0;
  120. }
  121. static int mlxsw_sp_sb_pm_occ_clear(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  122. u8 pool, enum mlxsw_reg_sbxx_dir dir,
  123. struct list_head *bulk_list)
  124. {
  125. char sbpm_pl[MLXSW_REG_SBPM_LEN];
  126. mlxsw_reg_sbpm_pack(sbpm_pl, local_port, pool, dir, true, 0, 0);
  127. return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl,
  128. bulk_list, NULL, 0);
  129. }
  130. static void mlxsw_sp_sb_pm_occ_query_cb(struct mlxsw_core *mlxsw_core,
  131. char *sbpm_pl, size_t sbpm_pl_len,
  132. unsigned long cb_priv)
  133. {
  134. struct mlxsw_sp_sb_pm *pm = (struct mlxsw_sp_sb_pm *) cb_priv;
  135. mlxsw_reg_sbpm_unpack(sbpm_pl, &pm->occ.cur, &pm->occ.max);
  136. }
  137. static int mlxsw_sp_sb_pm_occ_query(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  138. u8 pool, enum mlxsw_reg_sbxx_dir dir,
  139. struct list_head *bulk_list)
  140. {
  141. char sbpm_pl[MLXSW_REG_SBPM_LEN];
  142. struct mlxsw_sp_sb_pm *pm;
  143. pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool, dir);
  144. mlxsw_reg_sbpm_pack(sbpm_pl, local_port, pool, dir, false, 0, 0);
  145. return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl,
  146. bulk_list,
  147. mlxsw_sp_sb_pm_occ_query_cb,
  148. (unsigned long) pm);
  149. }
  150. static const u16 mlxsw_sp_pbs[] = {
  151. [0] = 2 * ETH_FRAME_LEN,
  152. [9] = 2 * MLXSW_PORT_MAX_MTU,
  153. };
  154. #define MLXSW_SP_PBS_LEN ARRAY_SIZE(mlxsw_sp_pbs)
  155. #define MLXSW_SP_PB_UNUSED 8
  156. static int mlxsw_sp_port_pb_init(struct mlxsw_sp_port *mlxsw_sp_port)
  157. {
  158. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  159. char pbmc_pl[MLXSW_REG_PBMC_LEN];
  160. int i;
  161. mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port,
  162. 0xffff, 0xffff / 2);
  163. for (i = 0; i < MLXSW_SP_PBS_LEN; i++) {
  164. u16 size = mlxsw_sp_bytes_cells(mlxsw_sp, mlxsw_sp_pbs[i]);
  165. if (i == MLXSW_SP_PB_UNUSED)
  166. continue;
  167. mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, size);
  168. }
  169. mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl,
  170. MLXSW_REG_PBMC_PORT_SHARED_BUF_IDX, 0);
  171. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
  172. }
  173. static int mlxsw_sp_port_pb_prio_init(struct mlxsw_sp_port *mlxsw_sp_port)
  174. {
  175. char pptb_pl[MLXSW_REG_PPTB_LEN];
  176. int i;
  177. mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port);
  178. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  179. mlxsw_reg_pptb_prio_to_buff_pack(pptb_pl, i, 0);
  180. return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb),
  181. pptb_pl);
  182. }
  183. static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port)
  184. {
  185. int err;
  186. err = mlxsw_sp_port_pb_init(mlxsw_sp_port);
  187. if (err)
  188. return err;
  189. return mlxsw_sp_port_pb_prio_init(mlxsw_sp_port);
  190. }
  191. static int mlxsw_sp_sb_ports_init(struct mlxsw_sp *mlxsw_sp)
  192. {
  193. unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
  194. mlxsw_sp->sb->ports = kcalloc(max_ports,
  195. sizeof(struct mlxsw_sp_sb_port),
  196. GFP_KERNEL);
  197. if (!mlxsw_sp->sb->ports)
  198. return -ENOMEM;
  199. return 0;
  200. }
  201. static void mlxsw_sp_sb_ports_fini(struct mlxsw_sp *mlxsw_sp)
  202. {
  203. kfree(mlxsw_sp->sb->ports);
  204. }
  205. #define MLXSW_SP_SB_PR_INGRESS_SIZE 12440000
  206. #define MLXSW_SP_SB_PR_INGRESS_MNG_SIZE (200 * 1000)
  207. #define MLXSW_SP_SB_PR_EGRESS_SIZE 13232000
  208. #define MLXSW_SP_SB_PR(_mode, _size) \
  209. { \
  210. .mode = _mode, \
  211. .size = _size, \
  212. }
  213. static const struct mlxsw_sp_sb_pr mlxsw_sp_sb_prs_ingress[] = {
  214. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
  215. MLXSW_SP_SB_PR_INGRESS_SIZE),
  216. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
  217. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
  218. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
  219. MLXSW_SP_SB_PR_INGRESS_MNG_SIZE),
  220. };
  221. #define MLXSW_SP_SB_PRS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_prs_ingress)
  222. static const struct mlxsw_sp_sb_pr mlxsw_sp_sb_prs_egress[] = {
  223. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, MLXSW_SP_SB_PR_EGRESS_SIZE),
  224. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
  225. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
  226. MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
  227. };
  228. #define MLXSW_SP_SB_PRS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_prs_egress)
  229. static int __mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp,
  230. enum mlxsw_reg_sbxx_dir dir,
  231. const struct mlxsw_sp_sb_pr *prs,
  232. size_t prs_len)
  233. {
  234. int i;
  235. int err;
  236. for (i = 0; i < prs_len; i++) {
  237. u32 size = mlxsw_sp_bytes_cells(mlxsw_sp, prs[i].size);
  238. err = mlxsw_sp_sb_pr_write(mlxsw_sp, i, dir, prs[i].mode, size);
  239. if (err)
  240. return err;
  241. }
  242. return 0;
  243. }
  244. static int mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp)
  245. {
  246. int err;
  247. err = __mlxsw_sp_sb_prs_init(mlxsw_sp, MLXSW_REG_SBXX_DIR_INGRESS,
  248. mlxsw_sp_sb_prs_ingress,
  249. MLXSW_SP_SB_PRS_INGRESS_LEN);
  250. if (err)
  251. return err;
  252. return __mlxsw_sp_sb_prs_init(mlxsw_sp, MLXSW_REG_SBXX_DIR_EGRESS,
  253. mlxsw_sp_sb_prs_egress,
  254. MLXSW_SP_SB_PRS_EGRESS_LEN);
  255. }
  256. #define MLXSW_SP_SB_CM(_min_buff, _max_buff, _pool) \
  257. { \
  258. .min_buff = _min_buff, \
  259. .max_buff = _max_buff, \
  260. .pool = _pool, \
  261. }
  262. static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_ingress[] = {
  263. MLXSW_SP_SB_CM(10000, 8, 0),
  264. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  265. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  266. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  267. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  268. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  269. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  270. MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
  271. MLXSW_SP_SB_CM(0, 0, 0), /* dummy, this PG does not exist */
  272. MLXSW_SP_SB_CM(20000, 1, 3),
  273. };
  274. #define MLXSW_SP_SB_CMS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_cms_ingress)
  275. static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_egress[] = {
  276. MLXSW_SP_SB_CM(1500, 9, 0),
  277. MLXSW_SP_SB_CM(1500, 9, 0),
  278. MLXSW_SP_SB_CM(1500, 9, 0),
  279. MLXSW_SP_SB_CM(1500, 9, 0),
  280. MLXSW_SP_SB_CM(1500, 9, 0),
  281. MLXSW_SP_SB_CM(1500, 9, 0),
  282. MLXSW_SP_SB_CM(1500, 9, 0),
  283. MLXSW_SP_SB_CM(1500, 9, 0),
  284. MLXSW_SP_SB_CM(0, 140000, 15),
  285. MLXSW_SP_SB_CM(0, 140000, 15),
  286. MLXSW_SP_SB_CM(0, 140000, 15),
  287. MLXSW_SP_SB_CM(0, 140000, 15),
  288. MLXSW_SP_SB_CM(0, 140000, 15),
  289. MLXSW_SP_SB_CM(0, 140000, 15),
  290. MLXSW_SP_SB_CM(0, 140000, 15),
  291. MLXSW_SP_SB_CM(0, 140000, 15),
  292. MLXSW_SP_SB_CM(1, 0xff, 0),
  293. };
  294. #define MLXSW_SP_SB_CMS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_cms_egress)
  295. #define MLXSW_SP_CPU_PORT_SB_CM MLXSW_SP_SB_CM(0, 0, 0)
  296. static const struct mlxsw_sp_sb_cm mlxsw_sp_cpu_port_sb_cms[] = {
  297. MLXSW_SP_CPU_PORT_SB_CM,
  298. MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
  299. MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
  300. MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
  301. MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
  302. MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
  303. MLXSW_SP_CPU_PORT_SB_CM,
  304. MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 0),
  305. MLXSW_SP_CPU_PORT_SB_CM,
  306. MLXSW_SP_CPU_PORT_SB_CM,
  307. MLXSW_SP_CPU_PORT_SB_CM,
  308. MLXSW_SP_CPU_PORT_SB_CM,
  309. MLXSW_SP_CPU_PORT_SB_CM,
  310. MLXSW_SP_CPU_PORT_SB_CM,
  311. MLXSW_SP_CPU_PORT_SB_CM,
  312. MLXSW_SP_CPU_PORT_SB_CM,
  313. MLXSW_SP_CPU_PORT_SB_CM,
  314. MLXSW_SP_CPU_PORT_SB_CM,
  315. MLXSW_SP_CPU_PORT_SB_CM,
  316. MLXSW_SP_CPU_PORT_SB_CM,
  317. MLXSW_SP_CPU_PORT_SB_CM,
  318. MLXSW_SP_CPU_PORT_SB_CM,
  319. MLXSW_SP_CPU_PORT_SB_CM,
  320. MLXSW_SP_CPU_PORT_SB_CM,
  321. MLXSW_SP_CPU_PORT_SB_CM,
  322. MLXSW_SP_CPU_PORT_SB_CM,
  323. MLXSW_SP_CPU_PORT_SB_CM,
  324. MLXSW_SP_CPU_PORT_SB_CM,
  325. MLXSW_SP_CPU_PORT_SB_CM,
  326. MLXSW_SP_CPU_PORT_SB_CM,
  327. MLXSW_SP_CPU_PORT_SB_CM,
  328. MLXSW_SP_CPU_PORT_SB_CM,
  329. };
  330. #define MLXSW_SP_CPU_PORT_SB_MCS_LEN \
  331. ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms)
  332. static int __mlxsw_sp_sb_cms_init(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  333. enum mlxsw_reg_sbxx_dir dir,
  334. const struct mlxsw_sp_sb_cm *cms,
  335. size_t cms_len)
  336. {
  337. int i;
  338. int err;
  339. for (i = 0; i < cms_len; i++) {
  340. const struct mlxsw_sp_sb_cm *cm;
  341. u32 min_buff;
  342. if (i == 8 && dir == MLXSW_REG_SBXX_DIR_INGRESS)
  343. continue; /* PG number 8 does not exist, skip it */
  344. cm = &cms[i];
  345. /* All pools are initialized using dynamic thresholds,
  346. * therefore 'max_buff' isn't specified in cells.
  347. */
  348. min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, cm->min_buff);
  349. err = mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, i, dir,
  350. min_buff, cm->max_buff, cm->pool);
  351. if (err)
  352. return err;
  353. }
  354. return 0;
  355. }
  356. static int mlxsw_sp_port_sb_cms_init(struct mlxsw_sp_port *mlxsw_sp_port)
  357. {
  358. int err;
  359. err = __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp,
  360. mlxsw_sp_port->local_port,
  361. MLXSW_REG_SBXX_DIR_INGRESS,
  362. mlxsw_sp_sb_cms_ingress,
  363. MLXSW_SP_SB_CMS_INGRESS_LEN);
  364. if (err)
  365. return err;
  366. return __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp,
  367. mlxsw_sp_port->local_port,
  368. MLXSW_REG_SBXX_DIR_EGRESS,
  369. mlxsw_sp_sb_cms_egress,
  370. MLXSW_SP_SB_CMS_EGRESS_LEN);
  371. }
  372. static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp)
  373. {
  374. return __mlxsw_sp_sb_cms_init(mlxsw_sp, 0, MLXSW_REG_SBXX_DIR_EGRESS,
  375. mlxsw_sp_cpu_port_sb_cms,
  376. MLXSW_SP_CPU_PORT_SB_MCS_LEN);
  377. }
  378. #define MLXSW_SP_SB_PM(_min_buff, _max_buff) \
  379. { \
  380. .min_buff = _min_buff, \
  381. .max_buff = _max_buff, \
  382. }
  383. static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms_ingress[] = {
  384. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
  385. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
  386. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
  387. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
  388. };
  389. #define MLXSW_SP_SB_PMS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_pms_ingress)
  390. static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms_egress[] = {
  391. MLXSW_SP_SB_PM(0, 7),
  392. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
  393. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
  394. MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
  395. };
  396. #define MLXSW_SP_SB_PMS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_pms_egress)
  397. static int __mlxsw_sp_port_sb_pms_init(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  398. enum mlxsw_reg_sbxx_dir dir,
  399. const struct mlxsw_sp_sb_pm *pms,
  400. size_t pms_len)
  401. {
  402. int i;
  403. int err;
  404. for (i = 0; i < pms_len; i++) {
  405. const struct mlxsw_sp_sb_pm *pm;
  406. pm = &pms[i];
  407. err = mlxsw_sp_sb_pm_write(mlxsw_sp, local_port, i, dir,
  408. pm->min_buff, pm->max_buff);
  409. if (err)
  410. return err;
  411. }
  412. return 0;
  413. }
  414. static int mlxsw_sp_port_sb_pms_init(struct mlxsw_sp_port *mlxsw_sp_port)
  415. {
  416. int err;
  417. err = __mlxsw_sp_port_sb_pms_init(mlxsw_sp_port->mlxsw_sp,
  418. mlxsw_sp_port->local_port,
  419. MLXSW_REG_SBXX_DIR_INGRESS,
  420. mlxsw_sp_sb_pms_ingress,
  421. MLXSW_SP_SB_PMS_INGRESS_LEN);
  422. if (err)
  423. return err;
  424. return __mlxsw_sp_port_sb_pms_init(mlxsw_sp_port->mlxsw_sp,
  425. mlxsw_sp_port->local_port,
  426. MLXSW_REG_SBXX_DIR_EGRESS,
  427. mlxsw_sp_sb_pms_egress,
  428. MLXSW_SP_SB_PMS_EGRESS_LEN);
  429. }
  430. struct mlxsw_sp_sb_mm {
  431. u32 min_buff;
  432. u32 max_buff;
  433. u8 pool;
  434. };
  435. #define MLXSW_SP_SB_MM(_min_buff, _max_buff, _pool) \
  436. { \
  437. .min_buff = _min_buff, \
  438. .max_buff = _max_buff, \
  439. .pool = _pool, \
  440. }
  441. static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = {
  442. MLXSW_SP_SB_MM(20000, 0xff, 0),
  443. MLXSW_SP_SB_MM(20000, 0xff, 0),
  444. MLXSW_SP_SB_MM(20000, 0xff, 0),
  445. MLXSW_SP_SB_MM(20000, 0xff, 0),
  446. MLXSW_SP_SB_MM(20000, 0xff, 0),
  447. MLXSW_SP_SB_MM(20000, 0xff, 0),
  448. MLXSW_SP_SB_MM(20000, 0xff, 0),
  449. MLXSW_SP_SB_MM(20000, 0xff, 0),
  450. MLXSW_SP_SB_MM(20000, 0xff, 0),
  451. MLXSW_SP_SB_MM(20000, 0xff, 0),
  452. MLXSW_SP_SB_MM(20000, 0xff, 0),
  453. MLXSW_SP_SB_MM(20000, 0xff, 0),
  454. MLXSW_SP_SB_MM(20000, 0xff, 0),
  455. MLXSW_SP_SB_MM(20000, 0xff, 0),
  456. MLXSW_SP_SB_MM(20000, 0xff, 0),
  457. };
  458. #define MLXSW_SP_SB_MMS_LEN ARRAY_SIZE(mlxsw_sp_sb_mms)
  459. static int mlxsw_sp_sb_mms_init(struct mlxsw_sp *mlxsw_sp)
  460. {
  461. char sbmm_pl[MLXSW_REG_SBMM_LEN];
  462. int i;
  463. int err;
  464. for (i = 0; i < MLXSW_SP_SB_MMS_LEN; i++) {
  465. const struct mlxsw_sp_sb_mm *mc;
  466. u32 min_buff;
  467. mc = &mlxsw_sp_sb_mms[i];
  468. /* All pools are initialized using dynamic thresholds,
  469. * therefore 'max_buff' isn't specified in cells.
  470. */
  471. min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, mc->min_buff);
  472. mlxsw_reg_sbmm_pack(sbmm_pl, i, min_buff, mc->max_buff,
  473. mc->pool);
  474. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl);
  475. if (err)
  476. return err;
  477. }
  478. return 0;
  479. }
  480. int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp)
  481. {
  482. u64 sb_size;
  483. int err;
  484. if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE))
  485. return -EIO;
  486. if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_BUFFER_SIZE))
  487. return -EIO;
  488. sb_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE);
  489. mlxsw_sp->sb = kzalloc(sizeof(*mlxsw_sp->sb), GFP_KERNEL);
  490. if (!mlxsw_sp->sb)
  491. return -ENOMEM;
  492. mlxsw_sp->sb->cell_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, CELL_SIZE);
  493. err = mlxsw_sp_sb_ports_init(mlxsw_sp);
  494. if (err)
  495. goto err_sb_ports_init;
  496. err = mlxsw_sp_sb_prs_init(mlxsw_sp);
  497. if (err)
  498. goto err_sb_prs_init;
  499. err = mlxsw_sp_cpu_port_sb_cms_init(mlxsw_sp);
  500. if (err)
  501. goto err_sb_cpu_port_sb_cms_init;
  502. err = mlxsw_sp_sb_mms_init(mlxsw_sp);
  503. if (err)
  504. goto err_sb_mms_init;
  505. err = devlink_sb_register(priv_to_devlink(mlxsw_sp->core), 0, sb_size,
  506. MLXSW_SP_SB_POOL_COUNT,
  507. MLXSW_SP_SB_POOL_COUNT,
  508. MLXSW_SP_SB_TC_COUNT,
  509. MLXSW_SP_SB_TC_COUNT);
  510. if (err)
  511. goto err_devlink_sb_register;
  512. return 0;
  513. err_devlink_sb_register:
  514. err_sb_mms_init:
  515. err_sb_cpu_port_sb_cms_init:
  516. err_sb_prs_init:
  517. mlxsw_sp_sb_ports_fini(mlxsw_sp);
  518. err_sb_ports_init:
  519. kfree(mlxsw_sp->sb);
  520. return err;
  521. }
  522. void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp)
  523. {
  524. devlink_sb_unregister(priv_to_devlink(mlxsw_sp->core), 0);
  525. mlxsw_sp_sb_ports_fini(mlxsw_sp);
  526. kfree(mlxsw_sp->sb);
  527. }
  528. int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port)
  529. {
  530. int err;
  531. err = mlxsw_sp_port_headroom_init(mlxsw_sp_port);
  532. if (err)
  533. return err;
  534. err = mlxsw_sp_port_sb_cms_init(mlxsw_sp_port);
  535. if (err)
  536. return err;
  537. err = mlxsw_sp_port_sb_pms_init(mlxsw_sp_port);
  538. return err;
  539. }
  540. static u8 pool_get(u16 pool_index)
  541. {
  542. return pool_index % MLXSW_SP_SB_POOL_COUNT;
  543. }
  544. static u16 pool_index_get(u8 pool, enum mlxsw_reg_sbxx_dir dir)
  545. {
  546. u16 pool_index;
  547. pool_index = pool;
  548. if (dir == MLXSW_REG_SBXX_DIR_EGRESS)
  549. pool_index += MLXSW_SP_SB_POOL_COUNT;
  550. return pool_index;
  551. }
  552. static enum mlxsw_reg_sbxx_dir dir_get(u16 pool_index)
  553. {
  554. return pool_index < MLXSW_SP_SB_POOL_COUNT ?
  555. MLXSW_REG_SBXX_DIR_INGRESS : MLXSW_REG_SBXX_DIR_EGRESS;
  556. }
  557. int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
  558. unsigned int sb_index, u16 pool_index,
  559. struct devlink_sb_pool_info *pool_info)
  560. {
  561. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  562. u8 pool = pool_get(pool_index);
  563. enum mlxsw_reg_sbxx_dir dir = dir_get(pool_index);
  564. struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool, dir);
  565. pool_info->pool_type = (enum devlink_sb_pool_type) dir;
  566. pool_info->size = mlxsw_sp_cells_bytes(mlxsw_sp, pr->size);
  567. pool_info->threshold_type = (enum devlink_sb_threshold_type) pr->mode;
  568. return 0;
  569. }
  570. int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
  571. unsigned int sb_index, u16 pool_index, u32 size,
  572. enum devlink_sb_threshold_type threshold_type)
  573. {
  574. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  575. u32 pool_size = mlxsw_sp_bytes_cells(mlxsw_sp, size);
  576. u8 pool = pool_get(pool_index);
  577. enum mlxsw_reg_sbxx_dir dir = dir_get(pool_index);
  578. enum mlxsw_reg_sbpr_mode mode;
  579. if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE))
  580. return -EINVAL;
  581. mode = (enum mlxsw_reg_sbpr_mode) threshold_type;
  582. return mlxsw_sp_sb_pr_write(mlxsw_sp, pool, dir, mode, pool_size);
  583. }
  584. #define MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET (-2) /* 3->1, 16->14 */
  585. static u32 mlxsw_sp_sb_threshold_out(struct mlxsw_sp *mlxsw_sp, u8 pool,
  586. enum mlxsw_reg_sbxx_dir dir, u32 max_buff)
  587. {
  588. struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool, dir);
  589. if (pr->mode == MLXSW_REG_SBPR_MODE_DYNAMIC)
  590. return max_buff - MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET;
  591. return mlxsw_sp_cells_bytes(mlxsw_sp, max_buff);
  592. }
  593. static int mlxsw_sp_sb_threshold_in(struct mlxsw_sp *mlxsw_sp, u8 pool,
  594. enum mlxsw_reg_sbxx_dir dir, u32 threshold,
  595. u32 *p_max_buff)
  596. {
  597. struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool, dir);
  598. if (pr->mode == MLXSW_REG_SBPR_MODE_DYNAMIC) {
  599. int val;
  600. val = threshold + MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET;
  601. if (val < MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN ||
  602. val > MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX)
  603. return -EINVAL;
  604. *p_max_buff = val;
  605. } else {
  606. *p_max_buff = mlxsw_sp_bytes_cells(mlxsw_sp, threshold);
  607. }
  608. return 0;
  609. }
  610. int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
  611. unsigned int sb_index, u16 pool_index,
  612. u32 *p_threshold)
  613. {
  614. struct mlxsw_sp_port *mlxsw_sp_port =
  615. mlxsw_core_port_driver_priv(mlxsw_core_port);
  616. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  617. u8 local_port = mlxsw_sp_port->local_port;
  618. u8 pool = pool_get(pool_index);
  619. enum mlxsw_reg_sbxx_dir dir = dir_get(pool_index);
  620. struct mlxsw_sp_sb_pm *pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port,
  621. pool, dir);
  622. *p_threshold = mlxsw_sp_sb_threshold_out(mlxsw_sp, pool, dir,
  623. pm->max_buff);
  624. return 0;
  625. }
  626. int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
  627. unsigned int sb_index, u16 pool_index,
  628. u32 threshold)
  629. {
  630. struct mlxsw_sp_port *mlxsw_sp_port =
  631. mlxsw_core_port_driver_priv(mlxsw_core_port);
  632. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  633. u8 local_port = mlxsw_sp_port->local_port;
  634. u8 pool = pool_get(pool_index);
  635. enum mlxsw_reg_sbxx_dir dir = dir_get(pool_index);
  636. u32 max_buff;
  637. int err;
  638. err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool, dir,
  639. threshold, &max_buff);
  640. if (err)
  641. return err;
  642. return mlxsw_sp_sb_pm_write(mlxsw_sp, local_port, pool, dir,
  643. 0, max_buff);
  644. }
  645. int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
  646. unsigned int sb_index, u16 tc_index,
  647. enum devlink_sb_pool_type pool_type,
  648. u16 *p_pool_index, u32 *p_threshold)
  649. {
  650. struct mlxsw_sp_port *mlxsw_sp_port =
  651. mlxsw_core_port_driver_priv(mlxsw_core_port);
  652. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  653. u8 local_port = mlxsw_sp_port->local_port;
  654. u8 pg_buff = tc_index;
  655. enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
  656. struct mlxsw_sp_sb_cm *cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port,
  657. pg_buff, dir);
  658. *p_threshold = mlxsw_sp_sb_threshold_out(mlxsw_sp, cm->pool, dir,
  659. cm->max_buff);
  660. *p_pool_index = pool_index_get(cm->pool, dir);
  661. return 0;
  662. }
  663. int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
  664. unsigned int sb_index, u16 tc_index,
  665. enum devlink_sb_pool_type pool_type,
  666. u16 pool_index, u32 threshold)
  667. {
  668. struct mlxsw_sp_port *mlxsw_sp_port =
  669. mlxsw_core_port_driver_priv(mlxsw_core_port);
  670. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  671. u8 local_port = mlxsw_sp_port->local_port;
  672. u8 pg_buff = tc_index;
  673. enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
  674. u8 pool = pool_get(pool_index);
  675. u32 max_buff;
  676. int err;
  677. if (dir != dir_get(pool_index))
  678. return -EINVAL;
  679. err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool, dir,
  680. threshold, &max_buff);
  681. if (err)
  682. return err;
  683. return mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, pg_buff, dir,
  684. 0, max_buff, pool);
  685. }
  686. #define MASKED_COUNT_MAX \
  687. (MLXSW_REG_SBSR_REC_MAX_COUNT / (MLXSW_SP_SB_TC_COUNT * 2))
  688. struct mlxsw_sp_sb_sr_occ_query_cb_ctx {
  689. u8 masked_count;
  690. u8 local_port_1;
  691. };
  692. static void mlxsw_sp_sb_sr_occ_query_cb(struct mlxsw_core *mlxsw_core,
  693. char *sbsr_pl, size_t sbsr_pl_len,
  694. unsigned long cb_priv)
  695. {
  696. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  697. struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
  698. u8 masked_count;
  699. u8 local_port;
  700. int rec_index = 0;
  701. struct mlxsw_sp_sb_cm *cm;
  702. int i;
  703. memcpy(&cb_ctx, &cb_priv, sizeof(cb_ctx));
  704. masked_count = 0;
  705. for (local_port = cb_ctx.local_port_1;
  706. local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
  707. if (!mlxsw_sp->ports[local_port])
  708. continue;
  709. for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
  710. cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, i,
  711. MLXSW_REG_SBXX_DIR_INGRESS);
  712. mlxsw_reg_sbsr_rec_unpack(sbsr_pl, rec_index++,
  713. &cm->occ.cur, &cm->occ.max);
  714. }
  715. if (++masked_count == cb_ctx.masked_count)
  716. break;
  717. }
  718. masked_count = 0;
  719. for (local_port = cb_ctx.local_port_1;
  720. local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
  721. if (!mlxsw_sp->ports[local_port])
  722. continue;
  723. for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
  724. cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, i,
  725. MLXSW_REG_SBXX_DIR_EGRESS);
  726. mlxsw_reg_sbsr_rec_unpack(sbsr_pl, rec_index++,
  727. &cm->occ.cur, &cm->occ.max);
  728. }
  729. if (++masked_count == cb_ctx.masked_count)
  730. break;
  731. }
  732. }
  733. int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
  734. unsigned int sb_index)
  735. {
  736. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  737. struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
  738. unsigned long cb_priv;
  739. LIST_HEAD(bulk_list);
  740. char *sbsr_pl;
  741. u8 masked_count;
  742. u8 local_port_1;
  743. u8 local_port = 0;
  744. int i;
  745. int err;
  746. int err2;
  747. sbsr_pl = kmalloc(MLXSW_REG_SBSR_LEN, GFP_KERNEL);
  748. if (!sbsr_pl)
  749. return -ENOMEM;
  750. next_batch:
  751. local_port++;
  752. local_port_1 = local_port;
  753. masked_count = 0;
  754. mlxsw_reg_sbsr_pack(sbsr_pl, false);
  755. for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
  756. mlxsw_reg_sbsr_pg_buff_mask_set(sbsr_pl, i, 1);
  757. mlxsw_reg_sbsr_tclass_mask_set(sbsr_pl, i, 1);
  758. }
  759. for (; local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
  760. if (!mlxsw_sp->ports[local_port])
  761. continue;
  762. mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, local_port, 1);
  763. mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
  764. for (i = 0; i < MLXSW_SP_SB_POOL_COUNT; i++) {
  765. err = mlxsw_sp_sb_pm_occ_query(mlxsw_sp, local_port, i,
  766. MLXSW_REG_SBXX_DIR_INGRESS,
  767. &bulk_list);
  768. if (err)
  769. goto out;
  770. err = mlxsw_sp_sb_pm_occ_query(mlxsw_sp, local_port, i,
  771. MLXSW_REG_SBXX_DIR_EGRESS,
  772. &bulk_list);
  773. if (err)
  774. goto out;
  775. }
  776. if (++masked_count == MASKED_COUNT_MAX)
  777. goto do_query;
  778. }
  779. do_query:
  780. cb_ctx.masked_count = masked_count;
  781. cb_ctx.local_port_1 = local_port_1;
  782. memcpy(&cb_priv, &cb_ctx, sizeof(cb_ctx));
  783. err = mlxsw_reg_trans_query(mlxsw_core, MLXSW_REG(sbsr), sbsr_pl,
  784. &bulk_list, mlxsw_sp_sb_sr_occ_query_cb,
  785. cb_priv);
  786. if (err)
  787. goto out;
  788. if (local_port < mlxsw_core_max_ports(mlxsw_core))
  789. goto next_batch;
  790. out:
  791. err2 = mlxsw_reg_trans_bulk_wait(&bulk_list);
  792. if (!err)
  793. err = err2;
  794. kfree(sbsr_pl);
  795. return err;
  796. }
  797. int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
  798. unsigned int sb_index)
  799. {
  800. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  801. LIST_HEAD(bulk_list);
  802. char *sbsr_pl;
  803. unsigned int masked_count;
  804. u8 local_port = 0;
  805. int i;
  806. int err;
  807. int err2;
  808. sbsr_pl = kmalloc(MLXSW_REG_SBSR_LEN, GFP_KERNEL);
  809. if (!sbsr_pl)
  810. return -ENOMEM;
  811. next_batch:
  812. local_port++;
  813. masked_count = 0;
  814. mlxsw_reg_sbsr_pack(sbsr_pl, true);
  815. for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
  816. mlxsw_reg_sbsr_pg_buff_mask_set(sbsr_pl, i, 1);
  817. mlxsw_reg_sbsr_tclass_mask_set(sbsr_pl, i, 1);
  818. }
  819. for (; local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
  820. if (!mlxsw_sp->ports[local_port])
  821. continue;
  822. mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, local_port, 1);
  823. mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
  824. for (i = 0; i < MLXSW_SP_SB_POOL_COUNT; i++) {
  825. err = mlxsw_sp_sb_pm_occ_clear(mlxsw_sp, local_port, i,
  826. MLXSW_REG_SBXX_DIR_INGRESS,
  827. &bulk_list);
  828. if (err)
  829. goto out;
  830. err = mlxsw_sp_sb_pm_occ_clear(mlxsw_sp, local_port, i,
  831. MLXSW_REG_SBXX_DIR_EGRESS,
  832. &bulk_list);
  833. if (err)
  834. goto out;
  835. }
  836. if (++masked_count == MASKED_COUNT_MAX)
  837. goto do_query;
  838. }
  839. do_query:
  840. err = mlxsw_reg_trans_query(mlxsw_core, MLXSW_REG(sbsr), sbsr_pl,
  841. &bulk_list, NULL, 0);
  842. if (err)
  843. goto out;
  844. if (local_port < mlxsw_core_max_ports(mlxsw_core))
  845. goto next_batch;
  846. out:
  847. err2 = mlxsw_reg_trans_bulk_wait(&bulk_list);
  848. if (!err)
  849. err = err2;
  850. kfree(sbsr_pl);
  851. return err;
  852. }
  853. int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
  854. unsigned int sb_index, u16 pool_index,
  855. u32 *p_cur, u32 *p_max)
  856. {
  857. struct mlxsw_sp_port *mlxsw_sp_port =
  858. mlxsw_core_port_driver_priv(mlxsw_core_port);
  859. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  860. u8 local_port = mlxsw_sp_port->local_port;
  861. u8 pool = pool_get(pool_index);
  862. enum mlxsw_reg_sbxx_dir dir = dir_get(pool_index);
  863. struct mlxsw_sp_sb_pm *pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port,
  864. pool, dir);
  865. *p_cur = mlxsw_sp_cells_bytes(mlxsw_sp, pm->occ.cur);
  866. *p_max = mlxsw_sp_cells_bytes(mlxsw_sp, pm->occ.max);
  867. return 0;
  868. }
  869. int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
  870. unsigned int sb_index, u16 tc_index,
  871. enum devlink_sb_pool_type pool_type,
  872. u32 *p_cur, u32 *p_max)
  873. {
  874. struct mlxsw_sp_port *mlxsw_sp_port =
  875. mlxsw_core_port_driver_priv(mlxsw_core_port);
  876. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  877. u8 local_port = mlxsw_sp_port->local_port;
  878. u8 pg_buff = tc_index;
  879. enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
  880. struct mlxsw_sp_sb_cm *cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port,
  881. pg_buff, dir);
  882. *p_cur = mlxsw_sp_cells_bytes(mlxsw_sp, cm->occ.cur);
  883. *p_max = mlxsw_sp_cells_bytes(mlxsw_sp, cm->occ.max);
  884. return 0;
  885. }