cpuidle-imx6sx.c 2.6 KB

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  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/cpuidle.h>
  9. #include <linux/cpu_pm.h>
  10. #include <linux/module.h>
  11. #include <asm/cacheflush.h>
  12. #include <asm/cpuidle.h>
  13. #include <asm/suspend.h>
  14. #include "common.h"
  15. #include "cpuidle.h"
  16. #include "hardware.h"
  17. static int imx6sx_idle_finish(unsigned long val)
  18. {
  19. /*
  20. * for Cortex-A7 which has an internal L2
  21. * cache, need to flush it before powering
  22. * down ARM platform, since flushing L1 cache
  23. * here again has very small overhead, compared
  24. * to adding conditional code for L2 cache type,
  25. * just call flush_cache_all() is fine.
  26. */
  27. flush_cache_all();
  28. cpu_do_idle();
  29. return 0;
  30. }
  31. static int imx6sx_enter_wait(struct cpuidle_device *dev,
  32. struct cpuidle_driver *drv, int index)
  33. {
  34. imx6_set_lpm(WAIT_UNCLOCKED);
  35. switch (index) {
  36. case 1:
  37. cpu_do_idle();
  38. break;
  39. case 2:
  40. imx6_enable_rbc(true);
  41. imx_gpc_set_arm_power_in_lpm(true);
  42. imx_set_cpu_jump(0, v7_cpu_resume);
  43. /* Need to notify there is a cpu pm operation. */
  44. cpu_pm_enter();
  45. cpu_cluster_pm_enter();
  46. cpu_suspend(0, imx6sx_idle_finish);
  47. cpu_cluster_pm_exit();
  48. cpu_pm_exit();
  49. imx_gpc_set_arm_power_in_lpm(false);
  50. imx6_enable_rbc(false);
  51. break;
  52. default:
  53. break;
  54. }
  55. imx6_set_lpm(WAIT_CLOCKED);
  56. return index;
  57. }
  58. static struct cpuidle_driver imx6sx_cpuidle_driver = {
  59. .name = "imx6sx_cpuidle",
  60. .owner = THIS_MODULE,
  61. .states = {
  62. /* WFI */
  63. ARM_CPUIDLE_WFI_STATE,
  64. /* WAIT */
  65. {
  66. .exit_latency = 50,
  67. .target_residency = 75,
  68. .flags = CPUIDLE_FLAG_TIMER_STOP,
  69. .enter = imx6sx_enter_wait,
  70. .name = "WAIT",
  71. .desc = "Clock off",
  72. },
  73. /* WAIT + ARM power off */
  74. {
  75. /*
  76. * ARM gating 31us * 5 + RBC clear 65us
  77. * and some margin for SW execution, here set it
  78. * to 300us.
  79. */
  80. .exit_latency = 300,
  81. .target_residency = 500,
  82. .flags = CPUIDLE_FLAG_TIMER_STOP,
  83. .enter = imx6sx_enter_wait,
  84. .name = "LOW-POWER-IDLE",
  85. .desc = "ARM power off",
  86. },
  87. },
  88. .state_count = 3,
  89. .safe_state_index = 0,
  90. };
  91. int __init imx6sx_cpuidle_init(void)
  92. {
  93. imx6_set_int_mem_clk_lpm(true);
  94. imx6_enable_rbc(false);
  95. imx_gpc_set_l2_mem_power_in_lpm(false);
  96. /*
  97. * set ARM power up/down timing to the fastest,
  98. * sw2iso and sw can be set to one 32K cycle = 31us
  99. * except for power up sw2iso which need to be
  100. * larger than LDO ramp up time.
  101. */
  102. imx_gpc_set_arm_power_up_timing(cpu_is_imx6sx() ? 0xf : 0x2, 1);
  103. imx_gpc_set_arm_power_down_timing(1, 1);
  104. return cpuidle_register(&imx6sx_cpuidle_driver, NULL);
  105. }