mach-mx31_3ds.c 16 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/clk.h>
  19. #include <linux/irq.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/mfd/mc13783.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/l4f00242t03.h>
  25. #include <linux/regulator/machine.h>
  26. #include <linux/usb/otg.h>
  27. #include <linux/usb/ulpi.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/time.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach/map.h>
  33. #include "3ds_debugboard.h"
  34. #include "common.h"
  35. #include "devices-imx31.h"
  36. #include "ehci.h"
  37. #include "hardware.h"
  38. #include "iomux-mx3.h"
  39. #include "ulpi.h"
  40. static int mx31_3ds_pins[] = {
  41. /* UART1 */
  42. MX31_PIN_CTS1__CTS1,
  43. MX31_PIN_RTS1__RTS1,
  44. MX31_PIN_TXD1__TXD1,
  45. MX31_PIN_RXD1__RXD1,
  46. IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  47. /*SPI0*/
  48. IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
  49. IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
  50. /* SPI 1 */
  51. MX31_PIN_CSPI2_SCLK__SCLK,
  52. MX31_PIN_CSPI2_MOSI__MOSI,
  53. MX31_PIN_CSPI2_MISO__MISO,
  54. MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  55. MX31_PIN_CSPI2_SS0__SS0,
  56. MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  57. /* MC13783 IRQ */
  58. IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  59. /* USB OTG reset */
  60. IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  61. /* USB OTG */
  62. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  63. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  64. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  65. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  66. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  67. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  68. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  69. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  70. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  71. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  72. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  73. MX31_PIN_USBOTG_STP__USBOTG_STP,
  74. /*Keyboard*/
  75. MX31_PIN_KEY_ROW0_KEY_ROW0,
  76. MX31_PIN_KEY_ROW1_KEY_ROW1,
  77. MX31_PIN_KEY_ROW2_KEY_ROW2,
  78. MX31_PIN_KEY_COL0_KEY_COL0,
  79. MX31_PIN_KEY_COL1_KEY_COL1,
  80. MX31_PIN_KEY_COL2_KEY_COL2,
  81. MX31_PIN_KEY_COL3_KEY_COL3,
  82. /* USB Host 2 */
  83. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  84. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  85. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  86. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  87. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  88. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  89. IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
  90. IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
  91. IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
  92. IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
  93. IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
  94. IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
  95. /* USB Host2 reset */
  96. IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
  97. /* I2C1 */
  98. MX31_PIN_I2C_CLK__I2C1_SCL,
  99. MX31_PIN_I2C_DAT__I2C1_SDA,
  100. /* SDHC1 */
  101. MX31_PIN_SD1_DATA3__SD1_DATA3,
  102. MX31_PIN_SD1_DATA2__SD1_DATA2,
  103. MX31_PIN_SD1_DATA1__SD1_DATA1,
  104. MX31_PIN_SD1_DATA0__SD1_DATA0,
  105. MX31_PIN_SD1_CLK__SD1_CLK,
  106. MX31_PIN_SD1_CMD__SD1_CMD,
  107. MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
  108. MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
  109. /* Framebuffer */
  110. MX31_PIN_LD0__LD0,
  111. MX31_PIN_LD1__LD1,
  112. MX31_PIN_LD2__LD2,
  113. MX31_PIN_LD3__LD3,
  114. MX31_PIN_LD4__LD4,
  115. MX31_PIN_LD5__LD5,
  116. MX31_PIN_LD6__LD6,
  117. MX31_PIN_LD7__LD7,
  118. MX31_PIN_LD8__LD8,
  119. MX31_PIN_LD9__LD9,
  120. MX31_PIN_LD10__LD10,
  121. MX31_PIN_LD11__LD11,
  122. MX31_PIN_LD12__LD12,
  123. MX31_PIN_LD13__LD13,
  124. MX31_PIN_LD14__LD14,
  125. MX31_PIN_LD15__LD15,
  126. MX31_PIN_LD16__LD16,
  127. MX31_PIN_LD17__LD17,
  128. MX31_PIN_VSYNC3__VSYNC3,
  129. MX31_PIN_HSYNC__HSYNC,
  130. MX31_PIN_FPSHIFT__FPSHIFT,
  131. MX31_PIN_CONTRAST__CONTRAST,
  132. /* SSI */
  133. MX31_PIN_STXD4__STXD4,
  134. MX31_PIN_SRXD4__SRXD4,
  135. MX31_PIN_SCK4__SCK4,
  136. MX31_PIN_SFS4__SFS4,
  137. };
  138. /*
  139. * FB support
  140. */
  141. static const struct fb_videomode fb_modedb[] = {
  142. { /* 480x640 @ 60 Hz */
  143. .name = "Epson-VGA",
  144. .refresh = 60,
  145. .xres = 480,
  146. .yres = 640,
  147. .pixclock = 41701,
  148. .left_margin = 20,
  149. .right_margin = 41,
  150. .upper_margin = 10,
  151. .lower_margin = 5,
  152. .hsync_len = 20,
  153. .vsync_len = 10,
  154. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
  155. .vmode = FB_VMODE_NONINTERLACED,
  156. .flag = 0,
  157. },
  158. };
  159. static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  160. .name = "Epson-VGA",
  161. .mode = fb_modedb,
  162. .num_modes = ARRAY_SIZE(fb_modedb),
  163. };
  164. /* LCD */
  165. static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
  166. .reset_gpio = IOMUX_TO_GPIO(MX31_PIN_LCS1),
  167. .data_enable_gpio = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
  168. };
  169. /*
  170. * Support for SD card slot in personality board
  171. */
  172. #define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
  173. #define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
  174. static struct gpio mx31_3ds_sdhc1_gpios[] = {
  175. { MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
  176. { MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
  177. };
  178. static int mx31_3ds_sdhc1_init(struct device *dev,
  179. irq_handler_t detect_irq,
  180. void *data)
  181. {
  182. int ret;
  183. ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
  184. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  185. if (ret) {
  186. pr_warn("Unable to request the SD/MMC GPIOs.\n");
  187. return ret;
  188. }
  189. ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
  190. detect_irq,
  191. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  192. "sdhc1-detect", data);
  193. if (ret) {
  194. pr_warn("Unable to request the SD/MMC card-detect IRQ.\n");
  195. goto gpio_free;
  196. }
  197. return 0;
  198. gpio_free:
  199. gpio_free_array(mx31_3ds_sdhc1_gpios,
  200. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  201. return ret;
  202. }
  203. static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
  204. {
  205. free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
  206. gpio_free_array(mx31_3ds_sdhc1_gpios,
  207. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  208. }
  209. static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
  210. {
  211. /*
  212. * While the voltage stuff is done by the driver, activate the
  213. * Buffer Enable Pin only if there is a card in slot to fix the card
  214. * voltage issue caused by bi-directional chip TXB0108 on 3Stack.
  215. * Done here because at this stage we have for sure a debounced value
  216. * of the presence of the card, showed by the value of vdd.
  217. * 7 == ilog2(MMC_VDD_165_195)
  218. */
  219. if (vdd > 7)
  220. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
  221. else
  222. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
  223. }
  224. static struct imxmmc_platform_data sdhc1_pdata = {
  225. .init = mx31_3ds_sdhc1_init,
  226. .exit = mx31_3ds_sdhc1_exit,
  227. .setpower = mx31_3ds_sdhc1_setpower,
  228. };
  229. /*
  230. * Matrix keyboard
  231. */
  232. static const uint32_t mx31_3ds_keymap[] = {
  233. KEY(0, 0, KEY_UP),
  234. KEY(0, 1, KEY_DOWN),
  235. KEY(1, 0, KEY_RIGHT),
  236. KEY(1, 1, KEY_LEFT),
  237. KEY(1, 2, KEY_ENTER),
  238. KEY(2, 0, KEY_F6),
  239. KEY(2, 1, KEY_F8),
  240. KEY(2, 2, KEY_F9),
  241. KEY(2, 3, KEY_F10),
  242. };
  243. static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
  244. .keymap = mx31_3ds_keymap,
  245. .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
  246. };
  247. /* Regulators */
  248. static struct regulator_init_data pwgtx_init = {
  249. .constraints = {
  250. .boot_on = 1,
  251. .always_on = 1,
  252. },
  253. };
  254. static struct regulator_init_data gpo_init = {
  255. .constraints = {
  256. .boot_on = 1,
  257. .always_on = 1,
  258. }
  259. };
  260. static struct regulator_consumer_supply vmmc2_consumers[] = {
  261. REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
  262. };
  263. static struct regulator_init_data vmmc2_init = {
  264. .constraints = {
  265. .min_uV = 3000000,
  266. .max_uV = 3000000,
  267. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  268. REGULATOR_CHANGE_STATUS,
  269. },
  270. .num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
  271. .consumer_supplies = vmmc2_consumers,
  272. };
  273. static struct regulator_consumer_supply vmmc1_consumers[] = {
  274. REGULATOR_SUPPLY("vcore", "spi0.0"),
  275. };
  276. static struct regulator_init_data vmmc1_init = {
  277. .constraints = {
  278. .min_uV = 2800000,
  279. .max_uV = 2800000,
  280. .apply_uV = 1,
  281. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  282. REGULATOR_CHANGE_STATUS,
  283. },
  284. .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
  285. .consumer_supplies = vmmc1_consumers,
  286. };
  287. static struct regulator_consumer_supply vgen_consumers[] = {
  288. REGULATOR_SUPPLY("vdd", "spi0.0"),
  289. };
  290. static struct regulator_init_data vgen_init = {
  291. .constraints = {
  292. .min_uV = 1800000,
  293. .max_uV = 1800000,
  294. .apply_uV = 1,
  295. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  296. REGULATOR_CHANGE_STATUS,
  297. },
  298. .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
  299. .consumer_supplies = vgen_consumers,
  300. };
  301. static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
  302. {
  303. .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
  304. .init_data = &pwgtx_init,
  305. }, {
  306. .id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
  307. .init_data = &pwgtx_init,
  308. }, {
  309. .id = MC13783_REG_GPO1, /* Turn on 1.8V */
  310. .init_data = &gpo_init,
  311. }, {
  312. .id = MC13783_REG_GPO3, /* Turn on 3.3V */
  313. .init_data = &gpo_init,
  314. }, {
  315. .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
  316. .init_data = &vmmc2_init,
  317. }, {
  318. .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
  319. .init_data = &vmmc1_init,
  320. }, {
  321. .id = MC13783_REG_VGEN, /* Power LCD */
  322. .init_data = &vgen_init,
  323. },
  324. };
  325. /* MC13783 */
  326. static struct mc13xxx_codec_platform_data mx31_3ds_codec = {
  327. .dac_ssi_port = MC13783_SSI1_PORT,
  328. .adc_ssi_port = MC13783_SSI1_PORT,
  329. };
  330. static struct mc13xxx_platform_data mc13783_pdata = {
  331. .regulators = {
  332. .regulators = mx31_3ds_regulators,
  333. .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
  334. },
  335. .codec = &mx31_3ds_codec,
  336. .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,
  337. };
  338. static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
  339. .flags = IMX_SSI_DMA | IMX_SSI_NET,
  340. };
  341. /* SPI */
  342. static const struct spi_imx_master spi0_pdata __initconst = {
  343. .num_chipselect = 3,
  344. };
  345. static const struct spi_imx_master spi1_pdata __initconst = {
  346. .num_chipselect = 3,
  347. };
  348. static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
  349. {
  350. .modalias = "mc13783",
  351. .max_speed_hz = 1000000,
  352. .bus_num = 1,
  353. .chip_select = 2, /* SS2 */
  354. .platform_data = &mc13783_pdata,
  355. /* irq number is run-time assigned */
  356. .mode = SPI_CS_HIGH,
  357. }, {
  358. .modalias = "l4f00242t03",
  359. .max_speed_hz = 5000000,
  360. .bus_num = 0,
  361. .chip_select = 2, /* SS2 */
  362. .platform_data = &mx31_3ds_l4f00242t03_pdata,
  363. },
  364. };
  365. /*
  366. * NAND Flash
  367. */
  368. static const struct mxc_nand_platform_data
  369. mx31_3ds_nand_board_info __initconst = {
  370. .width = 1,
  371. .hw_ecc = 1,
  372. #ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
  373. .flash_bbt = 1,
  374. #endif
  375. };
  376. /*
  377. * USB OTG
  378. */
  379. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  380. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  381. #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
  382. #define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
  383. static int mx31_3ds_usbotg_init(void)
  384. {
  385. int err;
  386. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  387. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  388. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  389. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  390. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  391. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  392. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  393. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  394. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  395. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  396. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  397. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  398. err = gpio_request(USBOTG_RST_B, "otgusb-reset");
  399. if (err) {
  400. pr_err("Failed to request the USB OTG reset gpio\n");
  401. return err;
  402. }
  403. err = gpio_direction_output(USBOTG_RST_B, 0);
  404. if (err) {
  405. pr_err("Failed to drive the USB OTG reset gpio\n");
  406. goto usbotg_free_reset;
  407. }
  408. mdelay(1);
  409. gpio_set_value(USBOTG_RST_B, 1);
  410. return 0;
  411. usbotg_free_reset:
  412. gpio_free(USBOTG_RST_B);
  413. return err;
  414. }
  415. static int mx31_3ds_otg_init(struct platform_device *pdev)
  416. {
  417. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  418. }
  419. static int mx31_3ds_host2_init(struct platform_device *pdev)
  420. {
  421. int err;
  422. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  423. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  424. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  425. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  426. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  427. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  428. mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
  429. mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
  430. mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
  431. mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
  432. mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
  433. mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
  434. err = gpio_request(USBH2_RST_B, "usbh2-reset");
  435. if (err) {
  436. pr_err("Failed to request the USB Host 2 reset gpio\n");
  437. return err;
  438. }
  439. err = gpio_direction_output(USBH2_RST_B, 0);
  440. if (err) {
  441. pr_err("Failed to drive the USB Host 2 reset gpio\n");
  442. goto usbotg_free_reset;
  443. }
  444. mdelay(1);
  445. gpio_set_value(USBH2_RST_B, 1);
  446. mdelay(10);
  447. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  448. usbotg_free_reset:
  449. gpio_free(USBH2_RST_B);
  450. return err;
  451. }
  452. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  453. .init = mx31_3ds_otg_init,
  454. .portsc = MXC_EHCI_MODE_ULPI,
  455. };
  456. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  457. .init = mx31_3ds_host2_init,
  458. .portsc = MXC_EHCI_MODE_ULPI,
  459. };
  460. static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
  461. .operating_mode = FSL_USB2_DR_DEVICE,
  462. .phy_mode = FSL_USB2_PHY_ULPI,
  463. };
  464. static bool otg_mode_host __initdata;
  465. static int __init mx31_3ds_otg_mode(char *options)
  466. {
  467. if (!strcmp(options, "host"))
  468. otg_mode_host = true;
  469. else if (!strcmp(options, "device"))
  470. otg_mode_host = false;
  471. else
  472. pr_info("otg_mode neither \"host\" nor \"device\". "
  473. "Defaulting to device\n");
  474. return 1;
  475. }
  476. __setup("otg_mode=", mx31_3ds_otg_mode);
  477. static const struct imxuart_platform_data uart_pdata __initconst = {
  478. .flags = IMXUART_HAVE_RTSCTS,
  479. };
  480. static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
  481. .bitrate = 100000,
  482. };
  483. static void __init mx31_3ds_init(void)
  484. {
  485. imx31_soc_init();
  486. /* Configure SPI1 IOMUX */
  487. mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
  488. mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
  489. "mx31_3ds");
  490. imx31_add_imx_uart0(&uart_pdata);
  491. imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
  492. imx31_add_spi_imx1(&spi1_pdata);
  493. imx31_add_imx_keypad(&mx31_3ds_keymap_data);
  494. imx31_add_imx2_wdt();
  495. imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
  496. imx31_add_spi_imx0(&spi0_pdata);
  497. imx31_add_ipu_core();
  498. imx31_add_mx3_sdc_fb(&mx3fb_pdata);
  499. imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata);
  500. imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
  501. }
  502. static void __init mx31_3ds_late(void)
  503. {
  504. mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
  505. spi_register_board_info(mx31_3ds_spi_devs,
  506. ARRAY_SIZE(mx31_3ds_spi_devs));
  507. mx31_3ds_usbotg_init();
  508. if (otg_mode_host) {
  509. otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  510. ULPI_OTG_DRVVBUS_EXT);
  511. if (otg_pdata.otg)
  512. imx31_add_mxc_ehci_otg(&otg_pdata);
  513. }
  514. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  515. ULPI_OTG_DRVVBUS_EXT);
  516. if (usbh2_pdata.otg)
  517. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  518. if (!otg_mode_host)
  519. imx31_add_fsl_usb2_udc(&usbotg_pdata);
  520. if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)))
  521. printk(KERN_WARNING "Init of the debug board failed, all "
  522. "devices on the debug board are unusable.\n");
  523. imx31_add_mxc_mmc(0, &sdhc1_pdata);
  524. }
  525. static void __init mx31_3ds_timer_init(void)
  526. {
  527. mx31_clocks_init(26000000);
  528. }
  529. MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
  530. /* Maintainer: Freescale Semiconductor, Inc. */
  531. .atag_offset = 0x100,
  532. .map_io = mx31_map_io,
  533. .init_early = imx31_init_early,
  534. .init_irq = mx31_init_irq,
  535. .init_time = mx31_3ds_timer_init,
  536. .init_machine = mx31_3ds_init,
  537. .init_late = mx31_3ds_late,
  538. .restart = mxc_restart,
  539. MACHINE_END