mxc.h 2.5 KB

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  1. /*
  2. * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
  3. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17. * MA 02110-1301, USA.
  18. */
  19. #ifndef __ASM_ARCH_MXC_H__
  20. #define __ASM_ARCH_MXC_H__
  21. #include <linux/types.h>
  22. #ifndef __ASM_ARCH_MXC_HARDWARE_H__
  23. #error "Do not include directly."
  24. #endif
  25. #define MXC_CPU_MX1 1
  26. #define MXC_CPU_MX21 21
  27. #define MXC_CPU_MX25 25
  28. #define MXC_CPU_MX27 27
  29. #define MXC_CPU_MX31 31
  30. #define MXC_CPU_MX35 35
  31. #define MXC_CPU_MX51 51
  32. #define MXC_CPU_MX53 53
  33. #define MXC_CPU_IMX6SL 0x60
  34. #define MXC_CPU_IMX6DL 0x61
  35. #define MXC_CPU_IMX6SX 0x62
  36. #define MXC_CPU_IMX6Q 0x63
  37. #define MXC_CPU_IMX6UL 0x64
  38. #define MXC_CPU_IMX6ULL 0x65
  39. #define MXC_CPU_IMX6SLL 0x67
  40. #define MXC_CPU_IMX7D 0x72
  41. #define IMX_DDR_TYPE_LPDDR2 1
  42. #ifndef __ASSEMBLY__
  43. extern unsigned int __mxc_cpu_type;
  44. #ifdef CONFIG_SOC_IMX6SL
  45. static inline bool cpu_is_imx6sl(void)
  46. {
  47. return __mxc_cpu_type == MXC_CPU_IMX6SL;
  48. }
  49. #else
  50. static inline bool cpu_is_imx6sl(void)
  51. {
  52. return false;
  53. }
  54. #endif
  55. static inline bool cpu_is_imx6dl(void)
  56. {
  57. return __mxc_cpu_type == MXC_CPU_IMX6DL;
  58. }
  59. static inline bool cpu_is_imx6sx(void)
  60. {
  61. return __mxc_cpu_type == MXC_CPU_IMX6SX;
  62. }
  63. static inline bool cpu_is_imx6ul(void)
  64. {
  65. return __mxc_cpu_type == MXC_CPU_IMX6UL;
  66. }
  67. static inline bool cpu_is_imx6ull(void)
  68. {
  69. return __mxc_cpu_type == MXC_CPU_IMX6ULL;
  70. }
  71. static inline bool cpu_is_imx6sll(void)
  72. {
  73. return __mxc_cpu_type == MXC_CPU_IMX6SLL;
  74. }
  75. static inline bool cpu_is_imx6q(void)
  76. {
  77. return __mxc_cpu_type == MXC_CPU_IMX6Q;
  78. }
  79. static inline bool cpu_is_imx7d(void)
  80. {
  81. return __mxc_cpu_type == MXC_CPU_IMX7D;
  82. }
  83. struct cpu_op {
  84. u32 cpu_rate;
  85. };
  86. int tzic_enable_wake(void);
  87. extern struct cpu_op *(*get_cpu_op)(int *op);
  88. #endif
  89. #define imx_readl readl_relaxed
  90. #define imx_readw readw_relaxed
  91. #define imx_writel writel_relaxed
  92. #define imx_writew writew_relaxed
  93. #endif /* __ASM_ARCH_MXC_H__ */