ci20.dts 3.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /dts-v1/;
  3. #include "jz4780.dtsi"
  4. #include <dt-bindings/gpio/gpio.h>
  5. / {
  6. compatible = "img,ci20", "ingenic,jz4780";
  7. aliases {
  8. serial0 = &uart0;
  9. serial1 = &uart1;
  10. serial3 = &uart3;
  11. serial4 = &uart4;
  12. };
  13. chosen {
  14. stdout-path = &uart4;
  15. };
  16. memory {
  17. device_type = "memory";
  18. reg = <0x0 0x10000000
  19. 0x30000000 0x30000000>;
  20. };
  21. eth0_power: fixedregulator@0 {
  22. compatible = "regulator-fixed";
  23. regulator-name = "eth0_power";
  24. gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
  25. enable-active-high;
  26. };
  27. };
  28. &ext {
  29. clock-frequency = <48000000>;
  30. };
  31. &mmc0 {
  32. status = "okay";
  33. bus-width = <4>;
  34. max-frequency = <50000000>;
  35. pinctrl-names = "default";
  36. pinctrl-0 = <&pins_mmc0>;
  37. cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
  38. };
  39. &mmc1 {
  40. status = "okay";
  41. bus-width = <4>;
  42. max-frequency = <50000000>;
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&pins_mmc1>;
  45. };
  46. &uart0 {
  47. status = "okay";
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&pins_uart0>;
  50. };
  51. &uart1 {
  52. status = "okay";
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&pins_uart1>;
  55. };
  56. &uart3 {
  57. status = "okay";
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&pins_uart3>;
  60. };
  61. &uart4 {
  62. status = "okay";
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&pins_uart4>;
  65. };
  66. &nemc {
  67. status = "okay";
  68. nandc: nand-controller@1 {
  69. compatible = "ingenic,jz4780-nand";
  70. reg = <1 0 0x1000000>;
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. ingenic,bch-controller = <&bch>;
  74. ingenic,nemc-tAS = <10>;
  75. ingenic,nemc-tAH = <5>;
  76. ingenic,nemc-tBP = <10>;
  77. ingenic,nemc-tAW = <15>;
  78. ingenic,nemc-tSTRV = <100>;
  79. /*
  80. * Only CLE/ALE are needed for the devices that are connected, rather
  81. * than the full address line set.
  82. */
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pins_nemc>;
  85. nand@1 {
  86. reg = <1>;
  87. nand-ecc-step-size = <1024>;
  88. nand-ecc-strength = <24>;
  89. nand-ecc-mode = "hw";
  90. nand-on-flash-bbt;
  91. pinctrl-names = "default";
  92. pinctrl-0 = <&pins_nemc_cs1>;
  93. partitions {
  94. compatible = "fixed-partitions";
  95. #address-cells = <2>;
  96. #size-cells = <2>;
  97. partition@0 {
  98. label = "u-boot-spl";
  99. reg = <0x0 0x0 0x0 0x800000>;
  100. };
  101. partition@800000 {
  102. label = "u-boot";
  103. reg = <0x0 0x800000 0x0 0x200000>;
  104. };
  105. partition@a00000 {
  106. label = "u-boot-env";
  107. reg = <0x0 0xa00000 0x0 0x200000>;
  108. };
  109. partition@c00000 {
  110. label = "boot";
  111. reg = <0x0 0xc00000 0x0 0x4000000>;
  112. };
  113. partition@4c00000 {
  114. label = "system";
  115. reg = <0x0 0x4c00000 0x1 0xfb400000>;
  116. };
  117. };
  118. };
  119. };
  120. dm9000@6 {
  121. compatible = "davicom,dm9000";
  122. davicom,no-eeprom;
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pins_nemc_cs6>;
  125. reg = <6 0 1 /* addr */
  126. 6 2 1>; /* data */
  127. ingenic,nemc-tAS = <15>;
  128. ingenic,nemc-tAH = <10>;
  129. ingenic,nemc-tBP = <20>;
  130. ingenic,nemc-tAW = <50>;
  131. ingenic,nemc-tSTRV = <100>;
  132. reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
  133. vcc-supply = <&eth0_power>;
  134. interrupt-parent = <&gpe>;
  135. interrupts = <19 4>;
  136. };
  137. };
  138. &bch {
  139. status = "okay";
  140. };
  141. &pinctrl {
  142. pins_uart0: uart0 {
  143. function = "uart0";
  144. groups = "uart0-data";
  145. bias-disable;
  146. };
  147. pins_uart1: uart1 {
  148. function = "uart1";
  149. groups = "uart1-data";
  150. bias-disable;
  151. };
  152. pins_uart3: uart3 {
  153. function = "uart3";
  154. groups = "uart3-data", "uart3-hwflow";
  155. bias-disable;
  156. };
  157. pins_uart4: uart4 {
  158. function = "uart4";
  159. groups = "uart4-data";
  160. bias-disable;
  161. };
  162. pins_nemc: nemc {
  163. function = "nemc";
  164. groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
  165. bias-disable;
  166. };
  167. pins_nemc_cs1: nemc-cs1 {
  168. function = "nemc-cs1";
  169. groups = "nemc-cs1";
  170. bias-disable;
  171. };
  172. pins_nemc_cs6: nemc-cs6 {
  173. function = "nemc-cs6";
  174. groups = "nemc-cs6";
  175. bias-disable;
  176. };
  177. pins_mmc0: mmc0 {
  178. function = "mmc0";
  179. groups = "mmc0-1bit-e", "mmc0-4bit-e";
  180. bias-disable;
  181. };
  182. pins_mmc1: mmc1 {
  183. function = "mmc1";
  184. groups = "mmc1-1bit-d", "mmc1-4bit-d";
  185. bias-disable;
  186. };
  187. };