jump_label.c 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (c) 2010 Cavium Networks, Inc.
  7. */
  8. #include <linux/jump_label.h>
  9. #include <linux/kernel.h>
  10. #include <linux/memory.h>
  11. #include <linux/mutex.h>
  12. #include <linux/types.h>
  13. #include <linux/cpu.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/inst.h>
  16. /*
  17. * Define parameters for the standard MIPS and the microMIPS jump
  18. * instruction encoding respectively:
  19. *
  20. * - the ISA bit of the target, either 0 or 1 respectively,
  21. *
  22. * - the amount the jump target address is shifted right to fit in the
  23. * immediate field of the machine instruction, either 2 or 1,
  24. *
  25. * - the mask determining the size of the jump region relative to the
  26. * delay-slot instruction, either 256MB or 128MB,
  27. *
  28. * - the jump target alignment, either 4 or 2 bytes.
  29. */
  30. #define J_ISA_BIT IS_ENABLED(CONFIG_CPU_MICROMIPS)
  31. #define J_RANGE_SHIFT (2 - J_ISA_BIT)
  32. #define J_RANGE_MASK ((1ul << (26 + J_RANGE_SHIFT)) - 1)
  33. #define J_ALIGN_MASK ((1ul << J_RANGE_SHIFT) - 1)
  34. void arch_jump_label_transform(struct jump_entry *e,
  35. enum jump_label_type type)
  36. {
  37. union mips_instruction *insn_p;
  38. union mips_instruction insn;
  39. insn_p = (union mips_instruction *)msk_isa16_mode(e->code);
  40. /* Jump only works within an aligned region its delay slot is in. */
  41. BUG_ON((e->target & ~J_RANGE_MASK) != ((e->code + 4) & ~J_RANGE_MASK));
  42. /* Target must have the right alignment and ISA must be preserved. */
  43. BUG_ON((e->target & J_ALIGN_MASK) != J_ISA_BIT);
  44. if (type == JUMP_LABEL_JMP) {
  45. insn.j_format.opcode = J_ISA_BIT ? mm_j32_op : j_op;
  46. insn.j_format.target = e->target >> J_RANGE_SHIFT;
  47. } else {
  48. insn.word = 0; /* nop */
  49. }
  50. mutex_lock(&text_mutex);
  51. if (IS_ENABLED(CONFIG_CPU_MICROMIPS)) {
  52. insn_p->halfword[0] = insn.word >> 16;
  53. insn_p->halfword[1] = insn.word;
  54. } else
  55. *insn_p = insn;
  56. flush_icache_range((unsigned long)insn_p,
  57. (unsigned long)insn_p + sizeof(*insn_p));
  58. mutex_unlock(&text_mutex);
  59. }