mlx4_ib.h 26 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #ifndef MLX4_IB_H
  34. #define MLX4_IB_H
  35. #include <linux/compiler.h>
  36. #include <linux/list.h>
  37. #include <linux/mutex.h>
  38. #include <linux/idr.h>
  39. #include <rdma/ib_verbs.h>
  40. #include <rdma/ib_umem.h>
  41. #include <rdma/ib_mad.h>
  42. #include <rdma/ib_sa.h>
  43. #include <linux/mlx4/device.h>
  44. #include <linux/mlx4/doorbell.h>
  45. #include <linux/mlx4/qp.h>
  46. #include <linux/mlx4/cq.h>
  47. #define MLX4_IB_DRV_NAME "mlx4_ib"
  48. #ifdef pr_fmt
  49. #undef pr_fmt
  50. #endif
  51. #define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
  52. #define mlx4_ib_warn(ibdev, format, arg...) \
  53. dev_warn((ibdev)->dev.parent, MLX4_IB_DRV_NAME ": " format, ## arg)
  54. enum {
  55. MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
  56. MLX4_IB_MAX_HEADROOM = 2048
  57. };
  58. #define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
  59. #define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
  60. /*module param to indicate if SM assigns the alias_GUID*/
  61. extern int mlx4_ib_sm_guid_assign;
  62. #define MLX4_IB_UC_STEER_QPN_ALIGN 1
  63. #define MLX4_IB_UC_MAX_NUM_QPS 256
  64. enum hw_bar_type {
  65. HW_BAR_BF,
  66. HW_BAR_DB,
  67. HW_BAR_CLOCK,
  68. HW_BAR_COUNT
  69. };
  70. struct mlx4_ib_vma_private_data {
  71. struct vm_area_struct *vma;
  72. };
  73. struct mlx4_ib_ucontext {
  74. struct ib_ucontext ibucontext;
  75. struct mlx4_uar uar;
  76. struct list_head db_page_list;
  77. struct mutex db_page_mutex;
  78. struct mlx4_ib_vma_private_data hw_bar_info[HW_BAR_COUNT];
  79. struct list_head wqn_ranges_list;
  80. struct mutex wqn_ranges_mutex; /* protect wqn_ranges_list */
  81. };
  82. struct mlx4_ib_pd {
  83. struct ib_pd ibpd;
  84. u32 pdn;
  85. };
  86. struct mlx4_ib_xrcd {
  87. struct ib_xrcd ibxrcd;
  88. u32 xrcdn;
  89. struct ib_pd *pd;
  90. struct ib_cq *cq;
  91. };
  92. struct mlx4_ib_cq_buf {
  93. struct mlx4_buf buf;
  94. struct mlx4_mtt mtt;
  95. int entry_size;
  96. };
  97. struct mlx4_ib_cq_resize {
  98. struct mlx4_ib_cq_buf buf;
  99. int cqe;
  100. };
  101. struct mlx4_ib_cq {
  102. struct ib_cq ibcq;
  103. struct mlx4_cq mcq;
  104. struct mlx4_ib_cq_buf buf;
  105. struct mlx4_ib_cq_resize *resize_buf;
  106. struct mlx4_db db;
  107. spinlock_t lock;
  108. struct mutex resize_mutex;
  109. struct ib_umem *umem;
  110. struct ib_umem *resize_umem;
  111. int create_flags;
  112. /* List of qps that it serves.*/
  113. struct list_head send_qp_list;
  114. struct list_head recv_qp_list;
  115. };
  116. #define MLX4_MR_PAGES_ALIGN 0x40
  117. struct mlx4_ib_mr {
  118. struct ib_mr ibmr;
  119. __be64 *pages;
  120. dma_addr_t page_map;
  121. u32 npages;
  122. u32 max_pages;
  123. struct mlx4_mr mmr;
  124. struct ib_umem *umem;
  125. size_t page_map_size;
  126. };
  127. struct mlx4_ib_mw {
  128. struct ib_mw ibmw;
  129. struct mlx4_mw mmw;
  130. };
  131. struct mlx4_ib_fmr {
  132. struct ib_fmr ibfmr;
  133. struct mlx4_fmr mfmr;
  134. };
  135. #define MAX_REGS_PER_FLOW 2
  136. struct mlx4_flow_reg_id {
  137. u64 id;
  138. u64 mirror;
  139. };
  140. struct mlx4_ib_flow {
  141. struct ib_flow ibflow;
  142. /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
  143. struct mlx4_flow_reg_id reg_id[MAX_REGS_PER_FLOW];
  144. };
  145. struct mlx4_ib_wq {
  146. u64 *wrid;
  147. spinlock_t lock;
  148. int wqe_cnt;
  149. int max_post;
  150. int max_gs;
  151. int offset;
  152. int wqe_shift;
  153. unsigned head;
  154. unsigned tail;
  155. };
  156. enum {
  157. MLX4_IB_QP_CREATE_ROCE_V2_GSI = IB_QP_CREATE_RESERVED_START
  158. };
  159. enum mlx4_ib_qp_flags {
  160. MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
  161. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
  162. MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
  163. MLX4_IB_QP_SCATTER_FCS = IB_QP_CREATE_SCATTER_FCS,
  164. /* Mellanox specific flags start from IB_QP_CREATE_RESERVED_START */
  165. MLX4_IB_ROCE_V2_GSI_QP = MLX4_IB_QP_CREATE_ROCE_V2_GSI,
  166. MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
  167. MLX4_IB_SRIOV_SQP = 1 << 31,
  168. };
  169. struct mlx4_ib_gid_entry {
  170. struct list_head list;
  171. union ib_gid gid;
  172. int added;
  173. u8 port;
  174. };
  175. enum mlx4_ib_qp_type {
  176. /*
  177. * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
  178. * here (and in that order) since the MAD layer uses them as
  179. * indices into a 2-entry table.
  180. */
  181. MLX4_IB_QPT_SMI = IB_QPT_SMI,
  182. MLX4_IB_QPT_GSI = IB_QPT_GSI,
  183. MLX4_IB_QPT_RC = IB_QPT_RC,
  184. MLX4_IB_QPT_UC = IB_QPT_UC,
  185. MLX4_IB_QPT_UD = IB_QPT_UD,
  186. MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
  187. MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
  188. MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
  189. MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
  190. MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
  191. MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
  192. MLX4_IB_QPT_PROXY_SMI = 1 << 17,
  193. MLX4_IB_QPT_PROXY_GSI = 1 << 18,
  194. MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
  195. MLX4_IB_QPT_TUN_SMI = 1 << 20,
  196. MLX4_IB_QPT_TUN_GSI = 1 << 21,
  197. };
  198. #define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
  199. MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
  200. MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
  201. enum mlx4_ib_mad_ifc_flags {
  202. MLX4_MAD_IFC_IGNORE_MKEY = 1,
  203. MLX4_MAD_IFC_IGNORE_BKEY = 2,
  204. MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
  205. MLX4_MAD_IFC_IGNORE_BKEY),
  206. MLX4_MAD_IFC_NET_VIEW = 4,
  207. };
  208. enum {
  209. MLX4_NUM_TUNNEL_BUFS = 256,
  210. };
  211. struct mlx4_ib_tunnel_header {
  212. struct mlx4_av av;
  213. __be32 remote_qpn;
  214. __be32 qkey;
  215. __be16 vlan;
  216. u8 mac[6];
  217. __be16 pkey_index;
  218. u8 reserved[6];
  219. };
  220. struct mlx4_ib_buf {
  221. void *addr;
  222. dma_addr_t map;
  223. };
  224. struct mlx4_rcv_tunnel_hdr {
  225. __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
  226. * 0x0 - no vlan was in the packet
  227. * 0x01 - C-VLAN was in the packet */
  228. u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
  229. u8 reserved;
  230. __be16 pkey_index;
  231. __be16 sl_vid;
  232. __be16 slid_mac_47_32;
  233. __be32 mac_31_0;
  234. };
  235. struct mlx4_ib_proxy_sqp_hdr {
  236. struct ib_grh grh;
  237. struct mlx4_rcv_tunnel_hdr tun;
  238. } __packed;
  239. struct mlx4_roce_smac_vlan_info {
  240. u64 smac;
  241. int smac_index;
  242. int smac_port;
  243. u64 candidate_smac;
  244. int candidate_smac_index;
  245. int candidate_smac_port;
  246. u16 vid;
  247. int vlan_index;
  248. int vlan_port;
  249. u16 candidate_vid;
  250. int candidate_vlan_index;
  251. int candidate_vlan_port;
  252. int update_vid;
  253. };
  254. struct mlx4_wqn_range {
  255. int base_wqn;
  256. int size;
  257. int refcount;
  258. bool dirty;
  259. struct list_head list;
  260. };
  261. struct mlx4_ib_rss {
  262. unsigned int base_qpn_tbl_sz;
  263. u8 flags;
  264. u8 rss_key[MLX4_EN_RSS_KEY_SIZE];
  265. };
  266. struct mlx4_ib_qp {
  267. union {
  268. struct ib_qp ibqp;
  269. struct ib_wq ibwq;
  270. };
  271. struct mlx4_qp mqp;
  272. struct mlx4_buf buf;
  273. struct mlx4_db db;
  274. struct mlx4_ib_wq rq;
  275. u32 doorbell_qpn;
  276. __be32 sq_signal_bits;
  277. unsigned sq_next_wqe;
  278. int sq_spare_wqes;
  279. struct mlx4_ib_wq sq;
  280. enum mlx4_ib_qp_type mlx4_ib_qp_type;
  281. struct ib_umem *umem;
  282. struct mlx4_mtt mtt;
  283. int buf_size;
  284. struct mutex mutex;
  285. u16 xrcdn;
  286. u32 flags;
  287. u8 port;
  288. u8 alt_port;
  289. u8 atomic_rd_en;
  290. u8 resp_depth;
  291. u8 sq_no_prefetch;
  292. u8 state;
  293. int mlx_type;
  294. u32 inl_recv_sz;
  295. struct list_head gid_list;
  296. struct list_head steering_rules;
  297. struct mlx4_ib_buf *sqp_proxy_rcv;
  298. struct mlx4_roce_smac_vlan_info pri;
  299. struct mlx4_roce_smac_vlan_info alt;
  300. u64 reg_id;
  301. struct list_head qps_list;
  302. struct list_head cq_recv_list;
  303. struct list_head cq_send_list;
  304. struct counter_index *counter_index;
  305. struct mlx4_wqn_range *wqn_range;
  306. /* Number of RSS QP parents that uses this WQ */
  307. u32 rss_usecnt;
  308. struct mlx4_ib_rss *rss_ctx;
  309. };
  310. struct mlx4_ib_srq {
  311. struct ib_srq ibsrq;
  312. struct mlx4_srq msrq;
  313. struct mlx4_buf buf;
  314. struct mlx4_db db;
  315. u64 *wrid;
  316. spinlock_t lock;
  317. int head;
  318. int tail;
  319. u16 wqe_ctr;
  320. struct ib_umem *umem;
  321. struct mlx4_mtt mtt;
  322. struct mutex mutex;
  323. };
  324. struct mlx4_ib_ah {
  325. struct ib_ah ibah;
  326. union mlx4_ext_av av;
  327. };
  328. /****************************************/
  329. /* alias guid support */
  330. /****************************************/
  331. #define NUM_PORT_ALIAS_GUID 2
  332. #define NUM_ALIAS_GUID_IN_REC 8
  333. #define NUM_ALIAS_GUID_REC_IN_PORT 16
  334. #define GUID_REC_SIZE 8
  335. #define NUM_ALIAS_GUID_PER_PORT 128
  336. #define MLX4_NOT_SET_GUID (0x00LL)
  337. #define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
  338. enum mlx4_guid_alias_rec_status {
  339. MLX4_GUID_INFO_STATUS_IDLE,
  340. MLX4_GUID_INFO_STATUS_SET,
  341. };
  342. #define GUID_STATE_NEED_PORT_INIT 0x01
  343. enum mlx4_guid_alias_rec_method {
  344. MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
  345. MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
  346. };
  347. struct mlx4_sriov_alias_guid_info_rec_det {
  348. u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
  349. ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
  350. enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
  351. unsigned int guids_retry_schedule[NUM_ALIAS_GUID_IN_REC];
  352. u64 time_to_run;
  353. };
  354. struct mlx4_sriov_alias_guid_port_rec_det {
  355. struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
  356. struct workqueue_struct *wq;
  357. struct delayed_work alias_guid_work;
  358. u8 port;
  359. u32 state_flags;
  360. struct mlx4_sriov_alias_guid *parent;
  361. struct list_head cb_list;
  362. };
  363. struct mlx4_sriov_alias_guid {
  364. struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
  365. spinlock_t ag_work_lock;
  366. struct ib_sa_client *sa_client;
  367. };
  368. struct mlx4_ib_demux_work {
  369. struct work_struct work;
  370. struct mlx4_ib_dev *dev;
  371. int slave;
  372. int do_init;
  373. u8 port;
  374. };
  375. struct mlx4_ib_tun_tx_buf {
  376. struct mlx4_ib_buf buf;
  377. struct ib_ah *ah;
  378. };
  379. struct mlx4_ib_demux_pv_qp {
  380. struct ib_qp *qp;
  381. enum ib_qp_type proxy_qpt;
  382. struct mlx4_ib_buf *ring;
  383. struct mlx4_ib_tun_tx_buf *tx_ring;
  384. spinlock_t tx_lock;
  385. unsigned tx_ix_head;
  386. unsigned tx_ix_tail;
  387. };
  388. enum mlx4_ib_demux_pv_state {
  389. DEMUX_PV_STATE_DOWN,
  390. DEMUX_PV_STATE_STARTING,
  391. DEMUX_PV_STATE_ACTIVE,
  392. DEMUX_PV_STATE_DOWNING,
  393. };
  394. struct mlx4_ib_demux_pv_ctx {
  395. int port;
  396. int slave;
  397. enum mlx4_ib_demux_pv_state state;
  398. int has_smi;
  399. struct ib_device *ib_dev;
  400. struct ib_cq *cq;
  401. struct ib_pd *pd;
  402. struct work_struct work;
  403. struct workqueue_struct *wq;
  404. struct workqueue_struct *wi_wq;
  405. struct mlx4_ib_demux_pv_qp qp[2];
  406. };
  407. struct mlx4_ib_demux_ctx {
  408. struct ib_device *ib_dev;
  409. int port;
  410. struct workqueue_struct *wq;
  411. struct workqueue_struct *wi_wq;
  412. struct workqueue_struct *ud_wq;
  413. spinlock_t ud_lock;
  414. atomic64_t subnet_prefix;
  415. __be64 guid_cache[128];
  416. struct mlx4_ib_dev *dev;
  417. /* the following lock protects both mcg_table and mcg_mgid0_list */
  418. struct mutex mcg_table_lock;
  419. struct rb_root mcg_table;
  420. struct list_head mcg_mgid0_list;
  421. struct workqueue_struct *mcg_wq;
  422. struct mlx4_ib_demux_pv_ctx **tun;
  423. atomic_t tid;
  424. int flushing; /* flushing the work queue */
  425. };
  426. struct mlx4_ib_sriov {
  427. struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
  428. struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
  429. /* when using this spinlock you should use "irq" because
  430. * it may be called from interrupt context.*/
  431. spinlock_t going_down_lock;
  432. int is_going_down;
  433. struct mlx4_sriov_alias_guid alias_guid;
  434. /* CM paravirtualization fields */
  435. struct list_head cm_list;
  436. spinlock_t id_map_lock;
  437. struct rb_root sl_id_map;
  438. struct idr pv_id_table;
  439. };
  440. struct gid_cache_context {
  441. int real_index;
  442. int refcount;
  443. };
  444. struct gid_entry {
  445. union ib_gid gid;
  446. enum ib_gid_type gid_type;
  447. struct gid_cache_context *ctx;
  448. };
  449. struct mlx4_port_gid_table {
  450. struct gid_entry gids[MLX4_MAX_PORT_GIDS];
  451. };
  452. struct mlx4_ib_iboe {
  453. spinlock_t lock;
  454. struct net_device *netdevs[MLX4_MAX_PORTS];
  455. atomic64_t mac[MLX4_MAX_PORTS];
  456. struct notifier_block nb;
  457. struct mlx4_port_gid_table gids[MLX4_MAX_PORTS];
  458. };
  459. struct pkey_mgt {
  460. u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  461. u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  462. struct list_head pkey_port_list[MLX4_MFUNC_MAX];
  463. struct kobject *device_parent[MLX4_MFUNC_MAX];
  464. };
  465. struct mlx4_ib_iov_sysfs_attr {
  466. void *ctx;
  467. struct kobject *kobj;
  468. unsigned long data;
  469. u32 entry_num;
  470. char name[15];
  471. struct device_attribute dentry;
  472. struct device *dev;
  473. };
  474. struct mlx4_ib_iov_sysfs_attr_ar {
  475. struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
  476. };
  477. struct mlx4_ib_iov_port {
  478. char name[100];
  479. u8 num;
  480. struct mlx4_ib_dev *dev;
  481. struct list_head list;
  482. struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
  483. struct ib_port_attr attr;
  484. struct kobject *cur_port;
  485. struct kobject *admin_alias_parent;
  486. struct kobject *gids_parent;
  487. struct kobject *pkeys_parent;
  488. struct kobject *mcgs_parent;
  489. struct mlx4_ib_iov_sysfs_attr mcg_dentry;
  490. };
  491. struct counter_index {
  492. struct list_head list;
  493. u32 index;
  494. u8 allocated;
  495. };
  496. struct mlx4_ib_counters {
  497. struct list_head counters_list;
  498. struct mutex mutex; /* mutex for accessing counters list */
  499. u32 default_counter;
  500. };
  501. #define MLX4_DIAG_COUNTERS_TYPES 2
  502. struct mlx4_ib_diag_counters {
  503. const char **name;
  504. u32 *offset;
  505. u32 num_counters;
  506. };
  507. struct mlx4_ib_dev {
  508. struct ib_device ib_dev;
  509. struct mlx4_dev *dev;
  510. int num_ports;
  511. void __iomem *uar_map;
  512. struct mlx4_uar priv_uar;
  513. u32 priv_pdn;
  514. MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
  515. struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
  516. struct ib_ah *sm_ah[MLX4_MAX_PORTS];
  517. spinlock_t sm_lock;
  518. atomic64_t sl2vl[MLX4_MAX_PORTS];
  519. struct mlx4_ib_sriov sriov;
  520. struct mutex cap_mask_mutex;
  521. bool ib_active;
  522. struct mlx4_ib_iboe iboe;
  523. struct mlx4_ib_counters counters_table[MLX4_MAX_PORTS];
  524. int *eq_table;
  525. struct kobject *iov_parent;
  526. struct kobject *ports_parent;
  527. struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
  528. struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
  529. struct pkey_mgt pkeys;
  530. unsigned long *ib_uc_qpns_bitmap;
  531. int steer_qpn_count;
  532. int steer_qpn_base;
  533. int steering_support;
  534. struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS];
  535. /* lock when destroying qp1_proxy and getting netdev events */
  536. struct mutex qp1_proxy_lock[MLX4_MAX_PORTS];
  537. u8 bond_next_port;
  538. /* protect resources needed as part of reset flow */
  539. spinlock_t reset_flow_resource_lock;
  540. struct list_head qp_list;
  541. struct mlx4_ib_diag_counters diag_counters[MLX4_DIAG_COUNTERS_TYPES];
  542. };
  543. struct ib_event_work {
  544. struct work_struct work;
  545. struct mlx4_ib_dev *ib_dev;
  546. struct mlx4_eqe ib_eqe;
  547. int port;
  548. };
  549. struct mlx4_ib_qp_tunnel_init_attr {
  550. struct ib_qp_init_attr init_attr;
  551. int slave;
  552. enum ib_qp_type proxy_qp_type;
  553. u8 port;
  554. };
  555. struct mlx4_uverbs_ex_query_device {
  556. __u32 comp_mask;
  557. __u32 reserved;
  558. };
  559. static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
  560. {
  561. return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
  562. }
  563. static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
  564. {
  565. return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
  566. }
  567. static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
  568. {
  569. return container_of(ibpd, struct mlx4_ib_pd, ibpd);
  570. }
  571. static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
  572. {
  573. return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
  574. }
  575. static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
  576. {
  577. return container_of(ibcq, struct mlx4_ib_cq, ibcq);
  578. }
  579. static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
  580. {
  581. return container_of(mcq, struct mlx4_ib_cq, mcq);
  582. }
  583. static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
  584. {
  585. return container_of(ibmr, struct mlx4_ib_mr, ibmr);
  586. }
  587. static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
  588. {
  589. return container_of(ibmw, struct mlx4_ib_mw, ibmw);
  590. }
  591. static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
  592. {
  593. return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
  594. }
  595. static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
  596. {
  597. return container_of(ibflow, struct mlx4_ib_flow, ibflow);
  598. }
  599. static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
  600. {
  601. return container_of(ibqp, struct mlx4_ib_qp, ibqp);
  602. }
  603. static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
  604. {
  605. return container_of(mqp, struct mlx4_ib_qp, mqp);
  606. }
  607. static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
  608. {
  609. return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
  610. }
  611. static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
  612. {
  613. return container_of(msrq, struct mlx4_ib_srq, msrq);
  614. }
  615. static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
  616. {
  617. return container_of(ibah, struct mlx4_ib_ah, ibah);
  618. }
  619. static inline u8 mlx4_ib_bond_next_port(struct mlx4_ib_dev *dev)
  620. {
  621. dev->bond_next_port = (dev->bond_next_port + 1) % dev->num_ports;
  622. return dev->bond_next_port + 1;
  623. }
  624. int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
  625. void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
  626. int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
  627. struct mlx4_db *db);
  628. void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
  629. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
  630. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  631. struct ib_umem *umem);
  632. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  633. u64 virt_addr, int access_flags,
  634. struct ib_udata *udata);
  635. int mlx4_ib_dereg_mr(struct ib_mr *mr);
  636. struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
  637. struct ib_udata *udata);
  638. int mlx4_ib_dealloc_mw(struct ib_mw *mw);
  639. struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
  640. enum ib_mr_type mr_type,
  641. u32 max_num_sg);
  642. int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
  643. unsigned int *sg_offset);
  644. int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
  645. int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
  646. struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev,
  647. const struct ib_cq_init_attr *attr,
  648. struct ib_ucontext *context,
  649. struct ib_udata *udata);
  650. int mlx4_ib_destroy_cq(struct ib_cq *cq);
  651. int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
  652. int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
  653. void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  654. void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  655. struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct rdma_ah_attr *ah_attr,
  656. struct ib_udata *udata);
  657. struct ib_ah *mlx4_ib_create_ah_slave(struct ib_pd *pd,
  658. struct rdma_ah_attr *ah_attr,
  659. int slave_sgid_index, u8 *s_mac,
  660. u16 vlan_tag);
  661. int mlx4_ib_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr);
  662. int mlx4_ib_destroy_ah(struct ib_ah *ah);
  663. struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
  664. struct ib_srq_init_attr *init_attr,
  665. struct ib_udata *udata);
  666. int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
  667. enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
  668. int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
  669. int mlx4_ib_destroy_srq(struct ib_srq *srq);
  670. void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
  671. int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr,
  672. const struct ib_recv_wr **bad_wr);
  673. struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
  674. struct ib_qp_init_attr *init_attr,
  675. struct ib_udata *udata);
  676. int mlx4_ib_destroy_qp(struct ib_qp *qp);
  677. void mlx4_ib_drain_sq(struct ib_qp *qp);
  678. void mlx4_ib_drain_rq(struct ib_qp *qp);
  679. int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  680. int attr_mask, struct ib_udata *udata);
  681. int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
  682. struct ib_qp_init_attr *qp_init_attr);
  683. int mlx4_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
  684. const struct ib_send_wr **bad_wr);
  685. int mlx4_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
  686. const struct ib_recv_wr **bad_wr);
  687. int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
  688. int port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  689. const void *in_mad, void *response_mad);
  690. int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  691. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  692. const struct ib_mad_hdr *in, size_t in_mad_size,
  693. struct ib_mad_hdr *out, size_t *out_mad_size,
  694. u16 *out_mad_pkey_index);
  695. int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
  696. void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
  697. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
  698. struct ib_fmr_attr *fmr_attr);
  699. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
  700. u64 iova);
  701. int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
  702. int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
  703. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  704. struct ib_port_attr *props, int netw_view);
  705. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  706. u16 *pkey, int netw_view);
  707. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  708. union ib_gid *gid, int netw_view);
  709. static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
  710. {
  711. u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
  712. if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
  713. return true;
  714. return !!(ah->av.ib.g_slid & 0x80);
  715. }
  716. int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
  717. void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
  718. void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
  719. int mlx4_ib_mcg_init(void);
  720. void mlx4_ib_mcg_destroy(void);
  721. int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
  722. int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
  723. struct ib_sa_mad *sa_mad);
  724. int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
  725. struct ib_sa_mad *mad);
  726. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  727. union ib_gid *gid);
  728. void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
  729. enum ib_event_type type);
  730. void mlx4_ib_tunnels_update_work(struct work_struct *work);
  731. int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
  732. enum ib_qp_type qpt, struct ib_wc *wc,
  733. struct ib_grh *grh, struct ib_mad *mad);
  734. int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
  735. enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
  736. u32 qkey, struct rdma_ah_attr *attr, u8 *s_mac,
  737. u16 vlan_id, struct ib_mad *mad);
  738. __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
  739. int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
  740. struct ib_mad *mad);
  741. int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
  742. struct ib_mad *mad);
  743. void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
  744. void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
  745. /* alias guid support */
  746. void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
  747. int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
  748. void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
  749. void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
  750. void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
  751. int block_num,
  752. u8 port_num, u8 *p_data);
  753. void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
  754. int block_num, u8 port_num,
  755. u8 *p_data);
  756. int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
  757. struct attribute *attr);
  758. void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
  759. struct attribute *attr);
  760. ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
  761. void mlx4_ib_slave_alias_guid_event(struct mlx4_ib_dev *dev, int slave,
  762. int port, int slave_init);
  763. int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
  764. void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
  765. __be64 mlx4_ib_gen_node_guid(void);
  766. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
  767. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
  768. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  769. int is_attach);
  770. int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
  771. u64 start, u64 length, u64 virt_addr,
  772. int mr_access_flags, struct ib_pd *pd,
  773. struct ib_udata *udata);
  774. int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
  775. const struct ib_gid_attr *attr);
  776. void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
  777. int port);
  778. void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port);
  779. struct ib_wq *mlx4_ib_create_wq(struct ib_pd *pd,
  780. struct ib_wq_init_attr *init_attr,
  781. struct ib_udata *udata);
  782. int mlx4_ib_destroy_wq(struct ib_wq *wq);
  783. int mlx4_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
  784. u32 wq_attr_mask, struct ib_udata *udata);
  785. struct ib_rwq_ind_table
  786. *mlx4_ib_create_rwq_ind_table(struct ib_device *device,
  787. struct ib_rwq_ind_table_init_attr *init_attr,
  788. struct ib_udata *udata);
  789. int mlx4_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table);
  790. int mlx4_ib_umem_calc_optimal_mtt_size(struct ib_umem *umem, u64 start_va,
  791. int *num_of_mtts);
  792. #endif /* MLX4_IB_H */