mwl8k.c 154 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361
  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/interrupt.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.13"
  29. /* Module parameters */
  30. static bool ap_mode_default;
  31. module_param(ap_mode_default, bool, 0);
  32. MODULE_PARM_DESC(ap_mode_default,
  33. "Set to 1 to make ap mode the default instead of sta mode");
  34. /* Register definitions */
  35. #define MWL8K_HIU_GEN_PTR 0x00000c10
  36. #define MWL8K_MODE_STA 0x0000005a
  37. #define MWL8K_MODE_AP 0x000000a5
  38. #define MWL8K_HIU_INT_CODE 0x00000c14
  39. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  40. #define MWL8K_FWAP_READY 0xf1f2f4a5
  41. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  42. #define MWL8K_HIU_SCRATCH 0x00000c40
  43. /* Host->device communications */
  44. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  45. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  46. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  47. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  49. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  50. #define MWL8K_H2A_INT_RESET (1 << 15)
  51. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  52. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  53. /* Device->host communications */
  54. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  55. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  56. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  57. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  59. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  60. #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
  61. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  62. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  63. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  64. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  65. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  66. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  67. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  68. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  69. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  70. /* HW micro second timer register
  71. * located at offset 0xA600. This
  72. * will be used to timestamp tx
  73. * packets.
  74. */
  75. #define MWL8K_HW_TIMER_REGISTER 0x0000a600
  76. #define BBU_RXRDY_CNT_REG 0x0000a860
  77. #define NOK_CCA_CNT_REG 0x0000a6a0
  78. #define BBU_AVG_NOISE_VAL 0x67
  79. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  80. MWL8K_A2H_INT_CHNL_SWITCHED | \
  81. MWL8K_A2H_INT_QUEUE_EMPTY | \
  82. MWL8K_A2H_INT_RADAR_DETECT | \
  83. MWL8K_A2H_INT_RADIO_ON | \
  84. MWL8K_A2H_INT_RADIO_OFF | \
  85. MWL8K_A2H_INT_MAC_EVENT | \
  86. MWL8K_A2H_INT_OPC_DONE | \
  87. MWL8K_A2H_INT_RX_READY | \
  88. MWL8K_A2H_INT_TX_DONE | \
  89. MWL8K_A2H_INT_BA_WATCHDOG)
  90. #define MWL8K_RX_QUEUES 1
  91. #define MWL8K_TX_WMM_QUEUES 4
  92. #define MWL8K_MAX_AMPDU_QUEUES 8
  93. #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
  94. #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
  95. /* txpriorities are mapped with hw queues.
  96. * Each hw queue has a txpriority.
  97. */
  98. #define TOTAL_HW_TX_QUEUES 8
  99. /* Each HW queue can have one AMPDU stream.
  100. * But, because one of the hw queue is reserved,
  101. * maximum AMPDU queues that can be created are
  102. * one short of total tx queues.
  103. */
  104. #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1)
  105. #define MWL8K_NUM_CHANS 18
  106. struct rxd_ops {
  107. int rxd_size;
  108. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  109. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  110. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  111. __le16 *qos, s8 *noise);
  112. };
  113. struct mwl8k_device_info {
  114. char *part_name;
  115. char *helper_image;
  116. char *fw_image_sta;
  117. char *fw_image_ap;
  118. struct rxd_ops *ap_rxd_ops;
  119. u32 fw_api_ap;
  120. };
  121. struct mwl8k_rx_queue {
  122. int rxd_count;
  123. /* hw receives here */
  124. int head;
  125. /* refill descs here */
  126. int tail;
  127. void *rxd;
  128. dma_addr_t rxd_dma;
  129. struct {
  130. struct sk_buff *skb;
  131. DEFINE_DMA_UNMAP_ADDR(dma);
  132. } *buf;
  133. };
  134. struct mwl8k_tx_queue {
  135. /* hw transmits here */
  136. int head;
  137. /* sw appends here */
  138. int tail;
  139. unsigned int len;
  140. struct mwl8k_tx_desc *txd;
  141. dma_addr_t txd_dma;
  142. struct sk_buff **skb;
  143. };
  144. enum {
  145. AMPDU_NO_STREAM,
  146. AMPDU_STREAM_NEW,
  147. AMPDU_STREAM_IN_PROGRESS,
  148. AMPDU_STREAM_ACTIVE,
  149. };
  150. struct mwl8k_ampdu_stream {
  151. struct ieee80211_sta *sta;
  152. u8 tid;
  153. u8 state;
  154. u8 idx;
  155. };
  156. struct mwl8k_priv {
  157. struct ieee80211_hw *hw;
  158. struct pci_dev *pdev;
  159. int irq;
  160. struct mwl8k_device_info *device_info;
  161. void __iomem *sram;
  162. void __iomem *regs;
  163. /* firmware */
  164. const struct firmware *fw_helper;
  165. const struct firmware *fw_ucode;
  166. /* hardware/firmware parameters */
  167. bool ap_fw;
  168. struct rxd_ops *rxd_ops;
  169. struct ieee80211_supported_band band_24;
  170. struct ieee80211_channel channels_24[14];
  171. struct ieee80211_rate rates_24[13];
  172. struct ieee80211_supported_band band_50;
  173. struct ieee80211_channel channels_50[9];
  174. struct ieee80211_rate rates_50[8];
  175. u32 ap_macids_supported;
  176. u32 sta_macids_supported;
  177. /* Ampdu stream information */
  178. u8 num_ampdu_queues;
  179. spinlock_t stream_lock;
  180. struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
  181. struct work_struct watchdog_ba_handle;
  182. /* firmware access */
  183. struct mutex fw_mutex;
  184. struct task_struct *fw_mutex_owner;
  185. struct task_struct *hw_restart_owner;
  186. int fw_mutex_depth;
  187. struct completion *hostcmd_wait;
  188. atomic_t watchdog_event_pending;
  189. /* lock held over TX and TX reap */
  190. spinlock_t tx_lock;
  191. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  192. struct completion *tx_wait;
  193. /* List of interfaces. */
  194. u32 macids_used;
  195. struct list_head vif_list;
  196. /* power management status cookie from firmware */
  197. u32 *cookie;
  198. dma_addr_t cookie_dma;
  199. u16 num_mcaddrs;
  200. u8 hw_rev;
  201. u32 fw_rev;
  202. u32 caps;
  203. /*
  204. * Running count of TX packets in flight, to avoid
  205. * iterating over the transmit rings each time.
  206. */
  207. int pending_tx_pkts;
  208. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  209. struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
  210. u32 txq_offset[MWL8K_MAX_TX_QUEUES];
  211. bool radio_on;
  212. bool radio_short_preamble;
  213. bool sniffer_enabled;
  214. bool wmm_enabled;
  215. /* XXX need to convert this to handle multiple interfaces */
  216. bool capture_beacon;
  217. u8 capture_bssid[ETH_ALEN];
  218. struct sk_buff *beacon_skb;
  219. /*
  220. * This FJ worker has to be global as it is scheduled from the
  221. * RX handler. At this point we don't know which interface it
  222. * belongs to until the list of bssids waiting to complete join
  223. * is checked.
  224. */
  225. struct work_struct finalize_join_worker;
  226. /* Tasklet to perform TX reclaim. */
  227. struct tasklet_struct poll_tx_task;
  228. /* Tasklet to perform RX. */
  229. struct tasklet_struct poll_rx_task;
  230. /* Most recently reported noise in dBm */
  231. s8 noise;
  232. /*
  233. * preserve the queue configurations so they can be restored if/when
  234. * the firmware image is swapped.
  235. */
  236. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
  237. /* To perform the task of reloading the firmware */
  238. struct work_struct fw_reload;
  239. bool hw_restart_in_progress;
  240. /* async firmware loading state */
  241. unsigned fw_state;
  242. char *fw_pref;
  243. char *fw_alt;
  244. bool is_8764;
  245. struct completion firmware_loading_complete;
  246. /* bitmap of running BSSes */
  247. u32 running_bsses;
  248. /* ACS related */
  249. bool sw_scan_start;
  250. struct ieee80211_channel *acs_chan;
  251. unsigned long channel_time;
  252. struct survey_info survey[MWL8K_NUM_CHANS];
  253. };
  254. #define MAX_WEP_KEY_LEN 13
  255. #define NUM_WEP_KEYS 4
  256. /* Per interface specific private data */
  257. struct mwl8k_vif {
  258. struct list_head list;
  259. struct ieee80211_vif *vif;
  260. /* Firmware macid for this vif. */
  261. int macid;
  262. /* Non AMPDU sequence number assigned by driver. */
  263. u16 seqno;
  264. /* Saved WEP keys */
  265. struct {
  266. u8 enabled;
  267. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  268. } wep_key_conf[NUM_WEP_KEYS];
  269. /* BSSID */
  270. u8 bssid[ETH_ALEN];
  271. /* A flag to indicate is HW crypto is enabled for this bssid */
  272. bool is_hw_crypto_enabled;
  273. };
  274. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  275. #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
  276. struct tx_traffic_info {
  277. u32 start_time;
  278. u32 pkts;
  279. };
  280. #define MWL8K_MAX_TID 8
  281. struct mwl8k_sta {
  282. /* Index into station database. Returned by UPDATE_STADB. */
  283. u8 peer_id;
  284. u8 is_ampdu_allowed;
  285. struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
  286. };
  287. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  288. static const struct ieee80211_channel mwl8k_channels_24[] = {
  289. { .band = NL80211_BAND_2GHZ, .center_freq = 2412, .hw_value = 1, },
  290. { .band = NL80211_BAND_2GHZ, .center_freq = 2417, .hw_value = 2, },
  291. { .band = NL80211_BAND_2GHZ, .center_freq = 2422, .hw_value = 3, },
  292. { .band = NL80211_BAND_2GHZ, .center_freq = 2427, .hw_value = 4, },
  293. { .band = NL80211_BAND_2GHZ, .center_freq = 2432, .hw_value = 5, },
  294. { .band = NL80211_BAND_2GHZ, .center_freq = 2437, .hw_value = 6, },
  295. { .band = NL80211_BAND_2GHZ, .center_freq = 2442, .hw_value = 7, },
  296. { .band = NL80211_BAND_2GHZ, .center_freq = 2447, .hw_value = 8, },
  297. { .band = NL80211_BAND_2GHZ, .center_freq = 2452, .hw_value = 9, },
  298. { .band = NL80211_BAND_2GHZ, .center_freq = 2457, .hw_value = 10, },
  299. { .band = NL80211_BAND_2GHZ, .center_freq = 2462, .hw_value = 11, },
  300. { .band = NL80211_BAND_2GHZ, .center_freq = 2467, .hw_value = 12, },
  301. { .band = NL80211_BAND_2GHZ, .center_freq = 2472, .hw_value = 13, },
  302. { .band = NL80211_BAND_2GHZ, .center_freq = 2484, .hw_value = 14, },
  303. };
  304. static const struct ieee80211_rate mwl8k_rates_24[] = {
  305. { .bitrate = 10, .hw_value = 2, },
  306. { .bitrate = 20, .hw_value = 4, },
  307. { .bitrate = 55, .hw_value = 11, },
  308. { .bitrate = 110, .hw_value = 22, },
  309. { .bitrate = 220, .hw_value = 44, },
  310. { .bitrate = 60, .hw_value = 12, },
  311. { .bitrate = 90, .hw_value = 18, },
  312. { .bitrate = 120, .hw_value = 24, },
  313. { .bitrate = 180, .hw_value = 36, },
  314. { .bitrate = 240, .hw_value = 48, },
  315. { .bitrate = 360, .hw_value = 72, },
  316. { .bitrate = 480, .hw_value = 96, },
  317. { .bitrate = 540, .hw_value = 108, },
  318. };
  319. static const struct ieee80211_channel mwl8k_channels_50[] = {
  320. { .band = NL80211_BAND_5GHZ, .center_freq = 5180, .hw_value = 36, },
  321. { .band = NL80211_BAND_5GHZ, .center_freq = 5200, .hw_value = 40, },
  322. { .band = NL80211_BAND_5GHZ, .center_freq = 5220, .hw_value = 44, },
  323. { .band = NL80211_BAND_5GHZ, .center_freq = 5240, .hw_value = 48, },
  324. { .band = NL80211_BAND_5GHZ, .center_freq = 5745, .hw_value = 149, },
  325. { .band = NL80211_BAND_5GHZ, .center_freq = 5765, .hw_value = 153, },
  326. { .band = NL80211_BAND_5GHZ, .center_freq = 5785, .hw_value = 157, },
  327. { .band = NL80211_BAND_5GHZ, .center_freq = 5805, .hw_value = 161, },
  328. { .band = NL80211_BAND_5GHZ, .center_freq = 5825, .hw_value = 165, },
  329. };
  330. static const struct ieee80211_rate mwl8k_rates_50[] = {
  331. { .bitrate = 60, .hw_value = 12, },
  332. { .bitrate = 90, .hw_value = 18, },
  333. { .bitrate = 120, .hw_value = 24, },
  334. { .bitrate = 180, .hw_value = 36, },
  335. { .bitrate = 240, .hw_value = 48, },
  336. { .bitrate = 360, .hw_value = 72, },
  337. { .bitrate = 480, .hw_value = 96, },
  338. { .bitrate = 540, .hw_value = 108, },
  339. };
  340. /* Set or get info from Firmware */
  341. #define MWL8K_CMD_GET 0x0000
  342. #define MWL8K_CMD_SET 0x0001
  343. #define MWL8K_CMD_SET_LIST 0x0002
  344. /* Firmware command codes */
  345. #define MWL8K_CMD_CODE_DNLD 0x0001
  346. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  347. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  348. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  349. #define MWL8K_CMD_GET_STAT 0x0014
  350. #define MWL8K_CMD_BBP_REG_ACCESS 0x001a
  351. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  352. #define MWL8K_CMD_RF_TX_POWER 0x001e
  353. #define MWL8K_CMD_TX_POWER 0x001f
  354. #define MWL8K_CMD_RF_ANTENNA 0x0020
  355. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  356. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  357. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  358. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  359. #define MWL8K_CMD_SET_AID 0x010d
  360. #define MWL8K_CMD_SET_RATE 0x0110
  361. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  362. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  363. #define MWL8K_CMD_SET_SLOT 0x0114
  364. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  365. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  366. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  367. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  368. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  369. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  370. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  371. #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
  372. #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
  373. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  374. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  375. #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
  376. #define MWL8K_CMD_UPDATE_STADB 0x1123
  377. #define MWL8K_CMD_BASTREAM 0x1125
  378. #define MWL8K_LEGACY_5G_RATE_OFFSET \
  379. (ARRAY_SIZE(mwl8k_rates_24) - ARRAY_SIZE(mwl8k_rates_50))
  380. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  381. {
  382. u16 command = le16_to_cpu(cmd);
  383. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  384. snprintf(buf, bufsize, "%s", #x);\
  385. return buf;\
  386. } while (0)
  387. switch (command & ~0x8000) {
  388. MWL8K_CMDNAME(CODE_DNLD);
  389. MWL8K_CMDNAME(GET_HW_SPEC);
  390. MWL8K_CMDNAME(SET_HW_SPEC);
  391. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  392. MWL8K_CMDNAME(GET_STAT);
  393. MWL8K_CMDNAME(RADIO_CONTROL);
  394. MWL8K_CMDNAME(RF_TX_POWER);
  395. MWL8K_CMDNAME(TX_POWER);
  396. MWL8K_CMDNAME(RF_ANTENNA);
  397. MWL8K_CMDNAME(SET_BEACON);
  398. MWL8K_CMDNAME(SET_PRE_SCAN);
  399. MWL8K_CMDNAME(SET_POST_SCAN);
  400. MWL8K_CMDNAME(SET_RF_CHANNEL);
  401. MWL8K_CMDNAME(SET_AID);
  402. MWL8K_CMDNAME(SET_RATE);
  403. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  404. MWL8K_CMDNAME(RTS_THRESHOLD);
  405. MWL8K_CMDNAME(SET_SLOT);
  406. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  407. MWL8K_CMDNAME(SET_WMM_MODE);
  408. MWL8K_CMDNAME(MIMO_CONFIG);
  409. MWL8K_CMDNAME(USE_FIXED_RATE);
  410. MWL8K_CMDNAME(ENABLE_SNIFFER);
  411. MWL8K_CMDNAME(SET_MAC_ADDR);
  412. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  413. MWL8K_CMDNAME(BSS_START);
  414. MWL8K_CMDNAME(SET_NEW_STN);
  415. MWL8K_CMDNAME(UPDATE_ENCRYPTION);
  416. MWL8K_CMDNAME(UPDATE_STADB);
  417. MWL8K_CMDNAME(BASTREAM);
  418. MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
  419. default:
  420. snprintf(buf, bufsize, "0x%x", cmd);
  421. }
  422. #undef MWL8K_CMDNAME
  423. return buf;
  424. }
  425. /* Hardware and firmware reset */
  426. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  427. {
  428. iowrite32(MWL8K_H2A_INT_RESET,
  429. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  430. iowrite32(MWL8K_H2A_INT_RESET,
  431. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  432. msleep(20);
  433. }
  434. /* Release fw image */
  435. static void mwl8k_release_fw(const struct firmware **fw)
  436. {
  437. if (*fw == NULL)
  438. return;
  439. release_firmware(*fw);
  440. *fw = NULL;
  441. }
  442. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  443. {
  444. mwl8k_release_fw(&priv->fw_ucode);
  445. mwl8k_release_fw(&priv->fw_helper);
  446. }
  447. /* states for asynchronous f/w loading */
  448. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  449. enum {
  450. FW_STATE_INIT = 0,
  451. FW_STATE_LOADING_PREF,
  452. FW_STATE_LOADING_ALT,
  453. FW_STATE_ERROR,
  454. };
  455. /* Request fw image */
  456. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  457. const char *fname, const struct firmware **fw,
  458. bool nowait)
  459. {
  460. /* release current image */
  461. if (*fw != NULL)
  462. mwl8k_release_fw(fw);
  463. if (nowait)
  464. return request_firmware_nowait(THIS_MODULE, 1, fname,
  465. &priv->pdev->dev, GFP_KERNEL,
  466. priv, mwl8k_fw_state_machine);
  467. else
  468. return request_firmware(fw, fname, &priv->pdev->dev);
  469. }
  470. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  471. bool nowait)
  472. {
  473. struct mwl8k_device_info *di = priv->device_info;
  474. int rc;
  475. if (di->helper_image != NULL) {
  476. if (nowait)
  477. rc = mwl8k_request_fw(priv, di->helper_image,
  478. &priv->fw_helper, true);
  479. else
  480. rc = mwl8k_request_fw(priv, di->helper_image,
  481. &priv->fw_helper, false);
  482. if (rc)
  483. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  484. pci_name(priv->pdev), di->helper_image);
  485. if (rc || nowait)
  486. return rc;
  487. }
  488. if (nowait) {
  489. /*
  490. * if we get here, no helper image is needed. Skip the
  491. * FW_STATE_INIT state.
  492. */
  493. priv->fw_state = FW_STATE_LOADING_PREF;
  494. rc = mwl8k_request_fw(priv, fw_image,
  495. &priv->fw_ucode,
  496. true);
  497. } else
  498. rc = mwl8k_request_fw(priv, fw_image,
  499. &priv->fw_ucode, false);
  500. if (rc) {
  501. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  502. pci_name(priv->pdev), fw_image);
  503. mwl8k_release_fw(&priv->fw_helper);
  504. return rc;
  505. }
  506. return 0;
  507. }
  508. struct mwl8k_cmd_pkt {
  509. __le16 code;
  510. __le16 length;
  511. __u8 seq_num;
  512. __u8 macid;
  513. __le16 result;
  514. char payload[0];
  515. } __packed;
  516. /*
  517. * Firmware loading.
  518. */
  519. static int
  520. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  521. {
  522. void __iomem *regs = priv->regs;
  523. dma_addr_t dma_addr;
  524. int loops;
  525. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  526. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  527. return -ENOMEM;
  528. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  529. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  530. iowrite32(MWL8K_H2A_INT_DOORBELL,
  531. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  532. iowrite32(MWL8K_H2A_INT_DUMMY,
  533. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  534. loops = 1000;
  535. do {
  536. u32 int_code;
  537. if (priv->is_8764) {
  538. int_code = ioread32(regs +
  539. MWL8K_HIU_H2A_INTERRUPT_STATUS);
  540. if (int_code == 0)
  541. break;
  542. } else {
  543. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  544. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  545. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  546. break;
  547. }
  548. }
  549. cond_resched();
  550. udelay(1);
  551. } while (--loops);
  552. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  553. return loops ? 0 : -ETIMEDOUT;
  554. }
  555. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  556. const u8 *data, size_t length)
  557. {
  558. struct mwl8k_cmd_pkt *cmd;
  559. int done;
  560. int rc = 0;
  561. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  562. if (cmd == NULL)
  563. return -ENOMEM;
  564. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  565. cmd->seq_num = 0;
  566. cmd->macid = 0;
  567. cmd->result = 0;
  568. done = 0;
  569. while (length) {
  570. int block_size = length > 256 ? 256 : length;
  571. memcpy(cmd->payload, data + done, block_size);
  572. cmd->length = cpu_to_le16(block_size);
  573. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  574. sizeof(*cmd) + block_size);
  575. if (rc)
  576. break;
  577. done += block_size;
  578. length -= block_size;
  579. }
  580. if (!rc) {
  581. cmd->length = 0;
  582. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  583. }
  584. kfree(cmd);
  585. return rc;
  586. }
  587. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  588. const u8 *data, size_t length)
  589. {
  590. unsigned char *buffer;
  591. int may_continue, rc = 0;
  592. u32 done, prev_block_size;
  593. buffer = kmalloc(1024, GFP_KERNEL);
  594. if (buffer == NULL)
  595. return -ENOMEM;
  596. done = 0;
  597. prev_block_size = 0;
  598. may_continue = 1000;
  599. while (may_continue > 0) {
  600. u32 block_size;
  601. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  602. if (block_size & 1) {
  603. block_size &= ~1;
  604. may_continue--;
  605. } else {
  606. done += prev_block_size;
  607. length -= prev_block_size;
  608. }
  609. if (block_size > 1024 || block_size > length) {
  610. rc = -EOVERFLOW;
  611. break;
  612. }
  613. if (length == 0) {
  614. rc = 0;
  615. break;
  616. }
  617. if (block_size == 0) {
  618. rc = -EPROTO;
  619. may_continue--;
  620. udelay(1);
  621. continue;
  622. }
  623. prev_block_size = block_size;
  624. memcpy(buffer, data + done, block_size);
  625. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  626. if (rc)
  627. break;
  628. }
  629. if (!rc && length != 0)
  630. rc = -EREMOTEIO;
  631. kfree(buffer);
  632. return rc;
  633. }
  634. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  635. {
  636. struct mwl8k_priv *priv = hw->priv;
  637. const struct firmware *fw = priv->fw_ucode;
  638. int rc;
  639. int loops;
  640. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4) && !priv->is_8764) {
  641. const struct firmware *helper = priv->fw_helper;
  642. if (helper == NULL) {
  643. printk(KERN_ERR "%s: helper image needed but none "
  644. "given\n", pci_name(priv->pdev));
  645. return -EINVAL;
  646. }
  647. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  648. if (rc) {
  649. printk(KERN_ERR "%s: unable to load firmware "
  650. "helper image\n", pci_name(priv->pdev));
  651. return rc;
  652. }
  653. msleep(20);
  654. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  655. } else {
  656. if (priv->is_8764)
  657. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  658. else
  659. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  660. }
  661. if (rc) {
  662. printk(KERN_ERR "%s: unable to load firmware image\n",
  663. pci_name(priv->pdev));
  664. return rc;
  665. }
  666. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  667. loops = 500000;
  668. do {
  669. u32 ready_code;
  670. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  671. if (ready_code == MWL8K_FWAP_READY) {
  672. priv->ap_fw = true;
  673. break;
  674. } else if (ready_code == MWL8K_FWSTA_READY) {
  675. priv->ap_fw = false;
  676. break;
  677. }
  678. cond_resched();
  679. udelay(1);
  680. } while (--loops);
  681. return loops ? 0 : -ETIMEDOUT;
  682. }
  683. /* DMA header used by firmware and hardware. */
  684. struct mwl8k_dma_data {
  685. __le16 fwlen;
  686. struct ieee80211_hdr wh;
  687. char data[0];
  688. } __packed;
  689. /* Routines to add/remove DMA header from skb. */
  690. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  691. {
  692. struct mwl8k_dma_data *tr;
  693. int hdrlen;
  694. tr = (struct mwl8k_dma_data *)skb->data;
  695. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  696. if (hdrlen != sizeof(tr->wh)) {
  697. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  698. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  699. *((__le16 *)(tr->data - 2)) = qos;
  700. } else {
  701. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  702. }
  703. }
  704. if (hdrlen != sizeof(*tr))
  705. skb_pull(skb, sizeof(*tr) - hdrlen);
  706. }
  707. #define REDUCED_TX_HEADROOM 8
  708. static void
  709. mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
  710. int head_pad, int tail_pad)
  711. {
  712. struct ieee80211_hdr *wh;
  713. int hdrlen;
  714. int reqd_hdrlen;
  715. struct mwl8k_dma_data *tr;
  716. /*
  717. * Add a firmware DMA header; the firmware requires that we
  718. * present a 2-byte payload length followed by a 4-address
  719. * header (without QoS field), followed (optionally) by any
  720. * WEP/ExtIV header (but only filled in for CCMP).
  721. */
  722. wh = (struct ieee80211_hdr *)skb->data;
  723. hdrlen = ieee80211_hdrlen(wh->frame_control);
  724. /*
  725. * Check if skb_resize is required because of
  726. * tx_headroom adjustment.
  727. */
  728. if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
  729. + REDUCED_TX_HEADROOM))) {
  730. if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
  731. wiphy_err(priv->hw->wiphy,
  732. "Failed to reallocate TX buffer\n");
  733. return;
  734. }
  735. skb->truesize += REDUCED_TX_HEADROOM;
  736. }
  737. reqd_hdrlen = sizeof(*tr) + head_pad;
  738. if (hdrlen != reqd_hdrlen)
  739. skb_push(skb, reqd_hdrlen - hdrlen);
  740. if (ieee80211_is_data_qos(wh->frame_control))
  741. hdrlen -= IEEE80211_QOS_CTL_LEN;
  742. tr = (struct mwl8k_dma_data *)skb->data;
  743. if (wh != &tr->wh)
  744. memmove(&tr->wh, wh, hdrlen);
  745. if (hdrlen != sizeof(tr->wh))
  746. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  747. /*
  748. * Firmware length is the length of the fully formed "802.11
  749. * payload". That is, everything except for the 802.11 header.
  750. * This includes all crypto material including the MIC.
  751. */
  752. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  753. }
  754. static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
  755. struct sk_buff *skb)
  756. {
  757. struct ieee80211_hdr *wh;
  758. struct ieee80211_tx_info *tx_info;
  759. struct ieee80211_key_conf *key_conf;
  760. int data_pad;
  761. int head_pad = 0;
  762. wh = (struct ieee80211_hdr *)skb->data;
  763. tx_info = IEEE80211_SKB_CB(skb);
  764. key_conf = NULL;
  765. if (ieee80211_is_data(wh->frame_control))
  766. key_conf = tx_info->control.hw_key;
  767. /*
  768. * Make sure the packet header is in the DMA header format (4-address
  769. * without QoS), and add head & tail padding when HW crypto is enabled.
  770. *
  771. * We have the following trailer padding requirements:
  772. * - WEP: 4 trailer bytes (ICV)
  773. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  774. * - CCMP: 8 trailer bytes (MIC)
  775. */
  776. data_pad = 0;
  777. if (key_conf != NULL) {
  778. head_pad = key_conf->iv_len;
  779. switch (key_conf->cipher) {
  780. case WLAN_CIPHER_SUITE_WEP40:
  781. case WLAN_CIPHER_SUITE_WEP104:
  782. data_pad = 4;
  783. break;
  784. case WLAN_CIPHER_SUITE_TKIP:
  785. data_pad = 12;
  786. break;
  787. case WLAN_CIPHER_SUITE_CCMP:
  788. data_pad = 8;
  789. break;
  790. }
  791. }
  792. mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
  793. }
  794. /*
  795. * Packet reception for 88w8366/88w8764 AP firmware.
  796. */
  797. struct mwl8k_rxd_ap {
  798. __le16 pkt_len;
  799. __u8 sq2;
  800. __u8 rate;
  801. __le32 pkt_phys_addr;
  802. __le32 next_rxd_phys_addr;
  803. __le16 qos_control;
  804. __le16 htsig2;
  805. __le32 hw_rssi_info;
  806. __le32 hw_noise_floor_info;
  807. __u8 noise_floor;
  808. __u8 pad0[3];
  809. __u8 rssi;
  810. __u8 rx_status;
  811. __u8 channel;
  812. __u8 rx_ctrl;
  813. } __packed;
  814. #define MWL8K_AP_RATE_INFO_MCS_FORMAT 0x80
  815. #define MWL8K_AP_RATE_INFO_40MHZ 0x40
  816. #define MWL8K_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  817. #define MWL8K_AP_RX_CTRL_OWNED_BY_HOST 0x80
  818. /* 8366/8764 AP rx_status bits */
  819. #define MWL8K_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  820. #define MWL8K_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  821. #define MWL8K_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  822. #define MWL8K_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  823. #define MWL8K_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  824. static void mwl8k_rxd_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  825. {
  826. struct mwl8k_rxd_ap *rxd = _rxd;
  827. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  828. rxd->rx_ctrl = MWL8K_AP_RX_CTRL_OWNED_BY_HOST;
  829. }
  830. static void mwl8k_rxd_ap_refill(void *_rxd, dma_addr_t addr, int len)
  831. {
  832. struct mwl8k_rxd_ap *rxd = _rxd;
  833. rxd->pkt_len = cpu_to_le16(len);
  834. rxd->pkt_phys_addr = cpu_to_le32(addr);
  835. wmb();
  836. rxd->rx_ctrl = 0;
  837. }
  838. static int
  839. mwl8k_rxd_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  840. __le16 *qos, s8 *noise)
  841. {
  842. struct mwl8k_rxd_ap *rxd = _rxd;
  843. if (!(rxd->rx_ctrl & MWL8K_AP_RX_CTRL_OWNED_BY_HOST))
  844. return -1;
  845. rmb();
  846. memset(status, 0, sizeof(*status));
  847. status->signal = -rxd->rssi;
  848. *noise = -rxd->noise_floor;
  849. if (rxd->rate & MWL8K_AP_RATE_INFO_MCS_FORMAT) {
  850. status->encoding = RX_ENC_HT;
  851. if (rxd->rate & MWL8K_AP_RATE_INFO_40MHZ)
  852. status->bw = RATE_INFO_BW_40;
  853. status->rate_idx = MWL8K_AP_RATE_INFO_RATEID(rxd->rate);
  854. } else {
  855. int i;
  856. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  857. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  858. status->rate_idx = i;
  859. break;
  860. }
  861. }
  862. }
  863. if (rxd->channel > 14) {
  864. status->band = NL80211_BAND_5GHZ;
  865. if (!(status->encoding == RX_ENC_HT) &&
  866. status->rate_idx >= MWL8K_LEGACY_5G_RATE_OFFSET)
  867. status->rate_idx -= MWL8K_LEGACY_5G_RATE_OFFSET;
  868. } else {
  869. status->band = NL80211_BAND_2GHZ;
  870. }
  871. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  872. status->band);
  873. *qos = rxd->qos_control;
  874. if ((rxd->rx_status != MWL8K_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  875. (rxd->rx_status & MWL8K_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  876. (rxd->rx_status & MWL8K_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  877. status->flag |= RX_FLAG_MMIC_ERROR;
  878. return le16_to_cpu(rxd->pkt_len);
  879. }
  880. static struct rxd_ops rxd_ap_ops = {
  881. .rxd_size = sizeof(struct mwl8k_rxd_ap),
  882. .rxd_init = mwl8k_rxd_ap_init,
  883. .rxd_refill = mwl8k_rxd_ap_refill,
  884. .rxd_process = mwl8k_rxd_ap_process,
  885. };
  886. /*
  887. * Packet reception for STA firmware.
  888. */
  889. struct mwl8k_rxd_sta {
  890. __le16 pkt_len;
  891. __u8 link_quality;
  892. __u8 noise_level;
  893. __le32 pkt_phys_addr;
  894. __le32 next_rxd_phys_addr;
  895. __le16 qos_control;
  896. __le16 rate_info;
  897. __le32 pad0[4];
  898. __u8 rssi;
  899. __u8 channel;
  900. __le16 pad1;
  901. __u8 rx_ctrl;
  902. __u8 rx_status;
  903. __u8 pad2[2];
  904. } __packed;
  905. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  906. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  907. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  908. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  909. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  910. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  911. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  912. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  913. /* ICV=0 or MIC=1 */
  914. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  915. /* Key is uploaded only in failure case */
  916. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  917. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  918. {
  919. struct mwl8k_rxd_sta *rxd = _rxd;
  920. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  921. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  922. }
  923. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  924. {
  925. struct mwl8k_rxd_sta *rxd = _rxd;
  926. rxd->pkt_len = cpu_to_le16(len);
  927. rxd->pkt_phys_addr = cpu_to_le32(addr);
  928. wmb();
  929. rxd->rx_ctrl = 0;
  930. }
  931. static int
  932. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  933. __le16 *qos, s8 *noise)
  934. {
  935. struct mwl8k_rxd_sta *rxd = _rxd;
  936. u16 rate_info;
  937. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  938. return -1;
  939. rmb();
  940. rate_info = le16_to_cpu(rxd->rate_info);
  941. memset(status, 0, sizeof(*status));
  942. status->signal = -rxd->rssi;
  943. *noise = -rxd->noise_level;
  944. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  945. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  946. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  947. status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
  948. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  949. status->bw = RATE_INFO_BW_40;
  950. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  951. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  952. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  953. status->encoding = RX_ENC_HT;
  954. if (rxd->channel > 14) {
  955. status->band = NL80211_BAND_5GHZ;
  956. if (!(status->encoding == RX_ENC_HT) &&
  957. status->rate_idx >= MWL8K_LEGACY_5G_RATE_OFFSET)
  958. status->rate_idx -= MWL8K_LEGACY_5G_RATE_OFFSET;
  959. } else {
  960. status->band = NL80211_BAND_2GHZ;
  961. }
  962. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  963. status->band);
  964. *qos = rxd->qos_control;
  965. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  966. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  967. status->flag |= RX_FLAG_MMIC_ERROR;
  968. return le16_to_cpu(rxd->pkt_len);
  969. }
  970. static struct rxd_ops rxd_sta_ops = {
  971. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  972. .rxd_init = mwl8k_rxd_sta_init,
  973. .rxd_refill = mwl8k_rxd_sta_refill,
  974. .rxd_process = mwl8k_rxd_sta_process,
  975. };
  976. #define MWL8K_RX_DESCS 256
  977. #define MWL8K_RX_MAXSZ 3800
  978. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  979. {
  980. struct mwl8k_priv *priv = hw->priv;
  981. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  982. int size;
  983. int i;
  984. rxq->rxd_count = 0;
  985. rxq->head = 0;
  986. rxq->tail = 0;
  987. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  988. rxq->rxd = pci_zalloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  989. if (rxq->rxd == NULL) {
  990. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  991. return -ENOMEM;
  992. }
  993. rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
  994. if (rxq->buf == NULL) {
  995. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  996. return -ENOMEM;
  997. }
  998. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  999. int desc_size;
  1000. void *rxd;
  1001. int nexti;
  1002. dma_addr_t next_dma_addr;
  1003. desc_size = priv->rxd_ops->rxd_size;
  1004. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  1005. nexti = i + 1;
  1006. if (nexti == MWL8K_RX_DESCS)
  1007. nexti = 0;
  1008. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  1009. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  1010. }
  1011. return 0;
  1012. }
  1013. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  1014. {
  1015. struct mwl8k_priv *priv = hw->priv;
  1016. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1017. int refilled;
  1018. refilled = 0;
  1019. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  1020. struct sk_buff *skb;
  1021. dma_addr_t addr;
  1022. int rx;
  1023. void *rxd;
  1024. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  1025. if (skb == NULL)
  1026. break;
  1027. addr = pci_map_single(priv->pdev, skb->data,
  1028. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  1029. rxq->rxd_count++;
  1030. rx = rxq->tail++;
  1031. if (rxq->tail == MWL8K_RX_DESCS)
  1032. rxq->tail = 0;
  1033. rxq->buf[rx].skb = skb;
  1034. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  1035. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  1036. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  1037. refilled++;
  1038. }
  1039. return refilled;
  1040. }
  1041. /* Must be called only when the card's reception is completely halted */
  1042. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  1043. {
  1044. struct mwl8k_priv *priv = hw->priv;
  1045. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1046. int i;
  1047. if (rxq->rxd == NULL)
  1048. return;
  1049. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  1050. if (rxq->buf[i].skb != NULL) {
  1051. pci_unmap_single(priv->pdev,
  1052. dma_unmap_addr(&rxq->buf[i], dma),
  1053. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1054. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  1055. kfree_skb(rxq->buf[i].skb);
  1056. rxq->buf[i].skb = NULL;
  1057. }
  1058. }
  1059. kfree(rxq->buf);
  1060. rxq->buf = NULL;
  1061. pci_free_consistent(priv->pdev,
  1062. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  1063. rxq->rxd, rxq->rxd_dma);
  1064. rxq->rxd = NULL;
  1065. }
  1066. /*
  1067. * Scan a list of BSSIDs to process for finalize join.
  1068. * Allows for extension to process multiple BSSIDs.
  1069. */
  1070. static inline int
  1071. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  1072. {
  1073. return priv->capture_beacon &&
  1074. ieee80211_is_beacon(wh->frame_control) &&
  1075. ether_addr_equal_64bits(wh->addr3, priv->capture_bssid);
  1076. }
  1077. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  1078. struct sk_buff *skb)
  1079. {
  1080. struct mwl8k_priv *priv = hw->priv;
  1081. priv->capture_beacon = false;
  1082. eth_zero_addr(priv->capture_bssid);
  1083. /*
  1084. * Use GFP_ATOMIC as rxq_process is called from
  1085. * the primary interrupt handler, memory allocation call
  1086. * must not sleep.
  1087. */
  1088. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  1089. if (priv->beacon_skb != NULL)
  1090. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  1091. }
  1092. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  1093. u8 *bssid)
  1094. {
  1095. struct mwl8k_vif *mwl8k_vif;
  1096. list_for_each_entry(mwl8k_vif,
  1097. vif_list, list) {
  1098. if (memcmp(bssid, mwl8k_vif->bssid,
  1099. ETH_ALEN) == 0)
  1100. return mwl8k_vif;
  1101. }
  1102. return NULL;
  1103. }
  1104. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  1105. {
  1106. struct mwl8k_priv *priv = hw->priv;
  1107. struct mwl8k_vif *mwl8k_vif = NULL;
  1108. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1109. int processed;
  1110. processed = 0;
  1111. while (rxq->rxd_count && limit--) {
  1112. struct sk_buff *skb;
  1113. void *rxd;
  1114. int pkt_len;
  1115. struct ieee80211_rx_status status;
  1116. struct ieee80211_hdr *wh;
  1117. __le16 qos;
  1118. skb = rxq->buf[rxq->head].skb;
  1119. if (skb == NULL)
  1120. break;
  1121. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1122. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1123. &priv->noise);
  1124. if (pkt_len < 0)
  1125. break;
  1126. rxq->buf[rxq->head].skb = NULL;
  1127. pci_unmap_single(priv->pdev,
  1128. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1129. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1130. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1131. rxq->head++;
  1132. if (rxq->head == MWL8K_RX_DESCS)
  1133. rxq->head = 0;
  1134. rxq->rxd_count--;
  1135. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1136. /*
  1137. * Check for a pending join operation. Save a
  1138. * copy of the beacon and schedule a tasklet to
  1139. * send a FINALIZE_JOIN command to the firmware.
  1140. */
  1141. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1142. mwl8k_save_beacon(hw, skb);
  1143. if (ieee80211_has_protected(wh->frame_control)) {
  1144. /* Check if hw crypto has been enabled for
  1145. * this bss. If yes, set the status flags
  1146. * accordingly
  1147. */
  1148. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1149. wh->addr1);
  1150. if (mwl8k_vif != NULL &&
  1151. mwl8k_vif->is_hw_crypto_enabled) {
  1152. /*
  1153. * When MMIC ERROR is encountered
  1154. * by the firmware, payload is
  1155. * dropped and only 32 bytes of
  1156. * mwl8k Firmware header is sent
  1157. * to the host.
  1158. *
  1159. * We need to add four bytes of
  1160. * key information. In it
  1161. * MAC80211 expects keyidx set to
  1162. * 0 for triggering Counter
  1163. * Measure of MMIC failure.
  1164. */
  1165. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1166. struct mwl8k_dma_data *tr;
  1167. tr = (struct mwl8k_dma_data *)skb->data;
  1168. memset((void *)&(tr->data), 0, 4);
  1169. pkt_len += 4;
  1170. }
  1171. if (!ieee80211_is_auth(wh->frame_control))
  1172. status.flag |= RX_FLAG_IV_STRIPPED |
  1173. RX_FLAG_DECRYPTED |
  1174. RX_FLAG_MMIC_STRIPPED;
  1175. }
  1176. }
  1177. skb_put(skb, pkt_len);
  1178. mwl8k_remove_dma_header(skb, qos);
  1179. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1180. ieee80211_rx_irqsafe(hw, skb);
  1181. processed++;
  1182. }
  1183. return processed;
  1184. }
  1185. /*
  1186. * Packet transmission.
  1187. */
  1188. #define MWL8K_TXD_STATUS_OK 0x00000001
  1189. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1190. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1191. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1192. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1193. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1194. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1195. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1196. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1197. #define MWL8K_QOS_EOSP 0x0010
  1198. struct mwl8k_tx_desc {
  1199. __le32 status;
  1200. __u8 data_rate;
  1201. __u8 tx_priority;
  1202. __le16 qos_control;
  1203. __le32 pkt_phys_addr;
  1204. __le16 pkt_len;
  1205. __u8 dest_MAC_addr[ETH_ALEN];
  1206. __le32 next_txd_phys_addr;
  1207. __le32 timestamp;
  1208. __le16 rate_info;
  1209. __u8 peer_id;
  1210. __u8 tx_frag_cnt;
  1211. } __packed;
  1212. #define MWL8K_TX_DESCS 128
  1213. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1214. {
  1215. struct mwl8k_priv *priv = hw->priv;
  1216. struct mwl8k_tx_queue *txq = priv->txq + index;
  1217. int size;
  1218. int i;
  1219. txq->len = 0;
  1220. txq->head = 0;
  1221. txq->tail = 0;
  1222. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1223. txq->txd = pci_zalloc_consistent(priv->pdev, size, &txq->txd_dma);
  1224. if (txq->txd == NULL) {
  1225. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1226. return -ENOMEM;
  1227. }
  1228. txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
  1229. if (txq->skb == NULL) {
  1230. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1231. txq->txd = NULL;
  1232. return -ENOMEM;
  1233. }
  1234. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1235. struct mwl8k_tx_desc *tx_desc;
  1236. int nexti;
  1237. tx_desc = txq->txd + i;
  1238. nexti = (i + 1) % MWL8K_TX_DESCS;
  1239. tx_desc->status = 0;
  1240. tx_desc->next_txd_phys_addr =
  1241. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1242. }
  1243. return 0;
  1244. }
  1245. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1246. {
  1247. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1248. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1249. iowrite32(MWL8K_H2A_INT_DUMMY,
  1250. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1251. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1252. }
  1253. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1254. {
  1255. struct mwl8k_priv *priv = hw->priv;
  1256. int i;
  1257. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  1258. struct mwl8k_tx_queue *txq = priv->txq + i;
  1259. int fw_owned = 0;
  1260. int drv_owned = 0;
  1261. int unused = 0;
  1262. int desc;
  1263. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1264. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1265. u32 status;
  1266. status = le32_to_cpu(tx_desc->status);
  1267. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1268. fw_owned++;
  1269. else
  1270. drv_owned++;
  1271. if (tx_desc->pkt_len == 0)
  1272. unused++;
  1273. }
  1274. wiphy_err(hw->wiphy,
  1275. "txq[%d] len=%d head=%d tail=%d "
  1276. "fw_owned=%d drv_owned=%d unused=%d\n",
  1277. i,
  1278. txq->len, txq->head, txq->tail,
  1279. fw_owned, drv_owned, unused);
  1280. }
  1281. }
  1282. /*
  1283. * Must be called with priv->fw_mutex held and tx queues stopped.
  1284. */
  1285. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1286. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1287. {
  1288. struct mwl8k_priv *priv = hw->priv;
  1289. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1290. int retry;
  1291. int rc;
  1292. might_sleep();
  1293. /* Since fw restart is in progress, allow only the firmware
  1294. * commands from the restart code and block the other
  1295. * commands since they are going to fail in any case since
  1296. * the firmware has crashed
  1297. */
  1298. if (priv->hw_restart_in_progress) {
  1299. if (priv->hw_restart_owner == current)
  1300. return 0;
  1301. else
  1302. return -EBUSY;
  1303. }
  1304. if (atomic_read(&priv->watchdog_event_pending))
  1305. return 0;
  1306. /*
  1307. * The TX queues are stopped at this point, so this test
  1308. * doesn't need to take ->tx_lock.
  1309. */
  1310. if (!priv->pending_tx_pkts)
  1311. return 0;
  1312. retry = 1;
  1313. rc = 0;
  1314. spin_lock_bh(&priv->tx_lock);
  1315. priv->tx_wait = &tx_wait;
  1316. while (!rc) {
  1317. int oldcount;
  1318. unsigned long timeout;
  1319. oldcount = priv->pending_tx_pkts;
  1320. spin_unlock_bh(&priv->tx_lock);
  1321. timeout = wait_for_completion_timeout(&tx_wait,
  1322. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1323. if (atomic_read(&priv->watchdog_event_pending)) {
  1324. spin_lock_bh(&priv->tx_lock);
  1325. priv->tx_wait = NULL;
  1326. spin_unlock_bh(&priv->tx_lock);
  1327. return 0;
  1328. }
  1329. spin_lock_bh(&priv->tx_lock);
  1330. if (timeout || !priv->pending_tx_pkts) {
  1331. WARN_ON(priv->pending_tx_pkts);
  1332. if (retry)
  1333. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1334. break;
  1335. }
  1336. if (retry) {
  1337. mwl8k_tx_start(priv);
  1338. retry = 0;
  1339. continue;
  1340. }
  1341. if (priv->pending_tx_pkts < oldcount) {
  1342. wiphy_notice(hw->wiphy,
  1343. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1344. oldcount, priv->pending_tx_pkts);
  1345. retry = 1;
  1346. continue;
  1347. }
  1348. priv->tx_wait = NULL;
  1349. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1350. MWL8K_TX_WAIT_TIMEOUT_MS);
  1351. mwl8k_dump_tx_rings(hw);
  1352. priv->hw_restart_in_progress = true;
  1353. ieee80211_queue_work(hw, &priv->fw_reload);
  1354. rc = -ETIMEDOUT;
  1355. }
  1356. priv->tx_wait = NULL;
  1357. spin_unlock_bh(&priv->tx_lock);
  1358. return rc;
  1359. }
  1360. #define MWL8K_TXD_SUCCESS(status) \
  1361. ((status) & (MWL8K_TXD_STATUS_OK | \
  1362. MWL8K_TXD_STATUS_OK_RETRY | \
  1363. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1364. static int mwl8k_tid_queue_mapping(u8 tid)
  1365. {
  1366. BUG_ON(tid > 7);
  1367. switch (tid) {
  1368. case 0:
  1369. case 3:
  1370. return IEEE80211_AC_BE;
  1371. case 1:
  1372. case 2:
  1373. return IEEE80211_AC_BK;
  1374. case 4:
  1375. case 5:
  1376. return IEEE80211_AC_VI;
  1377. case 6:
  1378. case 7:
  1379. return IEEE80211_AC_VO;
  1380. default:
  1381. return -1;
  1382. }
  1383. }
  1384. /* The firmware will fill in the rate information
  1385. * for each packet that gets queued in the hardware
  1386. * and these macros will interpret that info.
  1387. */
  1388. #define RI_FORMAT(a) (a & 0x0001)
  1389. #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
  1390. static int
  1391. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1392. {
  1393. struct mwl8k_priv *priv = hw->priv;
  1394. struct mwl8k_tx_queue *txq = priv->txq + index;
  1395. int processed;
  1396. processed = 0;
  1397. while (txq->len > 0 && limit--) {
  1398. int tx;
  1399. struct mwl8k_tx_desc *tx_desc;
  1400. unsigned long addr;
  1401. int size;
  1402. struct sk_buff *skb;
  1403. struct ieee80211_tx_info *info;
  1404. u32 status;
  1405. struct ieee80211_sta *sta;
  1406. struct mwl8k_sta *sta_info = NULL;
  1407. u16 rate_info;
  1408. struct ieee80211_hdr *wh;
  1409. tx = txq->head;
  1410. tx_desc = txq->txd + tx;
  1411. status = le32_to_cpu(tx_desc->status);
  1412. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1413. if (!force)
  1414. break;
  1415. tx_desc->status &=
  1416. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1417. }
  1418. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1419. BUG_ON(txq->len == 0);
  1420. txq->len--;
  1421. priv->pending_tx_pkts--;
  1422. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1423. size = le16_to_cpu(tx_desc->pkt_len);
  1424. skb = txq->skb[tx];
  1425. txq->skb[tx] = NULL;
  1426. BUG_ON(skb == NULL);
  1427. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1428. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1429. wh = (struct ieee80211_hdr *) skb->data;
  1430. /* Mark descriptor as unused */
  1431. tx_desc->pkt_phys_addr = 0;
  1432. tx_desc->pkt_len = 0;
  1433. info = IEEE80211_SKB_CB(skb);
  1434. if (ieee80211_is_data(wh->frame_control)) {
  1435. rcu_read_lock();
  1436. sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
  1437. wh->addr2);
  1438. if (sta) {
  1439. sta_info = MWL8K_STA(sta);
  1440. BUG_ON(sta_info == NULL);
  1441. rate_info = le16_to_cpu(tx_desc->rate_info);
  1442. /* If rate is < 6.5 Mpbs for an ht station
  1443. * do not form an ampdu. If the station is a
  1444. * legacy station (format = 0), do not form an
  1445. * ampdu
  1446. */
  1447. if (RI_RATE_ID_MCS(rate_info) < 1 ||
  1448. RI_FORMAT(rate_info) == 0) {
  1449. sta_info->is_ampdu_allowed = false;
  1450. } else {
  1451. sta_info->is_ampdu_allowed = true;
  1452. }
  1453. }
  1454. rcu_read_unlock();
  1455. }
  1456. ieee80211_tx_info_clear_status(info);
  1457. /* Rate control is happening in the firmware.
  1458. * Ensure no tx rate is being reported.
  1459. */
  1460. info->status.rates[0].idx = -1;
  1461. info->status.rates[0].count = 1;
  1462. if (MWL8K_TXD_SUCCESS(status))
  1463. info->flags |= IEEE80211_TX_STAT_ACK;
  1464. ieee80211_tx_status_irqsafe(hw, skb);
  1465. processed++;
  1466. }
  1467. return processed;
  1468. }
  1469. /* must be called only when the card's transmit is completely halted */
  1470. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1471. {
  1472. struct mwl8k_priv *priv = hw->priv;
  1473. struct mwl8k_tx_queue *txq = priv->txq + index;
  1474. if (txq->txd == NULL)
  1475. return;
  1476. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1477. kfree(txq->skb);
  1478. txq->skb = NULL;
  1479. pci_free_consistent(priv->pdev,
  1480. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1481. txq->txd, txq->txd_dma);
  1482. txq->txd = NULL;
  1483. }
  1484. /* caller must hold priv->stream_lock when calling the stream functions */
  1485. static struct mwl8k_ampdu_stream *
  1486. mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
  1487. {
  1488. struct mwl8k_ampdu_stream *stream;
  1489. struct mwl8k_priv *priv = hw->priv;
  1490. int i;
  1491. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1492. stream = &priv->ampdu[i];
  1493. if (stream->state == AMPDU_NO_STREAM) {
  1494. stream->sta = sta;
  1495. stream->state = AMPDU_STREAM_NEW;
  1496. stream->tid = tid;
  1497. stream->idx = i;
  1498. wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
  1499. sta->addr, tid);
  1500. return stream;
  1501. }
  1502. }
  1503. return NULL;
  1504. }
  1505. static int
  1506. mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1507. {
  1508. int ret;
  1509. /* if the stream has already been started, don't start it again */
  1510. if (stream->state != AMPDU_STREAM_NEW)
  1511. return 0;
  1512. ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
  1513. if (ret)
  1514. wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
  1515. "%d\n", stream->sta->addr, stream->tid, ret);
  1516. else
  1517. wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
  1518. stream->sta->addr, stream->tid);
  1519. return ret;
  1520. }
  1521. static void
  1522. mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1523. {
  1524. wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
  1525. stream->tid);
  1526. memset(stream, 0, sizeof(*stream));
  1527. }
  1528. static struct mwl8k_ampdu_stream *
  1529. mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
  1530. {
  1531. struct mwl8k_priv *priv = hw->priv;
  1532. int i;
  1533. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1534. struct mwl8k_ampdu_stream *stream;
  1535. stream = &priv->ampdu[i];
  1536. if (stream->state == AMPDU_NO_STREAM)
  1537. continue;
  1538. if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
  1539. stream->tid == tid)
  1540. return stream;
  1541. }
  1542. return NULL;
  1543. }
  1544. #define MWL8K_AMPDU_PACKET_THRESHOLD 64
  1545. static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
  1546. {
  1547. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1548. struct tx_traffic_info *tx_stats;
  1549. BUG_ON(tid >= MWL8K_MAX_TID);
  1550. tx_stats = &sta_info->tx_stats[tid];
  1551. return sta_info->is_ampdu_allowed &&
  1552. tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
  1553. }
  1554. static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
  1555. {
  1556. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1557. struct tx_traffic_info *tx_stats;
  1558. BUG_ON(tid >= MWL8K_MAX_TID);
  1559. tx_stats = &sta_info->tx_stats[tid];
  1560. if (tx_stats->start_time == 0)
  1561. tx_stats->start_time = jiffies;
  1562. /* reset the packet count after each second elapses. If the number of
  1563. * packets ever exceeds the ampdu_min_traffic threshold, we will allow
  1564. * an ampdu stream to be started.
  1565. */
  1566. if (jiffies - tx_stats->start_time > HZ) {
  1567. tx_stats->pkts = 0;
  1568. tx_stats->start_time = 0;
  1569. } else
  1570. tx_stats->pkts++;
  1571. }
  1572. /* The hardware ampdu queues start from 5.
  1573. * txpriorities for ampdu queues are
  1574. * 5 6 7 0 1 2 3 4 ie., queue 5 is highest
  1575. * and queue 3 is lowest (queue 4 is reserved)
  1576. */
  1577. #define BA_QUEUE 5
  1578. static void
  1579. mwl8k_txq_xmit(struct ieee80211_hw *hw,
  1580. int index,
  1581. struct ieee80211_sta *sta,
  1582. struct sk_buff *skb)
  1583. {
  1584. struct mwl8k_priv *priv = hw->priv;
  1585. struct ieee80211_tx_info *tx_info;
  1586. struct mwl8k_vif *mwl8k_vif;
  1587. struct ieee80211_hdr *wh;
  1588. struct mwl8k_tx_queue *txq;
  1589. struct mwl8k_tx_desc *tx;
  1590. dma_addr_t dma;
  1591. u32 txstatus;
  1592. u8 txdatarate;
  1593. u16 qos;
  1594. int txpriority;
  1595. u8 tid = 0;
  1596. struct mwl8k_ampdu_stream *stream = NULL;
  1597. bool start_ba_session = false;
  1598. bool mgmtframe = false;
  1599. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  1600. bool eapol_frame = false;
  1601. wh = (struct ieee80211_hdr *)skb->data;
  1602. if (ieee80211_is_data_qos(wh->frame_control))
  1603. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1604. else
  1605. qos = 0;
  1606. if (skb->protocol == cpu_to_be16(ETH_P_PAE))
  1607. eapol_frame = true;
  1608. if (ieee80211_is_mgmt(wh->frame_control))
  1609. mgmtframe = true;
  1610. if (priv->ap_fw)
  1611. mwl8k_encapsulate_tx_frame(priv, skb);
  1612. else
  1613. mwl8k_add_dma_header(priv, skb, 0, 0);
  1614. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1615. tx_info = IEEE80211_SKB_CB(skb);
  1616. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1617. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1618. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1619. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1620. mwl8k_vif->seqno += 0x10;
  1621. }
  1622. /* Setup firmware control bit fields for each frame type. */
  1623. txstatus = 0;
  1624. txdatarate = 0;
  1625. if (ieee80211_is_mgmt(wh->frame_control) ||
  1626. ieee80211_is_ctl(wh->frame_control)) {
  1627. txdatarate = 0;
  1628. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1629. } else if (ieee80211_is_data(wh->frame_control)) {
  1630. txdatarate = 1;
  1631. if (is_multicast_ether_addr(wh->addr1))
  1632. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1633. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1634. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1635. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1636. else
  1637. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1638. }
  1639. /* Queue ADDBA request in the respective data queue. While setting up
  1640. * the ampdu stream, mac80211 queues further packets for that
  1641. * particular ra/tid pair. However, packets piled up in the hardware
  1642. * for that ra/tid pair will still go out. ADDBA request and the
  1643. * related data packets going out from different queues asynchronously
  1644. * will cause a shift in the receiver window which might result in
  1645. * ampdu packets getting dropped at the receiver after the stream has
  1646. * been setup.
  1647. */
  1648. if (unlikely(ieee80211_is_action(wh->frame_control) &&
  1649. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  1650. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
  1651. priv->ap_fw)) {
  1652. u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
  1653. tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
  1654. index = mwl8k_tid_queue_mapping(tid);
  1655. }
  1656. txpriority = index;
  1657. if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
  1658. ieee80211_is_data_qos(wh->frame_control)) {
  1659. tid = qos & 0xf;
  1660. mwl8k_tx_count_packet(sta, tid);
  1661. spin_lock(&priv->stream_lock);
  1662. stream = mwl8k_lookup_stream(hw, sta->addr, tid);
  1663. if (stream != NULL) {
  1664. if (stream->state == AMPDU_STREAM_ACTIVE) {
  1665. WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
  1666. txpriority = (BA_QUEUE + stream->idx) %
  1667. TOTAL_HW_TX_QUEUES;
  1668. if (stream->idx <= 1)
  1669. index = stream->idx +
  1670. MWL8K_TX_WMM_QUEUES;
  1671. } else if (stream->state == AMPDU_STREAM_NEW) {
  1672. /* We get here if the driver sends us packets
  1673. * after we've initiated a stream, but before
  1674. * our ampdu_action routine has been called
  1675. * with IEEE80211_AMPDU_TX_START to get the SSN
  1676. * for the ADDBA request. So this packet can
  1677. * go out with no risk of sequence number
  1678. * mismatch. No special handling is required.
  1679. */
  1680. } else {
  1681. /* Drop packets that would go out after the
  1682. * ADDBA request was sent but before the ADDBA
  1683. * response is received. If we don't do this,
  1684. * the recipient would probably receive it
  1685. * after the ADDBA request with SSN 0. This
  1686. * will cause the recipient's BA receive window
  1687. * to shift, which would cause the subsequent
  1688. * packets in the BA stream to be discarded.
  1689. * mac80211 queues our packets for us in this
  1690. * case, so this is really just a safety check.
  1691. */
  1692. wiphy_warn(hw->wiphy,
  1693. "Cannot send packet while ADDBA "
  1694. "dialog is underway.\n");
  1695. spin_unlock(&priv->stream_lock);
  1696. dev_kfree_skb(skb);
  1697. return;
  1698. }
  1699. } else {
  1700. /* Defer calling mwl8k_start_stream so that the current
  1701. * skb can go out before the ADDBA request. This
  1702. * prevents sequence number mismatch at the recepient
  1703. * as described above.
  1704. */
  1705. if (mwl8k_ampdu_allowed(sta, tid)) {
  1706. stream = mwl8k_add_stream(hw, sta, tid);
  1707. if (stream != NULL)
  1708. start_ba_session = true;
  1709. }
  1710. }
  1711. spin_unlock(&priv->stream_lock);
  1712. } else {
  1713. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1714. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1715. }
  1716. dma = pci_map_single(priv->pdev, skb->data,
  1717. skb->len, PCI_DMA_TODEVICE);
  1718. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1719. wiphy_debug(hw->wiphy,
  1720. "failed to dma map skb, dropping TX frame.\n");
  1721. if (start_ba_session) {
  1722. spin_lock(&priv->stream_lock);
  1723. mwl8k_remove_stream(hw, stream);
  1724. spin_unlock(&priv->stream_lock);
  1725. }
  1726. dev_kfree_skb(skb);
  1727. return;
  1728. }
  1729. spin_lock_bh(&priv->tx_lock);
  1730. txq = priv->txq + index;
  1731. /* Mgmt frames that go out frequently are probe
  1732. * responses. Other mgmt frames got out relatively
  1733. * infrequently. Hence reserve 2 buffers so that
  1734. * other mgmt frames do not get dropped due to an
  1735. * already queued probe response in one of the
  1736. * reserved buffers.
  1737. */
  1738. if (txq->len >= MWL8K_TX_DESCS - 2) {
  1739. if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
  1740. if (start_ba_session) {
  1741. spin_lock(&priv->stream_lock);
  1742. mwl8k_remove_stream(hw, stream);
  1743. spin_unlock(&priv->stream_lock);
  1744. }
  1745. mwl8k_tx_start(priv);
  1746. spin_unlock_bh(&priv->tx_lock);
  1747. pci_unmap_single(priv->pdev, dma, skb->len,
  1748. PCI_DMA_TODEVICE);
  1749. dev_kfree_skb(skb);
  1750. return;
  1751. }
  1752. }
  1753. BUG_ON(txq->skb[txq->tail] != NULL);
  1754. txq->skb[txq->tail] = skb;
  1755. tx = txq->txd + txq->tail;
  1756. tx->data_rate = txdatarate;
  1757. tx->tx_priority = txpriority;
  1758. tx->qos_control = cpu_to_le16(qos);
  1759. tx->pkt_phys_addr = cpu_to_le32(dma);
  1760. tx->pkt_len = cpu_to_le16(skb->len);
  1761. tx->rate_info = 0;
  1762. if (!priv->ap_fw && sta != NULL)
  1763. tx->peer_id = MWL8K_STA(sta)->peer_id;
  1764. else
  1765. tx->peer_id = 0;
  1766. if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
  1767. tx->timestamp = cpu_to_le32(ioread32(priv->regs +
  1768. MWL8K_HW_TIMER_REGISTER));
  1769. else
  1770. tx->timestamp = 0;
  1771. wmb();
  1772. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1773. txq->len++;
  1774. priv->pending_tx_pkts++;
  1775. txq->tail++;
  1776. if (txq->tail == MWL8K_TX_DESCS)
  1777. txq->tail = 0;
  1778. mwl8k_tx_start(priv);
  1779. spin_unlock_bh(&priv->tx_lock);
  1780. /* Initiate the ampdu session here */
  1781. if (start_ba_session) {
  1782. spin_lock(&priv->stream_lock);
  1783. if (mwl8k_start_stream(hw, stream))
  1784. mwl8k_remove_stream(hw, stream);
  1785. spin_unlock(&priv->stream_lock);
  1786. }
  1787. }
  1788. /*
  1789. * Firmware access.
  1790. *
  1791. * We have the following requirements for issuing firmware commands:
  1792. * - Some commands require that the packet transmit path is idle when
  1793. * the command is issued. (For simplicity, we'll just quiesce the
  1794. * transmit path for every command.)
  1795. * - There are certain sequences of commands that need to be issued to
  1796. * the hardware sequentially, with no other intervening commands.
  1797. *
  1798. * This leads to an implementation of a "firmware lock" as a mutex that
  1799. * can be taken recursively, and which is taken by both the low-level
  1800. * command submission function (mwl8k_post_cmd) as well as any users of
  1801. * that function that require issuing of an atomic sequence of commands,
  1802. * and quiesces the transmit path whenever it's taken.
  1803. */
  1804. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1805. {
  1806. struct mwl8k_priv *priv = hw->priv;
  1807. if (priv->fw_mutex_owner != current) {
  1808. int rc;
  1809. mutex_lock(&priv->fw_mutex);
  1810. ieee80211_stop_queues(hw);
  1811. rc = mwl8k_tx_wait_empty(hw);
  1812. if (rc) {
  1813. if (!priv->hw_restart_in_progress)
  1814. ieee80211_wake_queues(hw);
  1815. mutex_unlock(&priv->fw_mutex);
  1816. return rc;
  1817. }
  1818. priv->fw_mutex_owner = current;
  1819. }
  1820. priv->fw_mutex_depth++;
  1821. return 0;
  1822. }
  1823. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1824. {
  1825. struct mwl8k_priv *priv = hw->priv;
  1826. if (!--priv->fw_mutex_depth) {
  1827. if (!priv->hw_restart_in_progress)
  1828. ieee80211_wake_queues(hw);
  1829. priv->fw_mutex_owner = NULL;
  1830. mutex_unlock(&priv->fw_mutex);
  1831. }
  1832. }
  1833. static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable,
  1834. u32 bitmap);
  1835. /*
  1836. * Command processing.
  1837. */
  1838. /* Timeout firmware commands after 10s */
  1839. #define MWL8K_CMD_TIMEOUT_MS 10000
  1840. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1841. {
  1842. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1843. struct mwl8k_priv *priv = hw->priv;
  1844. void __iomem *regs = priv->regs;
  1845. dma_addr_t dma_addr;
  1846. unsigned int dma_size;
  1847. int rc;
  1848. unsigned long timeout = 0;
  1849. u8 buf[32];
  1850. u32 bitmap = 0;
  1851. wiphy_dbg(hw->wiphy, "Posting %s [%d]\n",
  1852. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), cmd->macid);
  1853. /* Before posting firmware commands that could change the hardware
  1854. * characteristics, make sure that all BSSes are stopped temporary.
  1855. * Enable these stopped BSSes after completion of the commands
  1856. */
  1857. rc = mwl8k_fw_lock(hw);
  1858. if (rc)
  1859. return rc;
  1860. if (priv->ap_fw && priv->running_bsses) {
  1861. switch (le16_to_cpu(cmd->code)) {
  1862. case MWL8K_CMD_SET_RF_CHANNEL:
  1863. case MWL8K_CMD_RADIO_CONTROL:
  1864. case MWL8K_CMD_RF_TX_POWER:
  1865. case MWL8K_CMD_TX_POWER:
  1866. case MWL8K_CMD_RF_ANTENNA:
  1867. case MWL8K_CMD_RTS_THRESHOLD:
  1868. case MWL8K_CMD_MIMO_CONFIG:
  1869. bitmap = priv->running_bsses;
  1870. mwl8k_enable_bsses(hw, false, bitmap);
  1871. break;
  1872. }
  1873. }
  1874. cmd->result = (__force __le16) 0xffff;
  1875. dma_size = le16_to_cpu(cmd->length);
  1876. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1877. PCI_DMA_BIDIRECTIONAL);
  1878. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1879. return -ENOMEM;
  1880. priv->hostcmd_wait = &cmd_wait;
  1881. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1882. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1883. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1884. iowrite32(MWL8K_H2A_INT_DUMMY,
  1885. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1886. timeout = wait_for_completion_timeout(&cmd_wait,
  1887. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1888. priv->hostcmd_wait = NULL;
  1889. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1890. PCI_DMA_BIDIRECTIONAL);
  1891. if (!timeout) {
  1892. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1893. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1894. MWL8K_CMD_TIMEOUT_MS);
  1895. rc = -ETIMEDOUT;
  1896. } else {
  1897. int ms;
  1898. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1899. rc = cmd->result ? -EINVAL : 0;
  1900. if (rc)
  1901. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1902. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1903. le16_to_cpu(cmd->result));
  1904. else if (ms > 2000)
  1905. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1906. mwl8k_cmd_name(cmd->code,
  1907. buf, sizeof(buf)),
  1908. ms);
  1909. }
  1910. if (bitmap)
  1911. mwl8k_enable_bsses(hw, true, bitmap);
  1912. mwl8k_fw_unlock(hw);
  1913. return rc;
  1914. }
  1915. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1916. struct ieee80211_vif *vif,
  1917. struct mwl8k_cmd_pkt *cmd)
  1918. {
  1919. if (vif != NULL)
  1920. cmd->macid = MWL8K_VIF(vif)->macid;
  1921. return mwl8k_post_cmd(hw, cmd);
  1922. }
  1923. /*
  1924. * Setup code shared between STA and AP firmware images.
  1925. */
  1926. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1927. {
  1928. struct mwl8k_priv *priv = hw->priv;
  1929. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1930. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1931. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1932. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1933. priv->band_24.band = NL80211_BAND_2GHZ;
  1934. priv->band_24.channels = priv->channels_24;
  1935. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1936. priv->band_24.bitrates = priv->rates_24;
  1937. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1938. hw->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band_24;
  1939. }
  1940. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1941. {
  1942. struct mwl8k_priv *priv = hw->priv;
  1943. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1944. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1945. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1946. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1947. priv->band_50.band = NL80211_BAND_5GHZ;
  1948. priv->band_50.channels = priv->channels_50;
  1949. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1950. priv->band_50.bitrates = priv->rates_50;
  1951. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1952. hw->wiphy->bands[NL80211_BAND_5GHZ] = &priv->band_50;
  1953. }
  1954. /*
  1955. * CMD_GET_HW_SPEC (STA version).
  1956. */
  1957. struct mwl8k_cmd_get_hw_spec_sta {
  1958. struct mwl8k_cmd_pkt header;
  1959. __u8 hw_rev;
  1960. __u8 host_interface;
  1961. __le16 num_mcaddrs;
  1962. __u8 perm_addr[ETH_ALEN];
  1963. __le16 region_code;
  1964. __le32 fw_rev;
  1965. __le32 ps_cookie;
  1966. __le32 caps;
  1967. __u8 mcs_bitmap[16];
  1968. __le32 rx_queue_ptr;
  1969. __le32 num_tx_queues;
  1970. __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
  1971. __le32 caps2;
  1972. __le32 num_tx_desc_per_queue;
  1973. __le32 total_rxd;
  1974. } __packed;
  1975. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1976. #define MWL8K_CAP_GREENFIELD 0x08000000
  1977. #define MWL8K_CAP_AMPDU 0x04000000
  1978. #define MWL8K_CAP_RX_STBC 0x01000000
  1979. #define MWL8K_CAP_TX_STBC 0x00800000
  1980. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1981. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1982. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1983. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1984. #define MWL8K_CAP_DELAY_BA 0x00003000
  1985. #define MWL8K_CAP_MIMO 0x00000200
  1986. #define MWL8K_CAP_40MHZ 0x00000100
  1987. #define MWL8K_CAP_BAND_MASK 0x00000007
  1988. #define MWL8K_CAP_5GHZ 0x00000004
  1989. #define MWL8K_CAP_2GHZ4 0x00000001
  1990. static void
  1991. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1992. struct ieee80211_supported_band *band, u32 cap)
  1993. {
  1994. int rx_streams;
  1995. int tx_streams;
  1996. band->ht_cap.ht_supported = 1;
  1997. if (cap & MWL8K_CAP_MAX_AMSDU)
  1998. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1999. if (cap & MWL8K_CAP_GREENFIELD)
  2000. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  2001. if (cap & MWL8K_CAP_AMPDU) {
  2002. ieee80211_hw_set(hw, AMPDU_AGGREGATION);
  2003. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  2004. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  2005. }
  2006. if (cap & MWL8K_CAP_RX_STBC)
  2007. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  2008. if (cap & MWL8K_CAP_TX_STBC)
  2009. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  2010. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  2011. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  2012. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  2013. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  2014. if (cap & MWL8K_CAP_DELAY_BA)
  2015. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  2016. if (cap & MWL8K_CAP_40MHZ)
  2017. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2018. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  2019. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  2020. band->ht_cap.mcs.rx_mask[0] = 0xff;
  2021. if (rx_streams >= 2)
  2022. band->ht_cap.mcs.rx_mask[1] = 0xff;
  2023. if (rx_streams >= 3)
  2024. band->ht_cap.mcs.rx_mask[2] = 0xff;
  2025. band->ht_cap.mcs.rx_mask[4] = 0x01;
  2026. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2027. if (rx_streams != tx_streams) {
  2028. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2029. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  2030. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  2031. }
  2032. }
  2033. static void
  2034. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  2035. {
  2036. struct mwl8k_priv *priv = hw->priv;
  2037. if (priv->caps)
  2038. return;
  2039. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  2040. mwl8k_setup_2ghz_band(hw);
  2041. if (caps & MWL8K_CAP_MIMO)
  2042. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  2043. }
  2044. if (caps & MWL8K_CAP_5GHZ) {
  2045. mwl8k_setup_5ghz_band(hw);
  2046. if (caps & MWL8K_CAP_MIMO)
  2047. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  2048. }
  2049. priv->caps = caps;
  2050. }
  2051. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  2052. {
  2053. struct mwl8k_priv *priv = hw->priv;
  2054. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  2055. int rc;
  2056. int i;
  2057. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2058. if (cmd == NULL)
  2059. return -ENOMEM;
  2060. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2061. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2062. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2063. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2064. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2065. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2066. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  2067. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  2068. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2069. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2070. rc = mwl8k_post_cmd(hw, &cmd->header);
  2071. if (!rc) {
  2072. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2073. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2074. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2075. priv->hw_rev = cmd->hw_rev;
  2076. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2077. priv->ap_macids_supported = 0x00000000;
  2078. priv->sta_macids_supported = 0x00000001;
  2079. }
  2080. kfree(cmd);
  2081. return rc;
  2082. }
  2083. /*
  2084. * CMD_GET_HW_SPEC (AP version).
  2085. */
  2086. struct mwl8k_cmd_get_hw_spec_ap {
  2087. struct mwl8k_cmd_pkt header;
  2088. __u8 hw_rev;
  2089. __u8 host_interface;
  2090. __le16 num_wcb;
  2091. __le16 num_mcaddrs;
  2092. __u8 perm_addr[ETH_ALEN];
  2093. __le16 region_code;
  2094. __le16 num_antenna;
  2095. __le32 fw_rev;
  2096. __le32 wcbbase0;
  2097. __le32 rxwrptr;
  2098. __le32 rxrdptr;
  2099. __le32 ps_cookie;
  2100. __le32 wcbbase1;
  2101. __le32 wcbbase2;
  2102. __le32 wcbbase3;
  2103. __le32 fw_api_version;
  2104. __le32 caps;
  2105. __le32 num_of_ampdu_queues;
  2106. __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
  2107. } __packed;
  2108. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  2109. {
  2110. struct mwl8k_priv *priv = hw->priv;
  2111. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  2112. int rc, i;
  2113. u32 api_version;
  2114. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2115. if (cmd == NULL)
  2116. return -ENOMEM;
  2117. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2118. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2119. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2120. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2121. rc = mwl8k_post_cmd(hw, &cmd->header);
  2122. if (!rc) {
  2123. int off;
  2124. api_version = le32_to_cpu(cmd->fw_api_version);
  2125. if (priv->device_info->fw_api_ap != api_version) {
  2126. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  2127. " Expected %d got %d.\n", MWL8K_NAME,
  2128. priv->device_info->part_name,
  2129. priv->device_info->fw_api_ap,
  2130. api_version);
  2131. rc = -EINVAL;
  2132. goto done;
  2133. }
  2134. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2135. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2136. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2137. priv->hw_rev = cmd->hw_rev;
  2138. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2139. priv->ap_macids_supported = 0x000000ff;
  2140. priv->sta_macids_supported = 0x00000100;
  2141. priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
  2142. if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
  2143. wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
  2144. " but we only support %d.\n",
  2145. priv->num_ampdu_queues,
  2146. MWL8K_MAX_AMPDU_QUEUES);
  2147. priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
  2148. }
  2149. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  2150. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2151. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  2152. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2153. priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  2154. priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  2155. priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  2156. priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  2157. for (i = 0; i < priv->num_ampdu_queues; i++)
  2158. priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
  2159. le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
  2160. }
  2161. done:
  2162. kfree(cmd);
  2163. return rc;
  2164. }
  2165. /*
  2166. * CMD_SET_HW_SPEC.
  2167. */
  2168. struct mwl8k_cmd_set_hw_spec {
  2169. struct mwl8k_cmd_pkt header;
  2170. __u8 hw_rev;
  2171. __u8 host_interface;
  2172. __le16 num_mcaddrs;
  2173. __u8 perm_addr[ETH_ALEN];
  2174. __le16 region_code;
  2175. __le32 fw_rev;
  2176. __le32 ps_cookie;
  2177. __le32 caps;
  2178. __le32 rx_queue_ptr;
  2179. __le32 num_tx_queues;
  2180. __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
  2181. __le32 flags;
  2182. __le32 num_tx_desc_per_queue;
  2183. __le32 total_rxd;
  2184. } __packed;
  2185. /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
  2186. * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
  2187. * the packets that are queued for more than 500ms, will be dropped in the
  2188. * hardware. This helps minimizing the issues caused due to head-of-line
  2189. * blocking where a slow client can hog the bandwidth and affect traffic to a
  2190. * faster client.
  2191. */
  2192. #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
  2193. #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
  2194. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  2195. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  2196. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  2197. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  2198. {
  2199. struct mwl8k_priv *priv = hw->priv;
  2200. struct mwl8k_cmd_set_hw_spec *cmd;
  2201. int rc;
  2202. int i;
  2203. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2204. if (cmd == NULL)
  2205. return -ENOMEM;
  2206. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  2207. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2208. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2209. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2210. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2211. /*
  2212. * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
  2213. * that order. Firmware has Q3 as highest priority and Q0 as lowest
  2214. * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
  2215. * priority is interpreted the right way in firmware.
  2216. */
  2217. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  2218. int j = mwl8k_tx_queues(priv) - 1 - i;
  2219. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
  2220. }
  2221. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  2222. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  2223. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
  2224. MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
  2225. MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
  2226. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2227. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2228. rc = mwl8k_post_cmd(hw, &cmd->header);
  2229. kfree(cmd);
  2230. return rc;
  2231. }
  2232. /*
  2233. * CMD_MAC_MULTICAST_ADR.
  2234. */
  2235. struct mwl8k_cmd_mac_multicast_adr {
  2236. struct mwl8k_cmd_pkt header;
  2237. __le16 action;
  2238. __le16 numaddr;
  2239. __u8 addr[0][ETH_ALEN];
  2240. };
  2241. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  2242. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  2243. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  2244. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  2245. static struct mwl8k_cmd_pkt *
  2246. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  2247. struct netdev_hw_addr_list *mc_list)
  2248. {
  2249. struct mwl8k_priv *priv = hw->priv;
  2250. struct mwl8k_cmd_mac_multicast_adr *cmd;
  2251. int size;
  2252. int mc_count = 0;
  2253. if (mc_list)
  2254. mc_count = netdev_hw_addr_list_count(mc_list);
  2255. if (allmulti || mc_count > priv->num_mcaddrs) {
  2256. allmulti = 1;
  2257. mc_count = 0;
  2258. }
  2259. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  2260. cmd = kzalloc(size, GFP_ATOMIC);
  2261. if (cmd == NULL)
  2262. return NULL;
  2263. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  2264. cmd->header.length = cpu_to_le16(size);
  2265. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  2266. MWL8K_ENABLE_RX_BROADCAST);
  2267. if (allmulti) {
  2268. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  2269. } else if (mc_count) {
  2270. struct netdev_hw_addr *ha;
  2271. int i = 0;
  2272. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  2273. cmd->numaddr = cpu_to_le16(mc_count);
  2274. netdev_hw_addr_list_for_each(ha, mc_list) {
  2275. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  2276. }
  2277. }
  2278. return &cmd->header;
  2279. }
  2280. /*
  2281. * CMD_GET_STAT.
  2282. */
  2283. struct mwl8k_cmd_get_stat {
  2284. struct mwl8k_cmd_pkt header;
  2285. __le32 stats[64];
  2286. } __packed;
  2287. #define MWL8K_STAT_ACK_FAILURE 9
  2288. #define MWL8K_STAT_RTS_FAILURE 12
  2289. #define MWL8K_STAT_FCS_ERROR 24
  2290. #define MWL8K_STAT_RTS_SUCCESS 11
  2291. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  2292. struct ieee80211_low_level_stats *stats)
  2293. {
  2294. struct mwl8k_cmd_get_stat *cmd;
  2295. int rc;
  2296. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2297. if (cmd == NULL)
  2298. return -ENOMEM;
  2299. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  2300. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2301. rc = mwl8k_post_cmd(hw, &cmd->header);
  2302. if (!rc) {
  2303. stats->dot11ACKFailureCount =
  2304. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  2305. stats->dot11RTSFailureCount =
  2306. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  2307. stats->dot11FCSErrorCount =
  2308. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  2309. stats->dot11RTSSuccessCount =
  2310. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  2311. }
  2312. kfree(cmd);
  2313. return rc;
  2314. }
  2315. /*
  2316. * CMD_RADIO_CONTROL.
  2317. */
  2318. struct mwl8k_cmd_radio_control {
  2319. struct mwl8k_cmd_pkt header;
  2320. __le16 action;
  2321. __le16 control;
  2322. __le16 radio_on;
  2323. } __packed;
  2324. static int
  2325. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  2326. {
  2327. struct mwl8k_priv *priv = hw->priv;
  2328. struct mwl8k_cmd_radio_control *cmd;
  2329. int rc;
  2330. if (enable == priv->radio_on && !force)
  2331. return 0;
  2332. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2333. if (cmd == NULL)
  2334. return -ENOMEM;
  2335. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  2336. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2337. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2338. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  2339. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  2340. rc = mwl8k_post_cmd(hw, &cmd->header);
  2341. kfree(cmd);
  2342. if (!rc)
  2343. priv->radio_on = enable;
  2344. return rc;
  2345. }
  2346. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  2347. {
  2348. return mwl8k_cmd_radio_control(hw, 0, 0);
  2349. }
  2350. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  2351. {
  2352. return mwl8k_cmd_radio_control(hw, 1, 0);
  2353. }
  2354. static int
  2355. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  2356. {
  2357. struct mwl8k_priv *priv = hw->priv;
  2358. priv->radio_short_preamble = short_preamble;
  2359. return mwl8k_cmd_radio_control(hw, 1, 1);
  2360. }
  2361. /*
  2362. * CMD_RF_TX_POWER.
  2363. */
  2364. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  2365. struct mwl8k_cmd_rf_tx_power {
  2366. struct mwl8k_cmd_pkt header;
  2367. __le16 action;
  2368. __le16 support_level;
  2369. __le16 current_level;
  2370. __le16 reserved;
  2371. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  2372. } __packed;
  2373. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  2374. {
  2375. struct mwl8k_cmd_rf_tx_power *cmd;
  2376. int rc;
  2377. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2378. if (cmd == NULL)
  2379. return -ENOMEM;
  2380. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  2381. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2382. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2383. cmd->support_level = cpu_to_le16(dBm);
  2384. rc = mwl8k_post_cmd(hw, &cmd->header);
  2385. kfree(cmd);
  2386. return rc;
  2387. }
  2388. /*
  2389. * CMD_TX_POWER.
  2390. */
  2391. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  2392. struct mwl8k_cmd_tx_power {
  2393. struct mwl8k_cmd_pkt header;
  2394. __le16 action;
  2395. __le16 band;
  2396. __le16 channel;
  2397. __le16 bw;
  2398. __le16 sub_ch;
  2399. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  2400. } __packed;
  2401. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  2402. struct ieee80211_conf *conf,
  2403. unsigned short pwr)
  2404. {
  2405. struct ieee80211_channel *channel = conf->chandef.chan;
  2406. enum nl80211_channel_type channel_type =
  2407. cfg80211_get_chandef_type(&conf->chandef);
  2408. struct mwl8k_cmd_tx_power *cmd;
  2409. int rc;
  2410. int i;
  2411. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2412. if (cmd == NULL)
  2413. return -ENOMEM;
  2414. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  2415. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2416. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  2417. if (channel->band == NL80211_BAND_2GHZ)
  2418. cmd->band = cpu_to_le16(0x1);
  2419. else if (channel->band == NL80211_BAND_5GHZ)
  2420. cmd->band = cpu_to_le16(0x4);
  2421. cmd->channel = cpu_to_le16(channel->hw_value);
  2422. if (channel_type == NL80211_CHAN_NO_HT ||
  2423. channel_type == NL80211_CHAN_HT20) {
  2424. cmd->bw = cpu_to_le16(0x2);
  2425. } else {
  2426. cmd->bw = cpu_to_le16(0x4);
  2427. if (channel_type == NL80211_CHAN_HT40MINUS)
  2428. cmd->sub_ch = cpu_to_le16(0x3);
  2429. else if (channel_type == NL80211_CHAN_HT40PLUS)
  2430. cmd->sub_ch = cpu_to_le16(0x1);
  2431. }
  2432. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  2433. cmd->power_level_list[i] = cpu_to_le16(pwr);
  2434. rc = mwl8k_post_cmd(hw, &cmd->header);
  2435. kfree(cmd);
  2436. return rc;
  2437. }
  2438. /*
  2439. * CMD_RF_ANTENNA.
  2440. */
  2441. struct mwl8k_cmd_rf_antenna {
  2442. struct mwl8k_cmd_pkt header;
  2443. __le16 antenna;
  2444. __le16 mode;
  2445. } __packed;
  2446. #define MWL8K_RF_ANTENNA_RX 1
  2447. #define MWL8K_RF_ANTENNA_TX 2
  2448. static int
  2449. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  2450. {
  2451. struct mwl8k_cmd_rf_antenna *cmd;
  2452. int rc;
  2453. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2454. if (cmd == NULL)
  2455. return -ENOMEM;
  2456. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  2457. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2458. cmd->antenna = cpu_to_le16(antenna);
  2459. cmd->mode = cpu_to_le16(mask);
  2460. rc = mwl8k_post_cmd(hw, &cmd->header);
  2461. kfree(cmd);
  2462. return rc;
  2463. }
  2464. /*
  2465. * CMD_SET_BEACON.
  2466. */
  2467. struct mwl8k_cmd_set_beacon {
  2468. struct mwl8k_cmd_pkt header;
  2469. __le16 beacon_len;
  2470. __u8 beacon[0];
  2471. };
  2472. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2473. struct ieee80211_vif *vif, u8 *beacon, int len)
  2474. {
  2475. struct mwl8k_cmd_set_beacon *cmd;
  2476. int rc;
  2477. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2478. if (cmd == NULL)
  2479. return -ENOMEM;
  2480. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2481. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2482. cmd->beacon_len = cpu_to_le16(len);
  2483. memcpy(cmd->beacon, beacon, len);
  2484. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2485. kfree(cmd);
  2486. return rc;
  2487. }
  2488. /*
  2489. * CMD_SET_PRE_SCAN.
  2490. */
  2491. struct mwl8k_cmd_set_pre_scan {
  2492. struct mwl8k_cmd_pkt header;
  2493. } __packed;
  2494. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2495. {
  2496. struct mwl8k_cmd_set_pre_scan *cmd;
  2497. int rc;
  2498. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2499. if (cmd == NULL)
  2500. return -ENOMEM;
  2501. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2502. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2503. rc = mwl8k_post_cmd(hw, &cmd->header);
  2504. kfree(cmd);
  2505. return rc;
  2506. }
  2507. /*
  2508. * CMD_BBP_REG_ACCESS.
  2509. */
  2510. struct mwl8k_cmd_bbp_reg_access {
  2511. struct mwl8k_cmd_pkt header;
  2512. __le16 action;
  2513. __le16 offset;
  2514. u8 value;
  2515. u8 rsrv[3];
  2516. } __packed;
  2517. static int
  2518. mwl8k_cmd_bbp_reg_access(struct ieee80211_hw *hw,
  2519. u16 action,
  2520. u16 offset,
  2521. u8 *value)
  2522. {
  2523. struct mwl8k_cmd_bbp_reg_access *cmd;
  2524. int rc;
  2525. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2526. if (cmd == NULL)
  2527. return -ENOMEM;
  2528. cmd->header.code = cpu_to_le16(MWL8K_CMD_BBP_REG_ACCESS);
  2529. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2530. cmd->action = cpu_to_le16(action);
  2531. cmd->offset = cpu_to_le16(offset);
  2532. rc = mwl8k_post_cmd(hw, &cmd->header);
  2533. if (!rc)
  2534. *value = cmd->value;
  2535. else
  2536. *value = 0;
  2537. kfree(cmd);
  2538. return rc;
  2539. }
  2540. /*
  2541. * CMD_SET_POST_SCAN.
  2542. */
  2543. struct mwl8k_cmd_set_post_scan {
  2544. struct mwl8k_cmd_pkt header;
  2545. __le32 isibss;
  2546. __u8 bssid[ETH_ALEN];
  2547. } __packed;
  2548. static int
  2549. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2550. {
  2551. struct mwl8k_cmd_set_post_scan *cmd;
  2552. int rc;
  2553. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2554. if (cmd == NULL)
  2555. return -ENOMEM;
  2556. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2557. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2558. cmd->isibss = 0;
  2559. memcpy(cmd->bssid, mac, ETH_ALEN);
  2560. rc = mwl8k_post_cmd(hw, &cmd->header);
  2561. kfree(cmd);
  2562. return rc;
  2563. }
  2564. static int freq_to_idx(struct mwl8k_priv *priv, int freq)
  2565. {
  2566. struct ieee80211_supported_band *sband;
  2567. int band, ch, idx = 0;
  2568. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2569. sband = priv->hw->wiphy->bands[band];
  2570. if (!sband)
  2571. continue;
  2572. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2573. if (sband->channels[ch].center_freq == freq)
  2574. goto exit;
  2575. }
  2576. exit:
  2577. return idx;
  2578. }
  2579. static void mwl8k_update_survey(struct mwl8k_priv *priv,
  2580. struct ieee80211_channel *channel)
  2581. {
  2582. u32 cca_cnt, rx_rdy;
  2583. s8 nf = 0, idx;
  2584. struct survey_info *survey;
  2585. idx = freq_to_idx(priv, priv->acs_chan->center_freq);
  2586. if (idx >= MWL8K_NUM_CHANS) {
  2587. wiphy_err(priv->hw->wiphy, "Failed to update survey\n");
  2588. return;
  2589. }
  2590. survey = &priv->survey[idx];
  2591. cca_cnt = ioread32(priv->regs + NOK_CCA_CNT_REG);
  2592. cca_cnt /= 1000; /* uSecs to mSecs */
  2593. survey->time_busy = (u64) cca_cnt;
  2594. rx_rdy = ioread32(priv->regs + BBU_RXRDY_CNT_REG);
  2595. rx_rdy /= 1000; /* uSecs to mSecs */
  2596. survey->time_rx = (u64) rx_rdy;
  2597. priv->channel_time = jiffies - priv->channel_time;
  2598. survey->time = jiffies_to_msecs(priv->channel_time);
  2599. survey->channel = channel;
  2600. mwl8k_cmd_bbp_reg_access(priv->hw, 0, BBU_AVG_NOISE_VAL, &nf);
  2601. /* Make sure sign is negative else ACS at hostapd fails */
  2602. survey->noise = nf * -1;
  2603. survey->filled = SURVEY_INFO_NOISE_DBM |
  2604. SURVEY_INFO_TIME |
  2605. SURVEY_INFO_TIME_BUSY |
  2606. SURVEY_INFO_TIME_RX;
  2607. }
  2608. /*
  2609. * CMD_SET_RF_CHANNEL.
  2610. */
  2611. struct mwl8k_cmd_set_rf_channel {
  2612. struct mwl8k_cmd_pkt header;
  2613. __le16 action;
  2614. __u8 current_channel;
  2615. __le32 channel_flags;
  2616. } __packed;
  2617. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2618. struct ieee80211_conf *conf)
  2619. {
  2620. struct ieee80211_channel *channel = conf->chandef.chan;
  2621. enum nl80211_channel_type channel_type =
  2622. cfg80211_get_chandef_type(&conf->chandef);
  2623. struct mwl8k_cmd_set_rf_channel *cmd;
  2624. struct mwl8k_priv *priv = hw->priv;
  2625. int rc;
  2626. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2627. if (cmd == NULL)
  2628. return -ENOMEM;
  2629. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2630. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2631. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2632. cmd->current_channel = channel->hw_value;
  2633. if (channel->band == NL80211_BAND_2GHZ)
  2634. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2635. else if (channel->band == NL80211_BAND_5GHZ)
  2636. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2637. if (!priv->sw_scan_start) {
  2638. if (channel_type == NL80211_CHAN_NO_HT ||
  2639. channel_type == NL80211_CHAN_HT20)
  2640. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2641. else if (channel_type == NL80211_CHAN_HT40MINUS)
  2642. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2643. else if (channel_type == NL80211_CHAN_HT40PLUS)
  2644. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2645. } else {
  2646. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2647. }
  2648. if (priv->sw_scan_start) {
  2649. /* Store current channel stats
  2650. * before switching to newer one.
  2651. * This will be processed only for AP fw.
  2652. */
  2653. if (priv->channel_time != 0)
  2654. mwl8k_update_survey(priv, priv->acs_chan);
  2655. priv->channel_time = jiffies;
  2656. priv->acs_chan = channel;
  2657. }
  2658. rc = mwl8k_post_cmd(hw, &cmd->header);
  2659. kfree(cmd);
  2660. return rc;
  2661. }
  2662. /*
  2663. * CMD_SET_AID.
  2664. */
  2665. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2666. #define MWL8K_FRAME_PROT_11G 0x07
  2667. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2668. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2669. struct mwl8k_cmd_update_set_aid {
  2670. struct mwl8k_cmd_pkt header;
  2671. __le16 aid;
  2672. /* AP's MAC address (BSSID) */
  2673. __u8 bssid[ETH_ALEN];
  2674. __le16 protection_mode;
  2675. __u8 supp_rates[14];
  2676. } __packed;
  2677. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2678. {
  2679. int i;
  2680. int j;
  2681. /*
  2682. * Clear nonstandard rate 4.
  2683. */
  2684. mask &= 0x1fef;
  2685. for (i = 0, j = 0; i < 13; i++) {
  2686. if (mask & (1 << i))
  2687. rates[j++] = mwl8k_rates_24[i].hw_value;
  2688. }
  2689. }
  2690. static int
  2691. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2692. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2693. {
  2694. struct mwl8k_cmd_update_set_aid *cmd;
  2695. u16 prot_mode;
  2696. int rc;
  2697. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2698. if (cmd == NULL)
  2699. return -ENOMEM;
  2700. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2701. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2702. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2703. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2704. if (vif->bss_conf.use_cts_prot) {
  2705. prot_mode = MWL8K_FRAME_PROT_11G;
  2706. } else {
  2707. switch (vif->bss_conf.ht_operation_mode &
  2708. IEEE80211_HT_OP_MODE_PROTECTION) {
  2709. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2710. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2711. break;
  2712. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2713. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2714. break;
  2715. default:
  2716. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2717. break;
  2718. }
  2719. }
  2720. cmd->protection_mode = cpu_to_le16(prot_mode);
  2721. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2722. rc = mwl8k_post_cmd(hw, &cmd->header);
  2723. kfree(cmd);
  2724. return rc;
  2725. }
  2726. /*
  2727. * CMD_SET_RATE.
  2728. */
  2729. struct mwl8k_cmd_set_rate {
  2730. struct mwl8k_cmd_pkt header;
  2731. __u8 legacy_rates[14];
  2732. /* Bitmap for supported MCS codes. */
  2733. __u8 mcs_set[16];
  2734. __u8 reserved[16];
  2735. } __packed;
  2736. static int
  2737. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2738. u32 legacy_rate_mask, u8 *mcs_rates)
  2739. {
  2740. struct mwl8k_cmd_set_rate *cmd;
  2741. int rc;
  2742. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2743. if (cmd == NULL)
  2744. return -ENOMEM;
  2745. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2746. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2747. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2748. memcpy(cmd->mcs_set, mcs_rates, 16);
  2749. rc = mwl8k_post_cmd(hw, &cmd->header);
  2750. kfree(cmd);
  2751. return rc;
  2752. }
  2753. /*
  2754. * CMD_FINALIZE_JOIN.
  2755. */
  2756. #define MWL8K_FJ_BEACON_MAXLEN 128
  2757. struct mwl8k_cmd_finalize_join {
  2758. struct mwl8k_cmd_pkt header;
  2759. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2760. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2761. } __packed;
  2762. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2763. int framelen, int dtim)
  2764. {
  2765. struct mwl8k_cmd_finalize_join *cmd;
  2766. struct ieee80211_mgmt *payload = frame;
  2767. int payload_len;
  2768. int rc;
  2769. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2770. if (cmd == NULL)
  2771. return -ENOMEM;
  2772. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2773. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2774. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2775. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2776. if (payload_len < 0)
  2777. payload_len = 0;
  2778. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2779. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2780. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2781. rc = mwl8k_post_cmd(hw, &cmd->header);
  2782. kfree(cmd);
  2783. return rc;
  2784. }
  2785. /*
  2786. * CMD_SET_RTS_THRESHOLD.
  2787. */
  2788. struct mwl8k_cmd_set_rts_threshold {
  2789. struct mwl8k_cmd_pkt header;
  2790. __le16 action;
  2791. __le16 threshold;
  2792. } __packed;
  2793. static int
  2794. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2795. {
  2796. struct mwl8k_cmd_set_rts_threshold *cmd;
  2797. int rc;
  2798. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2799. if (cmd == NULL)
  2800. return -ENOMEM;
  2801. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2802. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2803. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2804. cmd->threshold = cpu_to_le16(rts_thresh);
  2805. rc = mwl8k_post_cmd(hw, &cmd->header);
  2806. kfree(cmd);
  2807. return rc;
  2808. }
  2809. /*
  2810. * CMD_SET_SLOT.
  2811. */
  2812. struct mwl8k_cmd_set_slot {
  2813. struct mwl8k_cmd_pkt header;
  2814. __le16 action;
  2815. __u8 short_slot;
  2816. } __packed;
  2817. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2818. {
  2819. struct mwl8k_cmd_set_slot *cmd;
  2820. int rc;
  2821. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2822. if (cmd == NULL)
  2823. return -ENOMEM;
  2824. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2825. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2826. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2827. cmd->short_slot = short_slot_time;
  2828. rc = mwl8k_post_cmd(hw, &cmd->header);
  2829. kfree(cmd);
  2830. return rc;
  2831. }
  2832. /*
  2833. * CMD_SET_EDCA_PARAMS.
  2834. */
  2835. struct mwl8k_cmd_set_edca_params {
  2836. struct mwl8k_cmd_pkt header;
  2837. /* See MWL8K_SET_EDCA_XXX below */
  2838. __le16 action;
  2839. /* TX opportunity in units of 32 us */
  2840. __le16 txop;
  2841. union {
  2842. struct {
  2843. /* Log exponent of max contention period: 0...15 */
  2844. __le32 log_cw_max;
  2845. /* Log exponent of min contention period: 0...15 */
  2846. __le32 log_cw_min;
  2847. /* Adaptive interframe spacing in units of 32us */
  2848. __u8 aifs;
  2849. /* TX queue to configure */
  2850. __u8 txq;
  2851. } ap;
  2852. struct {
  2853. /* Log exponent of max contention period: 0...15 */
  2854. __u8 log_cw_max;
  2855. /* Log exponent of min contention period: 0...15 */
  2856. __u8 log_cw_min;
  2857. /* Adaptive interframe spacing in units of 32us */
  2858. __u8 aifs;
  2859. /* TX queue to configure */
  2860. __u8 txq;
  2861. } sta;
  2862. };
  2863. } __packed;
  2864. #define MWL8K_SET_EDCA_CW 0x01
  2865. #define MWL8K_SET_EDCA_TXOP 0x02
  2866. #define MWL8K_SET_EDCA_AIFS 0x04
  2867. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2868. MWL8K_SET_EDCA_TXOP | \
  2869. MWL8K_SET_EDCA_AIFS)
  2870. static int
  2871. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2872. __u16 cw_min, __u16 cw_max,
  2873. __u8 aifs, __u16 txop)
  2874. {
  2875. struct mwl8k_priv *priv = hw->priv;
  2876. struct mwl8k_cmd_set_edca_params *cmd;
  2877. int rc;
  2878. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2879. if (cmd == NULL)
  2880. return -ENOMEM;
  2881. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2882. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2883. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2884. cmd->txop = cpu_to_le16(txop);
  2885. if (priv->ap_fw) {
  2886. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2887. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2888. cmd->ap.aifs = aifs;
  2889. cmd->ap.txq = qnum;
  2890. } else {
  2891. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2892. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2893. cmd->sta.aifs = aifs;
  2894. cmd->sta.txq = qnum;
  2895. }
  2896. rc = mwl8k_post_cmd(hw, &cmd->header);
  2897. kfree(cmd);
  2898. return rc;
  2899. }
  2900. /*
  2901. * CMD_SET_WMM_MODE.
  2902. */
  2903. struct mwl8k_cmd_set_wmm_mode {
  2904. struct mwl8k_cmd_pkt header;
  2905. __le16 action;
  2906. } __packed;
  2907. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2908. {
  2909. struct mwl8k_priv *priv = hw->priv;
  2910. struct mwl8k_cmd_set_wmm_mode *cmd;
  2911. int rc;
  2912. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2913. if (cmd == NULL)
  2914. return -ENOMEM;
  2915. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2916. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2917. cmd->action = cpu_to_le16(!!enable);
  2918. rc = mwl8k_post_cmd(hw, &cmd->header);
  2919. kfree(cmd);
  2920. if (!rc)
  2921. priv->wmm_enabled = enable;
  2922. return rc;
  2923. }
  2924. /*
  2925. * CMD_MIMO_CONFIG.
  2926. */
  2927. struct mwl8k_cmd_mimo_config {
  2928. struct mwl8k_cmd_pkt header;
  2929. __le32 action;
  2930. __u8 rx_antenna_map;
  2931. __u8 tx_antenna_map;
  2932. } __packed;
  2933. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2934. {
  2935. struct mwl8k_cmd_mimo_config *cmd;
  2936. int rc;
  2937. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2938. if (cmd == NULL)
  2939. return -ENOMEM;
  2940. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2941. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2942. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2943. cmd->rx_antenna_map = rx;
  2944. cmd->tx_antenna_map = tx;
  2945. rc = mwl8k_post_cmd(hw, &cmd->header);
  2946. kfree(cmd);
  2947. return rc;
  2948. }
  2949. /*
  2950. * CMD_USE_FIXED_RATE (STA version).
  2951. */
  2952. struct mwl8k_cmd_use_fixed_rate_sta {
  2953. struct mwl8k_cmd_pkt header;
  2954. __le32 action;
  2955. __le32 allow_rate_drop;
  2956. __le32 num_rates;
  2957. struct {
  2958. __le32 is_ht_rate;
  2959. __le32 enable_retry;
  2960. __le32 rate;
  2961. __le32 retry_count;
  2962. } rate_entry[8];
  2963. __le32 rate_type;
  2964. __le32 reserved1;
  2965. __le32 reserved2;
  2966. } __packed;
  2967. #define MWL8K_USE_AUTO_RATE 0x0002
  2968. #define MWL8K_UCAST_RATE 0
  2969. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2970. {
  2971. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2972. int rc;
  2973. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2974. if (cmd == NULL)
  2975. return -ENOMEM;
  2976. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2977. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2978. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2979. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2980. rc = mwl8k_post_cmd(hw, &cmd->header);
  2981. kfree(cmd);
  2982. return rc;
  2983. }
  2984. /*
  2985. * CMD_USE_FIXED_RATE (AP version).
  2986. */
  2987. struct mwl8k_cmd_use_fixed_rate_ap {
  2988. struct mwl8k_cmd_pkt header;
  2989. __le32 action;
  2990. __le32 allow_rate_drop;
  2991. __le32 num_rates;
  2992. struct mwl8k_rate_entry_ap {
  2993. __le32 is_ht_rate;
  2994. __le32 enable_retry;
  2995. __le32 rate;
  2996. __le32 retry_count;
  2997. } rate_entry[4];
  2998. u8 multicast_rate;
  2999. u8 multicast_rate_type;
  3000. u8 management_rate;
  3001. } __packed;
  3002. static int
  3003. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  3004. {
  3005. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  3006. int rc;
  3007. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3008. if (cmd == NULL)
  3009. return -ENOMEM;
  3010. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  3011. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3012. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  3013. cmd->multicast_rate = mcast;
  3014. cmd->management_rate = mgmt;
  3015. rc = mwl8k_post_cmd(hw, &cmd->header);
  3016. kfree(cmd);
  3017. return rc;
  3018. }
  3019. /*
  3020. * CMD_ENABLE_SNIFFER.
  3021. */
  3022. struct mwl8k_cmd_enable_sniffer {
  3023. struct mwl8k_cmd_pkt header;
  3024. __le32 action;
  3025. } __packed;
  3026. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  3027. {
  3028. struct mwl8k_cmd_enable_sniffer *cmd;
  3029. int rc;
  3030. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3031. if (cmd == NULL)
  3032. return -ENOMEM;
  3033. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  3034. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3035. cmd->action = cpu_to_le32(!!enable);
  3036. rc = mwl8k_post_cmd(hw, &cmd->header);
  3037. kfree(cmd);
  3038. return rc;
  3039. }
  3040. struct mwl8k_cmd_update_mac_addr {
  3041. struct mwl8k_cmd_pkt header;
  3042. union {
  3043. struct {
  3044. __le16 mac_type;
  3045. __u8 mac_addr[ETH_ALEN];
  3046. } mbss;
  3047. __u8 mac_addr[ETH_ALEN];
  3048. };
  3049. } __packed;
  3050. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  3051. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  3052. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  3053. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  3054. static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
  3055. struct ieee80211_vif *vif, u8 *mac, bool set)
  3056. {
  3057. struct mwl8k_priv *priv = hw->priv;
  3058. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3059. struct mwl8k_cmd_update_mac_addr *cmd;
  3060. int mac_type;
  3061. int rc;
  3062. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  3063. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  3064. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  3065. if (priv->ap_fw)
  3066. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  3067. else
  3068. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  3069. else
  3070. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  3071. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  3072. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  3073. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  3074. else
  3075. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  3076. }
  3077. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3078. if (cmd == NULL)
  3079. return -ENOMEM;
  3080. if (set)
  3081. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  3082. else
  3083. cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
  3084. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3085. if (priv->ap_fw) {
  3086. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  3087. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  3088. } else {
  3089. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  3090. }
  3091. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3092. kfree(cmd);
  3093. return rc;
  3094. }
  3095. /*
  3096. * MWL8K_CMD_SET_MAC_ADDR.
  3097. */
  3098. static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  3099. struct ieee80211_vif *vif, u8 *mac)
  3100. {
  3101. return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
  3102. }
  3103. /*
  3104. * MWL8K_CMD_DEL_MAC_ADDR.
  3105. */
  3106. static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
  3107. struct ieee80211_vif *vif, u8 *mac)
  3108. {
  3109. return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
  3110. }
  3111. /*
  3112. * CMD_SET_RATEADAPT_MODE.
  3113. */
  3114. struct mwl8k_cmd_set_rate_adapt_mode {
  3115. struct mwl8k_cmd_pkt header;
  3116. __le16 action;
  3117. __le16 mode;
  3118. } __packed;
  3119. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  3120. {
  3121. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  3122. int rc;
  3123. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3124. if (cmd == NULL)
  3125. return -ENOMEM;
  3126. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  3127. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3128. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  3129. cmd->mode = cpu_to_le16(mode);
  3130. rc = mwl8k_post_cmd(hw, &cmd->header);
  3131. kfree(cmd);
  3132. return rc;
  3133. }
  3134. /*
  3135. * CMD_GET_WATCHDOG_BITMAP.
  3136. */
  3137. struct mwl8k_cmd_get_watchdog_bitmap {
  3138. struct mwl8k_cmd_pkt header;
  3139. u8 bitmap;
  3140. } __packed;
  3141. static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
  3142. {
  3143. struct mwl8k_cmd_get_watchdog_bitmap *cmd;
  3144. int rc;
  3145. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3146. if (cmd == NULL)
  3147. return -ENOMEM;
  3148. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
  3149. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3150. rc = mwl8k_post_cmd(hw, &cmd->header);
  3151. if (!rc)
  3152. *bitmap = cmd->bitmap;
  3153. kfree(cmd);
  3154. return rc;
  3155. }
  3156. #define MWL8K_WMM_QUEUE_NUMBER 3
  3157. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3158. u8 idx);
  3159. static void mwl8k_watchdog_ba_events(struct work_struct *work)
  3160. {
  3161. int rc;
  3162. u8 bitmap = 0, stream_index;
  3163. struct mwl8k_ampdu_stream *streams;
  3164. struct mwl8k_priv *priv =
  3165. container_of(work, struct mwl8k_priv, watchdog_ba_handle);
  3166. struct ieee80211_hw *hw = priv->hw;
  3167. int i;
  3168. u32 status = 0;
  3169. mwl8k_fw_lock(hw);
  3170. rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
  3171. if (rc)
  3172. goto done;
  3173. spin_lock(&priv->stream_lock);
  3174. /* the bitmap is the hw queue number. Map it to the ampdu queue. */
  3175. for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) {
  3176. if (bitmap & (1 << i)) {
  3177. stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) %
  3178. TOTAL_HW_TX_QUEUES;
  3179. streams = &priv->ampdu[stream_index];
  3180. if (streams->state == AMPDU_STREAM_ACTIVE) {
  3181. ieee80211_stop_tx_ba_session(streams->sta,
  3182. streams->tid);
  3183. spin_unlock(&priv->stream_lock);
  3184. mwl8k_destroy_ba(hw, stream_index);
  3185. spin_lock(&priv->stream_lock);
  3186. }
  3187. }
  3188. }
  3189. spin_unlock(&priv->stream_lock);
  3190. done:
  3191. atomic_dec(&priv->watchdog_event_pending);
  3192. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3193. iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
  3194. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3195. mwl8k_fw_unlock(hw);
  3196. return;
  3197. }
  3198. /*
  3199. * CMD_BSS_START.
  3200. */
  3201. struct mwl8k_cmd_bss_start {
  3202. struct mwl8k_cmd_pkt header;
  3203. __le32 enable;
  3204. } __packed;
  3205. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  3206. struct ieee80211_vif *vif, int enable)
  3207. {
  3208. struct mwl8k_cmd_bss_start *cmd;
  3209. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3210. struct mwl8k_priv *priv = hw->priv;
  3211. int rc;
  3212. if (enable && (priv->running_bsses & (1 << mwl8k_vif->macid)))
  3213. return 0;
  3214. if (!enable && !(priv->running_bsses & (1 << mwl8k_vif->macid)))
  3215. return 0;
  3216. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3217. if (cmd == NULL)
  3218. return -ENOMEM;
  3219. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  3220. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3221. cmd->enable = cpu_to_le32(enable);
  3222. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3223. kfree(cmd);
  3224. if (!rc) {
  3225. if (enable)
  3226. priv->running_bsses |= (1 << mwl8k_vif->macid);
  3227. else
  3228. priv->running_bsses &= ~(1 << mwl8k_vif->macid);
  3229. }
  3230. return rc;
  3231. }
  3232. static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, u32 bitmap)
  3233. {
  3234. struct mwl8k_priv *priv = hw->priv;
  3235. struct mwl8k_vif *mwl8k_vif, *tmp_vif;
  3236. struct ieee80211_vif *vif;
  3237. list_for_each_entry_safe(mwl8k_vif, tmp_vif, &priv->vif_list, list) {
  3238. vif = mwl8k_vif->vif;
  3239. if (!(bitmap & (1 << mwl8k_vif->macid)))
  3240. continue;
  3241. if (vif->type == NL80211_IFTYPE_AP)
  3242. mwl8k_cmd_bss_start(hw, vif, enable);
  3243. }
  3244. }
  3245. /*
  3246. * CMD_BASTREAM.
  3247. */
  3248. /*
  3249. * UPSTREAM is tx direction
  3250. */
  3251. #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
  3252. #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
  3253. enum ba_stream_action_type {
  3254. MWL8K_BA_CREATE,
  3255. MWL8K_BA_UPDATE,
  3256. MWL8K_BA_DESTROY,
  3257. MWL8K_BA_FLUSH,
  3258. MWL8K_BA_CHECK,
  3259. };
  3260. struct mwl8k_create_ba_stream {
  3261. __le32 flags;
  3262. __le32 idle_thrs;
  3263. __le32 bar_thrs;
  3264. __le32 window_size;
  3265. u8 peer_mac_addr[6];
  3266. u8 dialog_token;
  3267. u8 tid;
  3268. u8 queue_id;
  3269. u8 param_info;
  3270. __le32 ba_context;
  3271. u8 reset_seq_no_flag;
  3272. __le16 curr_seq_no;
  3273. u8 sta_src_mac_addr[6];
  3274. } __packed;
  3275. struct mwl8k_destroy_ba_stream {
  3276. __le32 flags;
  3277. __le32 ba_context;
  3278. } __packed;
  3279. struct mwl8k_cmd_bastream {
  3280. struct mwl8k_cmd_pkt header;
  3281. __le32 action;
  3282. union {
  3283. struct mwl8k_create_ba_stream create_params;
  3284. struct mwl8k_destroy_ba_stream destroy_params;
  3285. };
  3286. } __packed;
  3287. static int
  3288. mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3289. struct ieee80211_vif *vif)
  3290. {
  3291. struct mwl8k_cmd_bastream *cmd;
  3292. int rc;
  3293. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3294. if (cmd == NULL)
  3295. return -ENOMEM;
  3296. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3297. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3298. cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
  3299. cmd->create_params.queue_id = stream->idx;
  3300. memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
  3301. ETH_ALEN);
  3302. cmd->create_params.tid = stream->tid;
  3303. cmd->create_params.flags =
  3304. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
  3305. cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3306. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3307. kfree(cmd);
  3308. return rc;
  3309. }
  3310. static int
  3311. mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3312. u8 buf_size, struct ieee80211_vif *vif)
  3313. {
  3314. struct mwl8k_cmd_bastream *cmd;
  3315. int rc;
  3316. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3317. if (cmd == NULL)
  3318. return -ENOMEM;
  3319. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3320. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3321. cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
  3322. cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
  3323. cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
  3324. cmd->create_params.queue_id = stream->idx;
  3325. memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
  3326. cmd->create_params.tid = stream->tid;
  3327. cmd->create_params.curr_seq_no = cpu_to_le16(0);
  3328. cmd->create_params.reset_seq_no_flag = 1;
  3329. cmd->create_params.param_info =
  3330. (stream->sta->ht_cap.ampdu_factor &
  3331. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  3332. ((stream->sta->ht_cap.ampdu_density << 2) &
  3333. IEEE80211_HT_AMPDU_PARM_DENSITY);
  3334. cmd->create_params.flags =
  3335. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
  3336. BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3337. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3338. wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
  3339. stream->sta->addr, stream->tid);
  3340. kfree(cmd);
  3341. return rc;
  3342. }
  3343. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3344. u8 idx)
  3345. {
  3346. struct mwl8k_cmd_bastream *cmd;
  3347. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3348. if (cmd == NULL)
  3349. return;
  3350. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3351. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3352. cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
  3353. cmd->destroy_params.ba_context = cpu_to_le32(idx);
  3354. mwl8k_post_cmd(hw, &cmd->header);
  3355. wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx);
  3356. kfree(cmd);
  3357. }
  3358. /*
  3359. * CMD_SET_NEW_STN.
  3360. */
  3361. struct mwl8k_cmd_set_new_stn {
  3362. struct mwl8k_cmd_pkt header;
  3363. __le16 aid;
  3364. __u8 mac_addr[6];
  3365. __le16 stn_id;
  3366. __le16 action;
  3367. __le16 rsvd;
  3368. __le32 legacy_rates;
  3369. __u8 ht_rates[4];
  3370. __le16 cap_info;
  3371. __le16 ht_capabilities_info;
  3372. __u8 mac_ht_param_info;
  3373. __u8 rev;
  3374. __u8 control_channel;
  3375. __u8 add_channel;
  3376. __le16 op_mode;
  3377. __le16 stbc;
  3378. __u8 add_qos_info;
  3379. __u8 is_qos_sta;
  3380. __le32 fw_sta_ptr;
  3381. } __packed;
  3382. #define MWL8K_STA_ACTION_ADD 0
  3383. #define MWL8K_STA_ACTION_REMOVE 2
  3384. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  3385. struct ieee80211_vif *vif,
  3386. struct ieee80211_sta *sta)
  3387. {
  3388. struct mwl8k_cmd_set_new_stn *cmd;
  3389. u32 rates;
  3390. int rc;
  3391. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3392. if (cmd == NULL)
  3393. return -ENOMEM;
  3394. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3395. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3396. cmd->aid = cpu_to_le16(sta->aid);
  3397. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  3398. cmd->stn_id = cpu_to_le16(sta->aid);
  3399. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  3400. if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ)
  3401. rates = sta->supp_rates[NL80211_BAND_2GHZ];
  3402. else
  3403. rates = sta->supp_rates[NL80211_BAND_5GHZ] << 5;
  3404. cmd->legacy_rates = cpu_to_le32(rates);
  3405. if (sta->ht_cap.ht_supported) {
  3406. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  3407. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  3408. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  3409. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  3410. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  3411. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  3412. ((sta->ht_cap.ampdu_density & 7) << 2);
  3413. cmd->is_qos_sta = 1;
  3414. }
  3415. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3416. kfree(cmd);
  3417. return rc;
  3418. }
  3419. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  3420. struct ieee80211_vif *vif)
  3421. {
  3422. struct mwl8k_cmd_set_new_stn *cmd;
  3423. int rc;
  3424. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3425. if (cmd == NULL)
  3426. return -ENOMEM;
  3427. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3428. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3429. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  3430. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3431. kfree(cmd);
  3432. return rc;
  3433. }
  3434. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  3435. struct ieee80211_vif *vif, u8 *addr)
  3436. {
  3437. struct mwl8k_cmd_set_new_stn *cmd;
  3438. struct mwl8k_priv *priv = hw->priv;
  3439. int rc, i;
  3440. u8 idx;
  3441. spin_lock(&priv->stream_lock);
  3442. /* Destroy any active ampdu streams for this sta */
  3443. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  3444. struct mwl8k_ampdu_stream *s;
  3445. s = &priv->ampdu[i];
  3446. if (s->state != AMPDU_NO_STREAM) {
  3447. if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) {
  3448. if (s->state == AMPDU_STREAM_ACTIVE) {
  3449. idx = s->idx;
  3450. spin_unlock(&priv->stream_lock);
  3451. mwl8k_destroy_ba(hw, idx);
  3452. spin_lock(&priv->stream_lock);
  3453. } else if (s->state == AMPDU_STREAM_NEW) {
  3454. mwl8k_remove_stream(hw, s);
  3455. }
  3456. }
  3457. }
  3458. }
  3459. spin_unlock(&priv->stream_lock);
  3460. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3461. if (cmd == NULL)
  3462. return -ENOMEM;
  3463. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3464. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3465. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3466. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  3467. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3468. kfree(cmd);
  3469. return rc;
  3470. }
  3471. /*
  3472. * CMD_UPDATE_ENCRYPTION.
  3473. */
  3474. #define MAX_ENCR_KEY_LENGTH 16
  3475. #define MIC_KEY_LENGTH 8
  3476. struct mwl8k_cmd_update_encryption {
  3477. struct mwl8k_cmd_pkt header;
  3478. __le32 action;
  3479. __le32 reserved;
  3480. __u8 mac_addr[6];
  3481. __u8 encr_type;
  3482. } __packed;
  3483. struct mwl8k_cmd_set_key {
  3484. struct mwl8k_cmd_pkt header;
  3485. __le32 action;
  3486. __le32 reserved;
  3487. __le16 length;
  3488. __le16 key_type_id;
  3489. __le32 key_info;
  3490. __le32 key_id;
  3491. __le16 key_len;
  3492. __u8 key_material[MAX_ENCR_KEY_LENGTH];
  3493. __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
  3494. __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
  3495. __le16 tkip_rsc_low;
  3496. __le32 tkip_rsc_high;
  3497. __le16 tkip_tsc_low;
  3498. __le32 tkip_tsc_high;
  3499. __u8 mac_addr[6];
  3500. } __packed;
  3501. enum {
  3502. MWL8K_ENCR_ENABLE,
  3503. MWL8K_ENCR_SET_KEY,
  3504. MWL8K_ENCR_REMOVE_KEY,
  3505. MWL8K_ENCR_SET_GROUP_KEY,
  3506. };
  3507. #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
  3508. #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
  3509. #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
  3510. #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
  3511. #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
  3512. enum {
  3513. MWL8K_ALG_WEP,
  3514. MWL8K_ALG_TKIP,
  3515. MWL8K_ALG_CCMP,
  3516. };
  3517. #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
  3518. #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
  3519. #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
  3520. #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
  3521. #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
  3522. static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
  3523. struct ieee80211_vif *vif,
  3524. u8 *addr,
  3525. u8 encr_type)
  3526. {
  3527. struct mwl8k_cmd_update_encryption *cmd;
  3528. int rc;
  3529. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3530. if (cmd == NULL)
  3531. return -ENOMEM;
  3532. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3533. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3534. cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
  3535. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3536. cmd->encr_type = encr_type;
  3537. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3538. kfree(cmd);
  3539. return rc;
  3540. }
  3541. static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
  3542. u8 *addr,
  3543. struct ieee80211_key_conf *key)
  3544. {
  3545. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3546. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3547. cmd->length = cpu_to_le16(sizeof(*cmd) -
  3548. offsetof(struct mwl8k_cmd_set_key, length));
  3549. cmd->key_id = cpu_to_le32(key->keyidx);
  3550. cmd->key_len = cpu_to_le16(key->keylen);
  3551. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3552. switch (key->cipher) {
  3553. case WLAN_CIPHER_SUITE_WEP40:
  3554. case WLAN_CIPHER_SUITE_WEP104:
  3555. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
  3556. if (key->keyidx == 0)
  3557. cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
  3558. break;
  3559. case WLAN_CIPHER_SUITE_TKIP:
  3560. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
  3561. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3562. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3563. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3564. cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
  3565. | MWL8K_KEY_FLAG_TSC_VALID);
  3566. break;
  3567. case WLAN_CIPHER_SUITE_CCMP:
  3568. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
  3569. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3570. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3571. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3572. break;
  3573. default:
  3574. return -ENOTSUPP;
  3575. }
  3576. return 0;
  3577. }
  3578. static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
  3579. struct ieee80211_vif *vif,
  3580. u8 *addr,
  3581. struct ieee80211_key_conf *key)
  3582. {
  3583. struct mwl8k_cmd_set_key *cmd;
  3584. int rc;
  3585. int keymlen;
  3586. u32 action;
  3587. u8 idx;
  3588. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3589. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3590. if (cmd == NULL)
  3591. return -ENOMEM;
  3592. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3593. if (rc < 0)
  3594. goto done;
  3595. idx = key->keyidx;
  3596. if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3597. action = MWL8K_ENCR_SET_KEY;
  3598. else
  3599. action = MWL8K_ENCR_SET_GROUP_KEY;
  3600. switch (key->cipher) {
  3601. case WLAN_CIPHER_SUITE_WEP40:
  3602. case WLAN_CIPHER_SUITE_WEP104:
  3603. if (!mwl8k_vif->wep_key_conf[idx].enabled) {
  3604. memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
  3605. sizeof(*key) + key->keylen);
  3606. mwl8k_vif->wep_key_conf[idx].enabled = 1;
  3607. }
  3608. keymlen = key->keylen;
  3609. action = MWL8K_ENCR_SET_KEY;
  3610. break;
  3611. case WLAN_CIPHER_SUITE_TKIP:
  3612. keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
  3613. break;
  3614. case WLAN_CIPHER_SUITE_CCMP:
  3615. keymlen = key->keylen;
  3616. break;
  3617. default:
  3618. rc = -ENOTSUPP;
  3619. goto done;
  3620. }
  3621. memcpy(cmd->key_material, key->key, keymlen);
  3622. cmd->action = cpu_to_le32(action);
  3623. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3624. done:
  3625. kfree(cmd);
  3626. return rc;
  3627. }
  3628. static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
  3629. struct ieee80211_vif *vif,
  3630. u8 *addr,
  3631. struct ieee80211_key_conf *key)
  3632. {
  3633. struct mwl8k_cmd_set_key *cmd;
  3634. int rc;
  3635. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3636. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3637. if (cmd == NULL)
  3638. return -ENOMEM;
  3639. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3640. if (rc < 0)
  3641. goto done;
  3642. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  3643. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  3644. mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
  3645. cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
  3646. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3647. done:
  3648. kfree(cmd);
  3649. return rc;
  3650. }
  3651. static int mwl8k_set_key(struct ieee80211_hw *hw,
  3652. enum set_key_cmd cmd_param,
  3653. struct ieee80211_vif *vif,
  3654. struct ieee80211_sta *sta,
  3655. struct ieee80211_key_conf *key)
  3656. {
  3657. int rc = 0;
  3658. u8 encr_type;
  3659. u8 *addr;
  3660. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3661. struct mwl8k_priv *priv = hw->priv;
  3662. if (vif->type == NL80211_IFTYPE_STATION && !priv->ap_fw)
  3663. return -EOPNOTSUPP;
  3664. if (sta == NULL)
  3665. addr = vif->addr;
  3666. else
  3667. addr = sta->addr;
  3668. if (cmd_param == SET_KEY) {
  3669. rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
  3670. if (rc)
  3671. goto out;
  3672. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
  3673. || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
  3674. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
  3675. else
  3676. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
  3677. rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
  3678. encr_type);
  3679. if (rc)
  3680. goto out;
  3681. mwl8k_vif->is_hw_crypto_enabled = true;
  3682. } else {
  3683. rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
  3684. if (rc)
  3685. goto out;
  3686. }
  3687. out:
  3688. return rc;
  3689. }
  3690. /*
  3691. * CMD_UPDATE_STADB.
  3692. */
  3693. struct ewc_ht_info {
  3694. __le16 control1;
  3695. __le16 control2;
  3696. __le16 control3;
  3697. } __packed;
  3698. struct peer_capability_info {
  3699. /* Peer type - AP vs. STA. */
  3700. __u8 peer_type;
  3701. /* Basic 802.11 capabilities from assoc resp. */
  3702. __le16 basic_caps;
  3703. /* Set if peer supports 802.11n high throughput (HT). */
  3704. __u8 ht_support;
  3705. /* Valid if HT is supported. */
  3706. __le16 ht_caps;
  3707. __u8 extended_ht_caps;
  3708. struct ewc_ht_info ewc_info;
  3709. /* Legacy rate table. Intersection of our rates and peer rates. */
  3710. __u8 legacy_rates[12];
  3711. /* HT rate table. Intersection of our rates and peer rates. */
  3712. __u8 ht_rates[16];
  3713. __u8 pad[16];
  3714. /* If set, interoperability mode, no proprietary extensions. */
  3715. __u8 interop;
  3716. __u8 pad2;
  3717. __u8 station_id;
  3718. __le16 amsdu_enabled;
  3719. } __packed;
  3720. struct mwl8k_cmd_update_stadb {
  3721. struct mwl8k_cmd_pkt header;
  3722. /* See STADB_ACTION_TYPE */
  3723. __le32 action;
  3724. /* Peer MAC address */
  3725. __u8 peer_addr[ETH_ALEN];
  3726. __le32 reserved;
  3727. /* Peer info - valid during add/update. */
  3728. struct peer_capability_info peer_info;
  3729. } __packed;
  3730. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  3731. #define MWL8K_STA_DB_DEL_ENTRY 2
  3732. /* Peer Entry flags - used to define the type of the peer node */
  3733. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  3734. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  3735. struct ieee80211_vif *vif,
  3736. struct ieee80211_sta *sta)
  3737. {
  3738. struct mwl8k_cmd_update_stadb *cmd;
  3739. struct peer_capability_info *p;
  3740. u32 rates;
  3741. int rc;
  3742. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3743. if (cmd == NULL)
  3744. return -ENOMEM;
  3745. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3746. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3747. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  3748. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  3749. p = &cmd->peer_info;
  3750. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  3751. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  3752. p->ht_support = sta->ht_cap.ht_supported;
  3753. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  3754. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  3755. ((sta->ht_cap.ampdu_density & 7) << 2);
  3756. if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ)
  3757. rates = sta->supp_rates[NL80211_BAND_2GHZ];
  3758. else
  3759. rates = sta->supp_rates[NL80211_BAND_5GHZ] << 5;
  3760. legacy_rate_mask_to_array(p->legacy_rates, rates);
  3761. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  3762. p->interop = 1;
  3763. p->amsdu_enabled = 0;
  3764. rc = mwl8k_post_cmd(hw, &cmd->header);
  3765. if (!rc)
  3766. rc = p->station_id;
  3767. kfree(cmd);
  3768. return rc;
  3769. }
  3770. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  3771. struct ieee80211_vif *vif, u8 *addr)
  3772. {
  3773. struct mwl8k_cmd_update_stadb *cmd;
  3774. int rc;
  3775. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3776. if (cmd == NULL)
  3777. return -ENOMEM;
  3778. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3779. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3780. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  3781. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  3782. rc = mwl8k_post_cmd(hw, &cmd->header);
  3783. kfree(cmd);
  3784. return rc;
  3785. }
  3786. /*
  3787. * Interrupt handling.
  3788. */
  3789. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  3790. {
  3791. struct ieee80211_hw *hw = dev_id;
  3792. struct mwl8k_priv *priv = hw->priv;
  3793. u32 status;
  3794. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3795. if (!status)
  3796. return IRQ_NONE;
  3797. if (status & MWL8K_A2H_INT_TX_DONE) {
  3798. status &= ~MWL8K_A2H_INT_TX_DONE;
  3799. tasklet_schedule(&priv->poll_tx_task);
  3800. }
  3801. if (status & MWL8K_A2H_INT_RX_READY) {
  3802. status &= ~MWL8K_A2H_INT_RX_READY;
  3803. tasklet_schedule(&priv->poll_rx_task);
  3804. }
  3805. if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
  3806. iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG,
  3807. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3808. atomic_inc(&priv->watchdog_event_pending);
  3809. status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
  3810. ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
  3811. }
  3812. if (status)
  3813. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3814. if (status & MWL8K_A2H_INT_OPC_DONE) {
  3815. if (priv->hostcmd_wait != NULL)
  3816. complete(priv->hostcmd_wait);
  3817. }
  3818. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  3819. if (!mutex_is_locked(&priv->fw_mutex) &&
  3820. priv->radio_on && priv->pending_tx_pkts)
  3821. mwl8k_tx_start(priv);
  3822. }
  3823. return IRQ_HANDLED;
  3824. }
  3825. static void mwl8k_tx_poll(unsigned long data)
  3826. {
  3827. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3828. struct mwl8k_priv *priv = hw->priv;
  3829. int limit;
  3830. int i;
  3831. limit = 32;
  3832. spin_lock_bh(&priv->tx_lock);
  3833. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3834. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  3835. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  3836. complete(priv->tx_wait);
  3837. priv->tx_wait = NULL;
  3838. }
  3839. spin_unlock_bh(&priv->tx_lock);
  3840. if (limit) {
  3841. writel(~MWL8K_A2H_INT_TX_DONE,
  3842. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3843. } else {
  3844. tasklet_schedule(&priv->poll_tx_task);
  3845. }
  3846. }
  3847. static void mwl8k_rx_poll(unsigned long data)
  3848. {
  3849. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3850. struct mwl8k_priv *priv = hw->priv;
  3851. int limit;
  3852. limit = 32;
  3853. limit -= rxq_process(hw, 0, limit);
  3854. limit -= rxq_refill(hw, 0, limit);
  3855. if (limit) {
  3856. writel(~MWL8K_A2H_INT_RX_READY,
  3857. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3858. } else {
  3859. tasklet_schedule(&priv->poll_rx_task);
  3860. }
  3861. }
  3862. /*
  3863. * Core driver operations.
  3864. */
  3865. static void mwl8k_tx(struct ieee80211_hw *hw,
  3866. struct ieee80211_tx_control *control,
  3867. struct sk_buff *skb)
  3868. {
  3869. struct mwl8k_priv *priv = hw->priv;
  3870. int index = skb_get_queue_mapping(skb);
  3871. if (!priv->radio_on) {
  3872. wiphy_debug(hw->wiphy,
  3873. "dropped TX frame since radio disabled\n");
  3874. dev_kfree_skb(skb);
  3875. return;
  3876. }
  3877. mwl8k_txq_xmit(hw, index, control->sta, skb);
  3878. }
  3879. static int mwl8k_start(struct ieee80211_hw *hw)
  3880. {
  3881. struct mwl8k_priv *priv = hw->priv;
  3882. int rc;
  3883. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3884. IRQF_SHARED, MWL8K_NAME, hw);
  3885. if (rc) {
  3886. priv->irq = -1;
  3887. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3888. return -EIO;
  3889. }
  3890. priv->irq = priv->pdev->irq;
  3891. /* Enable TX reclaim and RX tasklets. */
  3892. tasklet_enable(&priv->poll_tx_task);
  3893. tasklet_enable(&priv->poll_rx_task);
  3894. /* Enable interrupts */
  3895. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3896. iowrite32(MWL8K_A2H_EVENTS,
  3897. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3898. rc = mwl8k_fw_lock(hw);
  3899. if (!rc) {
  3900. rc = mwl8k_cmd_radio_enable(hw);
  3901. if (!priv->ap_fw) {
  3902. if (!rc)
  3903. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  3904. if (!rc)
  3905. rc = mwl8k_cmd_set_pre_scan(hw);
  3906. if (!rc)
  3907. rc = mwl8k_cmd_set_post_scan(hw,
  3908. "\x00\x00\x00\x00\x00\x00");
  3909. }
  3910. if (!rc)
  3911. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  3912. if (!rc)
  3913. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  3914. mwl8k_fw_unlock(hw);
  3915. }
  3916. if (rc) {
  3917. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3918. free_irq(priv->pdev->irq, hw);
  3919. priv->irq = -1;
  3920. tasklet_disable(&priv->poll_tx_task);
  3921. tasklet_disable(&priv->poll_rx_task);
  3922. } else {
  3923. ieee80211_wake_queues(hw);
  3924. }
  3925. return rc;
  3926. }
  3927. static void mwl8k_stop(struct ieee80211_hw *hw)
  3928. {
  3929. struct mwl8k_priv *priv = hw->priv;
  3930. int i;
  3931. if (!priv->hw_restart_in_progress)
  3932. mwl8k_cmd_radio_disable(hw);
  3933. ieee80211_stop_queues(hw);
  3934. /* Disable interrupts */
  3935. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3936. if (priv->irq != -1) {
  3937. free_irq(priv->pdev->irq, hw);
  3938. priv->irq = -1;
  3939. }
  3940. /* Stop finalize join worker */
  3941. cancel_work_sync(&priv->finalize_join_worker);
  3942. cancel_work_sync(&priv->watchdog_ba_handle);
  3943. if (priv->beacon_skb != NULL)
  3944. dev_kfree_skb(priv->beacon_skb);
  3945. /* Stop TX reclaim and RX tasklets. */
  3946. tasklet_disable(&priv->poll_tx_task);
  3947. tasklet_disable(&priv->poll_rx_task);
  3948. /* Return all skbs to mac80211 */
  3949. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3950. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3951. }
  3952. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  3953. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  3954. struct ieee80211_vif *vif)
  3955. {
  3956. struct mwl8k_priv *priv = hw->priv;
  3957. struct mwl8k_vif *mwl8k_vif;
  3958. u32 macids_supported;
  3959. int macid, rc;
  3960. struct mwl8k_device_info *di;
  3961. /*
  3962. * Reject interface creation if sniffer mode is active, as
  3963. * STA operation is mutually exclusive with hardware sniffer
  3964. * mode. (Sniffer mode is only used on STA firmware.)
  3965. */
  3966. if (priv->sniffer_enabled) {
  3967. wiphy_info(hw->wiphy,
  3968. "unable to create STA interface because sniffer mode is enabled\n");
  3969. return -EINVAL;
  3970. }
  3971. di = priv->device_info;
  3972. switch (vif->type) {
  3973. case NL80211_IFTYPE_AP:
  3974. if (!priv->ap_fw && di->fw_image_ap) {
  3975. /* we must load the ap fw to meet this request */
  3976. if (!list_empty(&priv->vif_list))
  3977. return -EBUSY;
  3978. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3979. if (rc)
  3980. return rc;
  3981. }
  3982. macids_supported = priv->ap_macids_supported;
  3983. break;
  3984. case NL80211_IFTYPE_STATION:
  3985. if (priv->ap_fw && di->fw_image_sta) {
  3986. if (!list_empty(&priv->vif_list)) {
  3987. wiphy_warn(hw->wiphy, "AP interface is running.\n"
  3988. "Adding STA interface for WDS");
  3989. } else {
  3990. /* we must load the sta fw to
  3991. * meet this request.
  3992. */
  3993. rc = mwl8k_reload_firmware(hw,
  3994. di->fw_image_sta);
  3995. if (rc)
  3996. return rc;
  3997. }
  3998. }
  3999. macids_supported = priv->sta_macids_supported;
  4000. break;
  4001. default:
  4002. return -EINVAL;
  4003. }
  4004. macid = ffs(macids_supported & ~priv->macids_used);
  4005. if (!macid--)
  4006. return -EBUSY;
  4007. /* Setup driver private area. */
  4008. mwl8k_vif = MWL8K_VIF(vif);
  4009. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  4010. mwl8k_vif->vif = vif;
  4011. mwl8k_vif->macid = macid;
  4012. mwl8k_vif->seqno = 0;
  4013. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  4014. mwl8k_vif->is_hw_crypto_enabled = false;
  4015. /* Set the mac address. */
  4016. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  4017. if (vif->type == NL80211_IFTYPE_AP)
  4018. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  4019. priv->macids_used |= 1 << mwl8k_vif->macid;
  4020. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  4021. return 0;
  4022. }
  4023. static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
  4024. {
  4025. /* Has ieee80211_restart_hw re-added the removed interfaces? */
  4026. if (!priv->macids_used)
  4027. return;
  4028. priv->macids_used &= ~(1 << vif->macid);
  4029. list_del(&vif->list);
  4030. }
  4031. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  4032. struct ieee80211_vif *vif)
  4033. {
  4034. struct mwl8k_priv *priv = hw->priv;
  4035. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4036. if (vif->type == NL80211_IFTYPE_AP)
  4037. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  4038. mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
  4039. mwl8k_remove_vif(priv, mwl8k_vif);
  4040. }
  4041. static void mwl8k_hw_restart_work(struct work_struct *work)
  4042. {
  4043. struct mwl8k_priv *priv =
  4044. container_of(work, struct mwl8k_priv, fw_reload);
  4045. struct ieee80211_hw *hw = priv->hw;
  4046. struct mwl8k_device_info *di;
  4047. int rc;
  4048. /* If some command is waiting for a response, clear it */
  4049. if (priv->hostcmd_wait != NULL) {
  4050. complete(priv->hostcmd_wait);
  4051. priv->hostcmd_wait = NULL;
  4052. }
  4053. priv->hw_restart_owner = current;
  4054. di = priv->device_info;
  4055. mwl8k_fw_lock(hw);
  4056. if (priv->ap_fw)
  4057. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  4058. else
  4059. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  4060. if (rc)
  4061. goto fail;
  4062. priv->hw_restart_owner = NULL;
  4063. priv->hw_restart_in_progress = false;
  4064. /*
  4065. * This unlock will wake up the queues and
  4066. * also opens the command path for other
  4067. * commands
  4068. */
  4069. mwl8k_fw_unlock(hw);
  4070. ieee80211_restart_hw(hw);
  4071. wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
  4072. return;
  4073. fail:
  4074. mwl8k_fw_unlock(hw);
  4075. wiphy_err(hw->wiphy, "Firmware restart failed\n");
  4076. }
  4077. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  4078. {
  4079. struct ieee80211_conf *conf = &hw->conf;
  4080. struct mwl8k_priv *priv = hw->priv;
  4081. int rc;
  4082. rc = mwl8k_fw_lock(hw);
  4083. if (rc)
  4084. return rc;
  4085. if (conf->flags & IEEE80211_CONF_IDLE)
  4086. rc = mwl8k_cmd_radio_disable(hw);
  4087. else
  4088. rc = mwl8k_cmd_radio_enable(hw);
  4089. if (rc)
  4090. goto out;
  4091. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  4092. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  4093. if (rc)
  4094. goto out;
  4095. }
  4096. if (conf->power_level > 18)
  4097. conf->power_level = 18;
  4098. if (priv->ap_fw) {
  4099. if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
  4100. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  4101. if (rc)
  4102. goto out;
  4103. }
  4104. } else {
  4105. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  4106. if (rc)
  4107. goto out;
  4108. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  4109. }
  4110. out:
  4111. mwl8k_fw_unlock(hw);
  4112. return rc;
  4113. }
  4114. static void
  4115. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4116. struct ieee80211_bss_conf *info, u32 changed)
  4117. {
  4118. struct mwl8k_priv *priv = hw->priv;
  4119. u32 ap_legacy_rates = 0;
  4120. u8 ap_mcs_rates[16];
  4121. int rc;
  4122. if (mwl8k_fw_lock(hw))
  4123. return;
  4124. /*
  4125. * No need to capture a beacon if we're no longer associated.
  4126. */
  4127. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  4128. priv->capture_beacon = false;
  4129. /*
  4130. * Get the AP's legacy and MCS rates.
  4131. */
  4132. if (vif->bss_conf.assoc) {
  4133. struct ieee80211_sta *ap;
  4134. rcu_read_lock();
  4135. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  4136. if (ap == NULL) {
  4137. rcu_read_unlock();
  4138. goto out;
  4139. }
  4140. if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ) {
  4141. ap_legacy_rates = ap->supp_rates[NL80211_BAND_2GHZ];
  4142. } else {
  4143. ap_legacy_rates =
  4144. ap->supp_rates[NL80211_BAND_5GHZ] << 5;
  4145. }
  4146. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  4147. rcu_read_unlock();
  4148. if (changed & BSS_CHANGED_ASSOC) {
  4149. if (!priv->ap_fw) {
  4150. rc = mwl8k_cmd_set_rate(hw, vif,
  4151. ap_legacy_rates,
  4152. ap_mcs_rates);
  4153. if (rc)
  4154. goto out;
  4155. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  4156. if (rc)
  4157. goto out;
  4158. } else {
  4159. int idx;
  4160. int rate;
  4161. /* Use AP firmware specific rate command.
  4162. */
  4163. idx = ffs(vif->bss_conf.basic_rates);
  4164. if (idx)
  4165. idx--;
  4166. if (hw->conf.chandef.chan->band ==
  4167. NL80211_BAND_2GHZ)
  4168. rate = mwl8k_rates_24[idx].hw_value;
  4169. else
  4170. rate = mwl8k_rates_50[idx].hw_value;
  4171. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  4172. }
  4173. }
  4174. }
  4175. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4176. rc = mwl8k_set_radio_preamble(hw,
  4177. vif->bss_conf.use_short_preamble);
  4178. if (rc)
  4179. goto out;
  4180. }
  4181. if ((changed & BSS_CHANGED_ERP_SLOT) && !priv->ap_fw) {
  4182. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  4183. if (rc)
  4184. goto out;
  4185. }
  4186. if (vif->bss_conf.assoc && !priv->ap_fw &&
  4187. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  4188. BSS_CHANGED_HT))) {
  4189. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  4190. if (rc)
  4191. goto out;
  4192. }
  4193. if (vif->bss_conf.assoc &&
  4194. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  4195. /*
  4196. * Finalize the join. Tell rx handler to process
  4197. * next beacon from our BSSID.
  4198. */
  4199. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  4200. priv->capture_beacon = true;
  4201. }
  4202. out:
  4203. mwl8k_fw_unlock(hw);
  4204. }
  4205. static void
  4206. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4207. struct ieee80211_bss_conf *info, u32 changed)
  4208. {
  4209. int rc;
  4210. if (mwl8k_fw_lock(hw))
  4211. return;
  4212. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4213. rc = mwl8k_set_radio_preamble(hw,
  4214. vif->bss_conf.use_short_preamble);
  4215. if (rc)
  4216. goto out;
  4217. }
  4218. if (changed & BSS_CHANGED_BASIC_RATES) {
  4219. int idx;
  4220. int rate;
  4221. /*
  4222. * Use lowest supported basic rate for multicasts
  4223. * and management frames (such as probe responses --
  4224. * beacons will always go out at 1 Mb/s).
  4225. */
  4226. idx = ffs(vif->bss_conf.basic_rates);
  4227. if (idx)
  4228. idx--;
  4229. if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ)
  4230. rate = mwl8k_rates_24[idx].hw_value;
  4231. else
  4232. rate = mwl8k_rates_50[idx].hw_value;
  4233. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  4234. }
  4235. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  4236. struct sk_buff *skb;
  4237. skb = ieee80211_beacon_get(hw, vif);
  4238. if (skb != NULL) {
  4239. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  4240. kfree_skb(skb);
  4241. }
  4242. }
  4243. if (changed & BSS_CHANGED_BEACON_ENABLED)
  4244. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  4245. out:
  4246. mwl8k_fw_unlock(hw);
  4247. }
  4248. static void
  4249. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4250. struct ieee80211_bss_conf *info, u32 changed)
  4251. {
  4252. if (vif->type == NL80211_IFTYPE_STATION)
  4253. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  4254. if (vif->type == NL80211_IFTYPE_AP)
  4255. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  4256. }
  4257. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  4258. struct netdev_hw_addr_list *mc_list)
  4259. {
  4260. struct mwl8k_cmd_pkt *cmd;
  4261. /*
  4262. * Synthesize and return a command packet that programs the
  4263. * hardware multicast address filter. At this point we don't
  4264. * know whether FIF_ALLMULTI is being requested, but if it is,
  4265. * we'll end up throwing this packet away and creating a new
  4266. * one in mwl8k_configure_filter().
  4267. */
  4268. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  4269. return (unsigned long)cmd;
  4270. }
  4271. static int
  4272. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  4273. unsigned int changed_flags,
  4274. unsigned int *total_flags)
  4275. {
  4276. struct mwl8k_priv *priv = hw->priv;
  4277. /*
  4278. * Hardware sniffer mode is mutually exclusive with STA
  4279. * operation, so refuse to enable sniffer mode if a STA
  4280. * interface is active.
  4281. */
  4282. if (!list_empty(&priv->vif_list)) {
  4283. if (net_ratelimit())
  4284. wiphy_info(hw->wiphy,
  4285. "not enabling sniffer mode because STA interface is active\n");
  4286. return 0;
  4287. }
  4288. if (!priv->sniffer_enabled) {
  4289. if (mwl8k_cmd_enable_sniffer(hw, 1))
  4290. return 0;
  4291. priv->sniffer_enabled = true;
  4292. }
  4293. *total_flags &= FIF_ALLMULTI |
  4294. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  4295. FIF_OTHER_BSS;
  4296. return 1;
  4297. }
  4298. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  4299. {
  4300. if (!list_empty(&priv->vif_list))
  4301. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  4302. return NULL;
  4303. }
  4304. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  4305. unsigned int changed_flags,
  4306. unsigned int *total_flags,
  4307. u64 multicast)
  4308. {
  4309. struct mwl8k_priv *priv = hw->priv;
  4310. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  4311. /*
  4312. * AP firmware doesn't allow fine-grained control over
  4313. * the receive filter.
  4314. */
  4315. if (priv->ap_fw) {
  4316. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4317. kfree(cmd);
  4318. return;
  4319. }
  4320. /*
  4321. * Enable hardware sniffer mode if FIF_CONTROL or
  4322. * FIF_OTHER_BSS is requested.
  4323. */
  4324. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  4325. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  4326. kfree(cmd);
  4327. return;
  4328. }
  4329. /* Clear unsupported feature flags */
  4330. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4331. if (mwl8k_fw_lock(hw)) {
  4332. kfree(cmd);
  4333. return;
  4334. }
  4335. if (priv->sniffer_enabled) {
  4336. mwl8k_cmd_enable_sniffer(hw, 0);
  4337. priv->sniffer_enabled = false;
  4338. }
  4339. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4340. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  4341. /*
  4342. * Disable the BSS filter.
  4343. */
  4344. mwl8k_cmd_set_pre_scan(hw);
  4345. } else {
  4346. struct mwl8k_vif *mwl8k_vif;
  4347. const u8 *bssid;
  4348. /*
  4349. * Enable the BSS filter.
  4350. *
  4351. * If there is an active STA interface, use that
  4352. * interface's BSSID, otherwise use a dummy one
  4353. * (where the OUI part needs to be nonzero for
  4354. * the BSSID to be accepted by POST_SCAN).
  4355. */
  4356. mwl8k_vif = mwl8k_first_vif(priv);
  4357. if (mwl8k_vif != NULL)
  4358. bssid = mwl8k_vif->vif->bss_conf.bssid;
  4359. else
  4360. bssid = "\x01\x00\x00\x00\x00\x00";
  4361. mwl8k_cmd_set_post_scan(hw, bssid);
  4362. }
  4363. }
  4364. /*
  4365. * If FIF_ALLMULTI is being requested, throw away the command
  4366. * packet that ->prepare_multicast() built and replace it with
  4367. * a command packet that enables reception of all multicast
  4368. * packets.
  4369. */
  4370. if (*total_flags & FIF_ALLMULTI) {
  4371. kfree(cmd);
  4372. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  4373. }
  4374. if (cmd != NULL) {
  4375. mwl8k_post_cmd(hw, cmd);
  4376. kfree(cmd);
  4377. }
  4378. mwl8k_fw_unlock(hw);
  4379. }
  4380. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  4381. {
  4382. return mwl8k_cmd_set_rts_threshold(hw, value);
  4383. }
  4384. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  4385. struct ieee80211_vif *vif,
  4386. struct ieee80211_sta *sta)
  4387. {
  4388. struct mwl8k_priv *priv = hw->priv;
  4389. if (priv->ap_fw)
  4390. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  4391. else
  4392. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  4393. }
  4394. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  4395. struct ieee80211_vif *vif,
  4396. struct ieee80211_sta *sta)
  4397. {
  4398. struct mwl8k_priv *priv = hw->priv;
  4399. int ret;
  4400. int i;
  4401. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4402. struct ieee80211_key_conf *key;
  4403. if (!priv->ap_fw) {
  4404. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  4405. if (ret >= 0) {
  4406. MWL8K_STA(sta)->peer_id = ret;
  4407. if (sta->ht_cap.ht_supported)
  4408. MWL8K_STA(sta)->is_ampdu_allowed = true;
  4409. ret = 0;
  4410. }
  4411. } else {
  4412. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  4413. }
  4414. for (i = 0; i < NUM_WEP_KEYS; i++) {
  4415. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  4416. if (mwl8k_vif->wep_key_conf[i].enabled)
  4417. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  4418. }
  4419. return ret;
  4420. }
  4421. static int mwl8k_conf_tx(struct ieee80211_hw *hw,
  4422. struct ieee80211_vif *vif, u16 queue,
  4423. const struct ieee80211_tx_queue_params *params)
  4424. {
  4425. struct mwl8k_priv *priv = hw->priv;
  4426. int rc;
  4427. rc = mwl8k_fw_lock(hw);
  4428. if (!rc) {
  4429. BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
  4430. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  4431. if (!priv->wmm_enabled)
  4432. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  4433. if (!rc) {
  4434. int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
  4435. rc = mwl8k_cmd_set_edca_params(hw, q,
  4436. params->cw_min,
  4437. params->cw_max,
  4438. params->aifs,
  4439. params->txop);
  4440. }
  4441. mwl8k_fw_unlock(hw);
  4442. }
  4443. return rc;
  4444. }
  4445. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  4446. struct ieee80211_low_level_stats *stats)
  4447. {
  4448. return mwl8k_cmd_get_stat(hw, stats);
  4449. }
  4450. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  4451. struct survey_info *survey)
  4452. {
  4453. struct mwl8k_priv *priv = hw->priv;
  4454. struct ieee80211_conf *conf = &hw->conf;
  4455. struct ieee80211_supported_band *sband;
  4456. if (priv->ap_fw) {
  4457. sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
  4458. if (sband && idx >= sband->n_channels) {
  4459. idx -= sband->n_channels;
  4460. sband = NULL;
  4461. }
  4462. if (!sband)
  4463. sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
  4464. if (!sband || idx >= sband->n_channels)
  4465. return -ENOENT;
  4466. memcpy(survey, &priv->survey[idx], sizeof(*survey));
  4467. survey->channel = &sband->channels[idx];
  4468. return 0;
  4469. }
  4470. if (idx != 0)
  4471. return -ENOENT;
  4472. survey->channel = conf->chandef.chan;
  4473. survey->filled = SURVEY_INFO_NOISE_DBM;
  4474. survey->noise = priv->noise;
  4475. return 0;
  4476. }
  4477. #define MAX_AMPDU_ATTEMPTS 5
  4478. static int
  4479. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4480. struct ieee80211_ampdu_params *params)
  4481. {
  4482. struct ieee80211_sta *sta = params->sta;
  4483. enum ieee80211_ampdu_mlme_action action = params->action;
  4484. u16 tid = params->tid;
  4485. u16 *ssn = &params->ssn;
  4486. u8 buf_size = params->buf_size;
  4487. int i, rc = 0;
  4488. struct mwl8k_priv *priv = hw->priv;
  4489. struct mwl8k_ampdu_stream *stream;
  4490. u8 *addr = sta->addr, idx;
  4491. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  4492. if (!ieee80211_hw_check(hw, AMPDU_AGGREGATION))
  4493. return -ENOTSUPP;
  4494. spin_lock(&priv->stream_lock);
  4495. stream = mwl8k_lookup_stream(hw, addr, tid);
  4496. switch (action) {
  4497. case IEEE80211_AMPDU_RX_START:
  4498. case IEEE80211_AMPDU_RX_STOP:
  4499. break;
  4500. case IEEE80211_AMPDU_TX_START:
  4501. /* By the time we get here the hw queues may contain outgoing
  4502. * packets for this RA/TID that are not part of this BA
  4503. * session. The hw will assign sequence numbers to these
  4504. * packets as they go out. So if we query the hw for its next
  4505. * sequence number and use that for the SSN here, it may end up
  4506. * being wrong, which will lead to sequence number mismatch at
  4507. * the recipient. To avoid this, we reset the sequence number
  4508. * to O for the first MPDU in this BA stream.
  4509. */
  4510. *ssn = 0;
  4511. if (stream == NULL) {
  4512. /* This means that somebody outside this driver called
  4513. * ieee80211_start_tx_ba_session. This is unexpected
  4514. * because we do our own rate control. Just warn and
  4515. * move on.
  4516. */
  4517. wiphy_warn(hw->wiphy, "Unexpected call to %s. "
  4518. "Proceeding anyway.\n", __func__);
  4519. stream = mwl8k_add_stream(hw, sta, tid);
  4520. }
  4521. if (stream == NULL) {
  4522. wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
  4523. rc = -EBUSY;
  4524. break;
  4525. }
  4526. stream->state = AMPDU_STREAM_IN_PROGRESS;
  4527. /* Release the lock before we do the time consuming stuff */
  4528. spin_unlock(&priv->stream_lock);
  4529. for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
  4530. /* Check if link is still valid */
  4531. if (!sta_info->is_ampdu_allowed) {
  4532. spin_lock(&priv->stream_lock);
  4533. mwl8k_remove_stream(hw, stream);
  4534. spin_unlock(&priv->stream_lock);
  4535. return -EBUSY;
  4536. }
  4537. rc = mwl8k_check_ba(hw, stream, vif);
  4538. /* If HW restart is in progress mwl8k_post_cmd will
  4539. * return -EBUSY. Avoid retrying mwl8k_check_ba in
  4540. * such cases
  4541. */
  4542. if (!rc || rc == -EBUSY)
  4543. break;
  4544. /*
  4545. * HW queues take time to be flushed, give them
  4546. * sufficient time
  4547. */
  4548. msleep(1000);
  4549. }
  4550. spin_lock(&priv->stream_lock);
  4551. if (rc) {
  4552. wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
  4553. " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
  4554. mwl8k_remove_stream(hw, stream);
  4555. rc = -EBUSY;
  4556. break;
  4557. }
  4558. ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
  4559. break;
  4560. case IEEE80211_AMPDU_TX_STOP_CONT:
  4561. case IEEE80211_AMPDU_TX_STOP_FLUSH:
  4562. case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
  4563. if (stream) {
  4564. if (stream->state == AMPDU_STREAM_ACTIVE) {
  4565. idx = stream->idx;
  4566. spin_unlock(&priv->stream_lock);
  4567. mwl8k_destroy_ba(hw, idx);
  4568. spin_lock(&priv->stream_lock);
  4569. }
  4570. mwl8k_remove_stream(hw, stream);
  4571. }
  4572. ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
  4573. break;
  4574. case IEEE80211_AMPDU_TX_OPERATIONAL:
  4575. BUG_ON(stream == NULL);
  4576. BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
  4577. spin_unlock(&priv->stream_lock);
  4578. rc = mwl8k_create_ba(hw, stream, buf_size, vif);
  4579. spin_lock(&priv->stream_lock);
  4580. if (!rc)
  4581. stream->state = AMPDU_STREAM_ACTIVE;
  4582. else {
  4583. idx = stream->idx;
  4584. spin_unlock(&priv->stream_lock);
  4585. mwl8k_destroy_ba(hw, idx);
  4586. spin_lock(&priv->stream_lock);
  4587. wiphy_debug(hw->wiphy,
  4588. "Failed adding stream for sta %pM tid %d\n",
  4589. addr, tid);
  4590. mwl8k_remove_stream(hw, stream);
  4591. }
  4592. break;
  4593. default:
  4594. rc = -ENOTSUPP;
  4595. }
  4596. spin_unlock(&priv->stream_lock);
  4597. return rc;
  4598. }
  4599. static void mwl8k_sw_scan_start(struct ieee80211_hw *hw,
  4600. struct ieee80211_vif *vif,
  4601. const u8 *mac_addr)
  4602. {
  4603. struct mwl8k_priv *priv = hw->priv;
  4604. u8 tmp;
  4605. if (!priv->ap_fw)
  4606. return;
  4607. /* clear all stats */
  4608. priv->channel_time = 0;
  4609. ioread32(priv->regs + BBU_RXRDY_CNT_REG);
  4610. ioread32(priv->regs + NOK_CCA_CNT_REG);
  4611. mwl8k_cmd_bbp_reg_access(priv->hw, 0, BBU_AVG_NOISE_VAL, &tmp);
  4612. priv->sw_scan_start = true;
  4613. }
  4614. static void mwl8k_sw_scan_complete(struct ieee80211_hw *hw,
  4615. struct ieee80211_vif *vif)
  4616. {
  4617. struct mwl8k_priv *priv = hw->priv;
  4618. u8 tmp;
  4619. if (!priv->ap_fw)
  4620. return;
  4621. priv->sw_scan_start = false;
  4622. /* clear all stats */
  4623. priv->channel_time = 0;
  4624. ioread32(priv->regs + BBU_RXRDY_CNT_REG);
  4625. ioread32(priv->regs + NOK_CCA_CNT_REG);
  4626. mwl8k_cmd_bbp_reg_access(priv->hw, 0, BBU_AVG_NOISE_VAL, &tmp);
  4627. }
  4628. static const struct ieee80211_ops mwl8k_ops = {
  4629. .tx = mwl8k_tx,
  4630. .start = mwl8k_start,
  4631. .stop = mwl8k_stop,
  4632. .add_interface = mwl8k_add_interface,
  4633. .remove_interface = mwl8k_remove_interface,
  4634. .config = mwl8k_config,
  4635. .bss_info_changed = mwl8k_bss_info_changed,
  4636. .prepare_multicast = mwl8k_prepare_multicast,
  4637. .configure_filter = mwl8k_configure_filter,
  4638. .set_key = mwl8k_set_key,
  4639. .set_rts_threshold = mwl8k_set_rts_threshold,
  4640. .sta_add = mwl8k_sta_add,
  4641. .sta_remove = mwl8k_sta_remove,
  4642. .conf_tx = mwl8k_conf_tx,
  4643. .get_stats = mwl8k_get_stats,
  4644. .get_survey = mwl8k_get_survey,
  4645. .ampdu_action = mwl8k_ampdu_action,
  4646. .sw_scan_start = mwl8k_sw_scan_start,
  4647. .sw_scan_complete = mwl8k_sw_scan_complete,
  4648. };
  4649. static void mwl8k_finalize_join_worker(struct work_struct *work)
  4650. {
  4651. struct mwl8k_priv *priv =
  4652. container_of(work, struct mwl8k_priv, finalize_join_worker);
  4653. struct sk_buff *skb = priv->beacon_skb;
  4654. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  4655. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  4656. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  4657. mgmt->u.beacon.variable, len);
  4658. int dtim_period = 1;
  4659. if (tim && tim[1] >= 2)
  4660. dtim_period = tim[3];
  4661. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  4662. dev_kfree_skb(skb);
  4663. priv->beacon_skb = NULL;
  4664. }
  4665. enum {
  4666. MWL8363 = 0,
  4667. MWL8687,
  4668. MWL8366,
  4669. MWL8764,
  4670. };
  4671. #define MWL8K_8366_AP_FW_API 3
  4672. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  4673. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  4674. #define MWL8K_8764_AP_FW_API 1
  4675. #define _MWL8K_8764_AP_FW(api) "mwl8k/fmimage_8764_ap-" #api ".fw"
  4676. #define MWL8K_8764_AP_FW(api) _MWL8K_8764_AP_FW(api)
  4677. static struct mwl8k_device_info mwl8k_info_tbl[] = {
  4678. [MWL8363] = {
  4679. .part_name = "88w8363",
  4680. .helper_image = "mwl8k/helper_8363.fw",
  4681. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  4682. },
  4683. [MWL8687] = {
  4684. .part_name = "88w8687",
  4685. .helper_image = "mwl8k/helper_8687.fw",
  4686. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  4687. },
  4688. [MWL8366] = {
  4689. .part_name = "88w8366",
  4690. .helper_image = "mwl8k/helper_8366.fw",
  4691. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  4692. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  4693. .fw_api_ap = MWL8K_8366_AP_FW_API,
  4694. .ap_rxd_ops = &rxd_ap_ops,
  4695. },
  4696. [MWL8764] = {
  4697. .part_name = "88w8764",
  4698. .fw_image_ap = MWL8K_8764_AP_FW(MWL8K_8764_AP_FW_API),
  4699. .fw_api_ap = MWL8K_8764_AP_FW_API,
  4700. .ap_rxd_ops = &rxd_ap_ops,
  4701. },
  4702. };
  4703. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  4704. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  4705. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  4706. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  4707. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  4708. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  4709. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  4710. static const struct pci_device_id mwl8k_pci_id_table[] = {
  4711. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  4712. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  4713. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  4714. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  4715. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  4716. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  4717. { PCI_VDEVICE(MARVELL, 0x2a41), .driver_data = MWL8366, },
  4718. { PCI_VDEVICE(MARVELL, 0x2a42), .driver_data = MWL8366, },
  4719. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  4720. { PCI_VDEVICE(MARVELL, 0x2b36), .driver_data = MWL8764, },
  4721. { },
  4722. };
  4723. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  4724. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  4725. {
  4726. int rc;
  4727. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  4728. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  4729. priv->fw_pref, priv->fw_alt);
  4730. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  4731. if (rc) {
  4732. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4733. pci_name(priv->pdev), priv->fw_alt);
  4734. return rc;
  4735. }
  4736. return 0;
  4737. }
  4738. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  4739. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  4740. {
  4741. struct mwl8k_priv *priv = context;
  4742. struct mwl8k_device_info *di = priv->device_info;
  4743. int rc;
  4744. switch (priv->fw_state) {
  4745. case FW_STATE_INIT:
  4746. if (!fw) {
  4747. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  4748. pci_name(priv->pdev), di->helper_image);
  4749. goto fail;
  4750. }
  4751. priv->fw_helper = fw;
  4752. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  4753. true);
  4754. if (rc && priv->fw_alt) {
  4755. rc = mwl8k_request_alt_fw(priv);
  4756. if (rc)
  4757. goto fail;
  4758. priv->fw_state = FW_STATE_LOADING_ALT;
  4759. } else if (rc)
  4760. goto fail;
  4761. else
  4762. priv->fw_state = FW_STATE_LOADING_PREF;
  4763. break;
  4764. case FW_STATE_LOADING_PREF:
  4765. if (!fw) {
  4766. if (priv->fw_alt) {
  4767. rc = mwl8k_request_alt_fw(priv);
  4768. if (rc)
  4769. goto fail;
  4770. priv->fw_state = FW_STATE_LOADING_ALT;
  4771. } else
  4772. goto fail;
  4773. } else {
  4774. priv->fw_ucode = fw;
  4775. rc = mwl8k_firmware_load_success(priv);
  4776. if (rc)
  4777. goto fail;
  4778. else
  4779. complete(&priv->firmware_loading_complete);
  4780. }
  4781. break;
  4782. case FW_STATE_LOADING_ALT:
  4783. if (!fw) {
  4784. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4785. pci_name(priv->pdev), di->helper_image);
  4786. goto fail;
  4787. }
  4788. priv->fw_ucode = fw;
  4789. rc = mwl8k_firmware_load_success(priv);
  4790. if (rc)
  4791. goto fail;
  4792. else
  4793. complete(&priv->firmware_loading_complete);
  4794. break;
  4795. default:
  4796. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  4797. MWL8K_NAME, priv->fw_state);
  4798. BUG_ON(1);
  4799. }
  4800. return;
  4801. fail:
  4802. priv->fw_state = FW_STATE_ERROR;
  4803. complete(&priv->firmware_loading_complete);
  4804. device_release_driver(&priv->pdev->dev);
  4805. mwl8k_release_firmware(priv);
  4806. }
  4807. #define MAX_RESTART_ATTEMPTS 1
  4808. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  4809. bool nowait)
  4810. {
  4811. struct mwl8k_priv *priv = hw->priv;
  4812. int rc;
  4813. int count = MAX_RESTART_ATTEMPTS;
  4814. retry:
  4815. /* Reset firmware and hardware */
  4816. mwl8k_hw_reset(priv);
  4817. /* Ask userland hotplug daemon for the device firmware */
  4818. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  4819. if (rc) {
  4820. wiphy_err(hw->wiphy, "Firmware files not found\n");
  4821. return rc;
  4822. }
  4823. if (nowait)
  4824. return rc;
  4825. /* Load firmware into hardware */
  4826. rc = mwl8k_load_firmware(hw);
  4827. if (rc)
  4828. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4829. /* Reclaim memory once firmware is successfully loaded */
  4830. mwl8k_release_firmware(priv);
  4831. if (rc && count) {
  4832. /* FW did not start successfully;
  4833. * lets try one more time
  4834. */
  4835. count--;
  4836. wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
  4837. msleep(20);
  4838. goto retry;
  4839. }
  4840. return rc;
  4841. }
  4842. static int mwl8k_init_txqs(struct ieee80211_hw *hw)
  4843. {
  4844. struct mwl8k_priv *priv = hw->priv;
  4845. int rc = 0;
  4846. int i;
  4847. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  4848. rc = mwl8k_txq_init(hw, i);
  4849. if (rc)
  4850. break;
  4851. if (priv->ap_fw)
  4852. iowrite32(priv->txq[i].txd_dma,
  4853. priv->sram + priv->txq_offset[i]);
  4854. }
  4855. return rc;
  4856. }
  4857. /* initialize hw after successfully loading a firmware image */
  4858. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  4859. {
  4860. struct mwl8k_priv *priv = hw->priv;
  4861. int rc = 0;
  4862. int i;
  4863. if (priv->ap_fw) {
  4864. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  4865. if (priv->rxd_ops == NULL) {
  4866. wiphy_err(hw->wiphy,
  4867. "Driver does not have AP firmware image support for this hardware\n");
  4868. rc = -ENOENT;
  4869. goto err_stop_firmware;
  4870. }
  4871. } else {
  4872. priv->rxd_ops = &rxd_sta_ops;
  4873. }
  4874. priv->sniffer_enabled = false;
  4875. priv->wmm_enabled = false;
  4876. priv->pending_tx_pkts = 0;
  4877. atomic_set(&priv->watchdog_event_pending, 0);
  4878. rc = mwl8k_rxq_init(hw, 0);
  4879. if (rc)
  4880. goto err_stop_firmware;
  4881. rxq_refill(hw, 0, INT_MAX);
  4882. /* For the sta firmware, we need to know the dma addresses of tx queues
  4883. * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
  4884. * prior to issuing this command. But for the AP case, we learn the
  4885. * total number of queues from the result CMD_GET_HW_SPEC, so for this
  4886. * case we must initialize the tx queues after.
  4887. */
  4888. priv->num_ampdu_queues = 0;
  4889. if (!priv->ap_fw) {
  4890. rc = mwl8k_init_txqs(hw);
  4891. if (rc)
  4892. goto err_free_queues;
  4893. }
  4894. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  4895. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4896. iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
  4897. MWL8K_A2H_INT_BA_WATCHDOG,
  4898. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  4899. iowrite32(MWL8K_A2H_INT_OPC_DONE,
  4900. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  4901. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  4902. IRQF_SHARED, MWL8K_NAME, hw);
  4903. if (rc) {
  4904. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  4905. goto err_free_queues;
  4906. }
  4907. /*
  4908. * When hw restart is requested,
  4909. * mac80211 will take care of clearing
  4910. * the ampdu streams, so do not clear
  4911. * the ampdu state here
  4912. */
  4913. if (!priv->hw_restart_in_progress)
  4914. memset(priv->ampdu, 0, sizeof(priv->ampdu));
  4915. /*
  4916. * Temporarily enable interrupts. Initial firmware host
  4917. * commands use interrupts and avoid polling. Disable
  4918. * interrupts when done.
  4919. */
  4920. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4921. /* Get config data, mac addrs etc */
  4922. if (priv->ap_fw) {
  4923. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  4924. if (!rc)
  4925. rc = mwl8k_init_txqs(hw);
  4926. if (!rc)
  4927. rc = mwl8k_cmd_set_hw_spec(hw);
  4928. } else {
  4929. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  4930. }
  4931. if (rc) {
  4932. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  4933. goto err_free_irq;
  4934. }
  4935. /* Turn radio off */
  4936. rc = mwl8k_cmd_radio_disable(hw);
  4937. if (rc) {
  4938. wiphy_err(hw->wiphy, "Cannot disable\n");
  4939. goto err_free_irq;
  4940. }
  4941. /* Clear MAC address */
  4942. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  4943. if (rc) {
  4944. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  4945. goto err_free_irq;
  4946. }
  4947. /* Configure Antennas */
  4948. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
  4949. if (rc)
  4950. wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
  4951. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  4952. if (rc)
  4953. wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
  4954. /* Disable interrupts */
  4955. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4956. free_irq(priv->pdev->irq, hw);
  4957. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  4958. priv->device_info->part_name,
  4959. priv->hw_rev, hw->wiphy->perm_addr,
  4960. priv->ap_fw ? "AP" : "STA",
  4961. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  4962. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  4963. return 0;
  4964. err_free_irq:
  4965. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4966. free_irq(priv->pdev->irq, hw);
  4967. err_free_queues:
  4968. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4969. mwl8k_txq_deinit(hw, i);
  4970. mwl8k_rxq_deinit(hw, 0);
  4971. err_stop_firmware:
  4972. mwl8k_hw_reset(priv);
  4973. return rc;
  4974. }
  4975. /*
  4976. * invoke mwl8k_reload_firmware to change the firmware image after the device
  4977. * has already been registered
  4978. */
  4979. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  4980. {
  4981. int i, rc = 0;
  4982. struct mwl8k_priv *priv = hw->priv;
  4983. struct mwl8k_vif *vif, *tmp_vif;
  4984. mwl8k_stop(hw);
  4985. mwl8k_rxq_deinit(hw, 0);
  4986. /*
  4987. * All the existing interfaces are re-added by the ieee80211_reconfig;
  4988. * which means driver should remove existing interfaces before calling
  4989. * ieee80211_restart_hw
  4990. */
  4991. if (priv->hw_restart_in_progress)
  4992. list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
  4993. mwl8k_remove_vif(priv, vif);
  4994. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4995. mwl8k_txq_deinit(hw, i);
  4996. rc = mwl8k_init_firmware(hw, fw_image, false);
  4997. if (rc)
  4998. goto fail;
  4999. rc = mwl8k_probe_hw(hw);
  5000. if (rc)
  5001. goto fail;
  5002. if (priv->hw_restart_in_progress)
  5003. return rc;
  5004. rc = mwl8k_start(hw);
  5005. if (rc)
  5006. goto fail;
  5007. rc = mwl8k_config(hw, ~0);
  5008. if (rc)
  5009. goto fail;
  5010. for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
  5011. rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
  5012. if (rc)
  5013. goto fail;
  5014. }
  5015. return rc;
  5016. fail:
  5017. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  5018. return rc;
  5019. }
  5020. static const struct ieee80211_iface_limit ap_if_limits[] = {
  5021. { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
  5022. { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) },
  5023. };
  5024. static const struct ieee80211_iface_combination ap_if_comb = {
  5025. .limits = ap_if_limits,
  5026. .n_limits = ARRAY_SIZE(ap_if_limits),
  5027. .max_interfaces = 8,
  5028. .num_different_channels = 1,
  5029. };
  5030. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  5031. {
  5032. struct ieee80211_hw *hw = priv->hw;
  5033. int i, rc;
  5034. rc = mwl8k_load_firmware(hw);
  5035. mwl8k_release_firmware(priv);
  5036. if (rc) {
  5037. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  5038. return rc;
  5039. }
  5040. /*
  5041. * Extra headroom is the size of the required DMA header
  5042. * minus the size of the smallest 802.11 frame (CTS frame).
  5043. */
  5044. hw->extra_tx_headroom =
  5045. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  5046. hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
  5047. hw->queues = MWL8K_TX_WMM_QUEUES;
  5048. /* Set rssi values to dBm */
  5049. ieee80211_hw_set(hw, SIGNAL_DBM);
  5050. ieee80211_hw_set(hw, HAS_RATE_CONTROL);
  5051. /*
  5052. * Ask mac80211 to not to trigger PS mode
  5053. * based on PM bit of incoming frames.
  5054. */
  5055. if (priv->ap_fw)
  5056. ieee80211_hw_set(hw, AP_LINK_PS);
  5057. hw->vif_data_size = sizeof(struct mwl8k_vif);
  5058. hw->sta_data_size = sizeof(struct mwl8k_sta);
  5059. priv->macids_used = 0;
  5060. INIT_LIST_HEAD(&priv->vif_list);
  5061. /* Set default radio state and preamble */
  5062. priv->radio_on = false;
  5063. priv->radio_short_preamble = false;
  5064. /* Finalize join worker */
  5065. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  5066. /* Handle watchdog ba events */
  5067. INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
  5068. /* To reload the firmware if it crashes */
  5069. INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
  5070. /* TX reclaim and RX tasklets. */
  5071. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  5072. tasklet_disable(&priv->poll_tx_task);
  5073. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  5074. tasklet_disable(&priv->poll_rx_task);
  5075. /* Power management cookie */
  5076. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  5077. if (priv->cookie == NULL)
  5078. return -ENOMEM;
  5079. mutex_init(&priv->fw_mutex);
  5080. priv->fw_mutex_owner = NULL;
  5081. priv->fw_mutex_depth = 0;
  5082. priv->hostcmd_wait = NULL;
  5083. spin_lock_init(&priv->tx_lock);
  5084. spin_lock_init(&priv->stream_lock);
  5085. priv->tx_wait = NULL;
  5086. rc = mwl8k_probe_hw(hw);
  5087. if (rc)
  5088. goto err_free_cookie;
  5089. hw->wiphy->interface_modes = 0;
  5090. if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
  5091. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  5092. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  5093. hw->wiphy->iface_combinations = &ap_if_comb;
  5094. hw->wiphy->n_iface_combinations = 1;
  5095. }
  5096. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  5097. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  5098. wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
  5099. rc = ieee80211_register_hw(hw);
  5100. if (rc) {
  5101. wiphy_err(hw->wiphy, "Cannot register device\n");
  5102. goto err_unprobe_hw;
  5103. }
  5104. return 0;
  5105. err_unprobe_hw:
  5106. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5107. mwl8k_txq_deinit(hw, i);
  5108. mwl8k_rxq_deinit(hw, 0);
  5109. err_free_cookie:
  5110. if (priv->cookie != NULL)
  5111. pci_free_consistent(priv->pdev, 4,
  5112. priv->cookie, priv->cookie_dma);
  5113. return rc;
  5114. }
  5115. static int mwl8k_probe(struct pci_dev *pdev,
  5116. const struct pci_device_id *id)
  5117. {
  5118. static int printed_version;
  5119. struct ieee80211_hw *hw;
  5120. struct mwl8k_priv *priv;
  5121. struct mwl8k_device_info *di;
  5122. int rc;
  5123. if (!printed_version) {
  5124. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  5125. printed_version = 1;
  5126. }
  5127. rc = pci_enable_device(pdev);
  5128. if (rc) {
  5129. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  5130. MWL8K_NAME);
  5131. return rc;
  5132. }
  5133. rc = pci_request_regions(pdev, MWL8K_NAME);
  5134. if (rc) {
  5135. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  5136. MWL8K_NAME);
  5137. goto err_disable_device;
  5138. }
  5139. pci_set_master(pdev);
  5140. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  5141. if (hw == NULL) {
  5142. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  5143. rc = -ENOMEM;
  5144. goto err_free_reg;
  5145. }
  5146. SET_IEEE80211_DEV(hw, &pdev->dev);
  5147. pci_set_drvdata(pdev, hw);
  5148. priv = hw->priv;
  5149. priv->hw = hw;
  5150. priv->pdev = pdev;
  5151. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  5152. if (id->driver_data == MWL8764)
  5153. priv->is_8764 = true;
  5154. priv->sram = pci_iomap(pdev, 0, 0x10000);
  5155. if (priv->sram == NULL) {
  5156. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  5157. rc = -EIO;
  5158. goto err_iounmap;
  5159. }
  5160. /*
  5161. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  5162. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  5163. */
  5164. priv->regs = pci_iomap(pdev, 1, 0x10000);
  5165. if (priv->regs == NULL) {
  5166. priv->regs = pci_iomap(pdev, 2, 0x10000);
  5167. if (priv->regs == NULL) {
  5168. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  5169. rc = -EIO;
  5170. goto err_iounmap;
  5171. }
  5172. }
  5173. /*
  5174. * Choose the initial fw image depending on user input. If a second
  5175. * image is available, make it the alternative image that will be
  5176. * loaded if the first one fails.
  5177. */
  5178. init_completion(&priv->firmware_loading_complete);
  5179. di = priv->device_info;
  5180. if (ap_mode_default && di->fw_image_ap) {
  5181. priv->fw_pref = di->fw_image_ap;
  5182. priv->fw_alt = di->fw_image_sta;
  5183. } else if (!ap_mode_default && di->fw_image_sta) {
  5184. priv->fw_pref = di->fw_image_sta;
  5185. priv->fw_alt = di->fw_image_ap;
  5186. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  5187. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  5188. priv->fw_pref = di->fw_image_sta;
  5189. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  5190. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  5191. priv->fw_pref = di->fw_image_ap;
  5192. }
  5193. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  5194. if (rc)
  5195. goto err_stop_firmware;
  5196. priv->hw_restart_in_progress = false;
  5197. priv->running_bsses = 0;
  5198. return rc;
  5199. err_stop_firmware:
  5200. mwl8k_hw_reset(priv);
  5201. err_iounmap:
  5202. if (priv->regs != NULL)
  5203. pci_iounmap(pdev, priv->regs);
  5204. if (priv->sram != NULL)
  5205. pci_iounmap(pdev, priv->sram);
  5206. ieee80211_free_hw(hw);
  5207. err_free_reg:
  5208. pci_release_regions(pdev);
  5209. err_disable_device:
  5210. pci_disable_device(pdev);
  5211. return rc;
  5212. }
  5213. static void mwl8k_remove(struct pci_dev *pdev)
  5214. {
  5215. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  5216. struct mwl8k_priv *priv;
  5217. int i;
  5218. if (hw == NULL)
  5219. return;
  5220. priv = hw->priv;
  5221. wait_for_completion(&priv->firmware_loading_complete);
  5222. if (priv->fw_state == FW_STATE_ERROR) {
  5223. mwl8k_hw_reset(priv);
  5224. goto unmap;
  5225. }
  5226. ieee80211_stop_queues(hw);
  5227. ieee80211_unregister_hw(hw);
  5228. /* Remove TX reclaim and RX tasklets. */
  5229. tasklet_kill(&priv->poll_tx_task);
  5230. tasklet_kill(&priv->poll_rx_task);
  5231. /* Stop hardware */
  5232. mwl8k_hw_reset(priv);
  5233. /* Return all skbs to mac80211 */
  5234. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5235. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  5236. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5237. mwl8k_txq_deinit(hw, i);
  5238. mwl8k_rxq_deinit(hw, 0);
  5239. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  5240. unmap:
  5241. pci_iounmap(pdev, priv->regs);
  5242. pci_iounmap(pdev, priv->sram);
  5243. ieee80211_free_hw(hw);
  5244. pci_release_regions(pdev);
  5245. pci_disable_device(pdev);
  5246. }
  5247. static struct pci_driver mwl8k_driver = {
  5248. .name = MWL8K_NAME,
  5249. .id_table = mwl8k_pci_id_table,
  5250. .probe = mwl8k_probe,
  5251. .remove = mwl8k_remove,
  5252. };
  5253. module_pci_driver(mwl8k_driver);
  5254. MODULE_DESCRIPTION(MWL8K_DESC);
  5255. MODULE_VERSION(MWL8K_VERSION);
  5256. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  5257. MODULE_LICENSE("GPL");