rcar-rst.c 3.3 KB

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  1. /*
  2. * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
  3. *
  4. * Copyright (C) 2016 Glider bvba
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/err.h>
  11. #include <linux/io.h>
  12. #include <linux/of_address.h>
  13. #include <linux/soc/renesas/rcar-rst.h>
  14. #define WDTRSTCR_RESET 0xA55A0002
  15. #define WDTRSTCR 0x0054
  16. static int rcar_rst_enable_wdt_reset(void __iomem *base)
  17. {
  18. iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
  19. return 0;
  20. }
  21. struct rst_config {
  22. unsigned int modemr; /* Mode Monitoring Register Offset */
  23. int (*configure)(void *base); /* Platform specific configuration */
  24. };
  25. static const struct rst_config rcar_rst_gen1 __initconst = {
  26. .modemr = 0x20,
  27. };
  28. static const struct rst_config rcar_rst_gen2 __initconst = {
  29. .modemr = 0x60,
  30. .configure = rcar_rst_enable_wdt_reset,
  31. };
  32. static const struct rst_config rcar_rst_gen3 __initconst = {
  33. .modemr = 0x60,
  34. };
  35. static const struct of_device_id rcar_rst_matches[] __initconst = {
  36. /* RZ/G is handled like R-Car Gen2 */
  37. { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
  38. { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
  39. { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
  40. /* R-Car Gen1 */
  41. { .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
  42. { .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
  43. /* R-Car Gen2 */
  44. { .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
  45. { .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
  46. { .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
  47. { .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
  48. { .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
  49. /* R-Car Gen3 */
  50. { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
  51. { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
  52. { .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
  53. { .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
  54. { .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
  55. { .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
  56. { .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
  57. { /* sentinel */ }
  58. };
  59. static void __iomem *rcar_rst_base __initdata;
  60. static u32 saved_mode __initdata;
  61. static int __init rcar_rst_init(void)
  62. {
  63. const struct of_device_id *match;
  64. const struct rst_config *cfg;
  65. struct device_node *np;
  66. void __iomem *base;
  67. int error = 0;
  68. np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
  69. if (!np)
  70. return -ENODEV;
  71. base = of_iomap(np, 0);
  72. if (!base) {
  73. pr_warn("%pOF: Cannot map regs\n", np);
  74. error = -ENOMEM;
  75. goto out_put;
  76. }
  77. rcar_rst_base = base;
  78. cfg = match->data;
  79. saved_mode = ioread32(base + cfg->modemr);
  80. if (cfg->configure) {
  81. error = cfg->configure(base);
  82. if (error) {
  83. pr_warn("%pOF: Cannot run SoC specific configuration\n",
  84. np);
  85. goto out_put;
  86. }
  87. }
  88. pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
  89. out_put:
  90. of_node_put(np);
  91. return error;
  92. }
  93. int __init rcar_rst_read_mode_pins(u32 *mode)
  94. {
  95. int error;
  96. if (!rcar_rst_base) {
  97. error = rcar_rst_init();
  98. if (error)
  99. return error;
  100. }
  101. *mode = saved_mode;
  102. return 0;
  103. }