axg-tdmin.c 6.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright (c) 2018 BayLibre, SAS.
  4. // Author: Jerome Brunet <jbrunet@baylibre.com>
  5. #include <linux/module.h>
  6. #include <linux/of_platform.h>
  7. #include <linux/regmap.h>
  8. #include <sound/soc.h>
  9. #include <sound/soc-dai.h>
  10. #include "axg-tdm-formatter.h"
  11. #define TDMIN_CTRL 0x00
  12. #define TDMIN_CTRL_ENABLE BIT(31)
  13. #define TDMIN_CTRL_I2S_MODE BIT(30)
  14. #define TDMIN_CTRL_RST_OUT BIT(29)
  15. #define TDMIN_CTRL_RST_IN BIT(28)
  16. #define TDMIN_CTRL_WS_INV BIT(25)
  17. #define TDMIN_CTRL_SEL_SHIFT 20
  18. #define TDMIN_CTRL_IN_BIT_SKEW_MASK GENMASK(18, 16)
  19. #define TDMIN_CTRL_IN_BIT_SKEW(x) ((x) << 16)
  20. #define TDMIN_CTRL_LSB_FIRST BIT(5)
  21. #define TDMIN_CTRL_BITNUM_MASK GENMASK(4, 0)
  22. #define TDMIN_CTRL_BITNUM(x) ((x) << 0)
  23. #define TDMIN_SWAP 0x04
  24. #define TDMIN_MASK0 0x08
  25. #define TDMIN_MASK1 0x0c
  26. #define TDMIN_MASK2 0x10
  27. #define TDMIN_MASK3 0x14
  28. #define TDMIN_STAT 0x18
  29. #define TDMIN_MUTE_VAL 0x1c
  30. #define TDMIN_MUTE0 0x20
  31. #define TDMIN_MUTE1 0x24
  32. #define TDMIN_MUTE2 0x28
  33. #define TDMIN_MUTE3 0x2c
  34. static const struct regmap_config axg_tdmin_regmap_cfg = {
  35. .reg_bits = 32,
  36. .val_bits = 32,
  37. .reg_stride = 4,
  38. .max_register = TDMIN_MUTE3,
  39. };
  40. static const char * const axg_tdmin_sel_texts[] = {
  41. "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5",
  42. };
  43. /* Change to special mux control to reset dapm */
  44. static SOC_ENUM_SINGLE_DECL(axg_tdmin_sel_enum, TDMIN_CTRL,
  45. TDMIN_CTRL_SEL_SHIFT, axg_tdmin_sel_texts);
  46. static const struct snd_kcontrol_new axg_tdmin_in_mux =
  47. SOC_DAPM_ENUM("Input Source", axg_tdmin_sel_enum);
  48. static struct snd_soc_dai *
  49. axg_tdmin_get_be(struct snd_soc_dapm_widget *w)
  50. {
  51. struct snd_soc_dapm_path *p = NULL;
  52. struct snd_soc_dai *be;
  53. snd_soc_dapm_widget_for_each_source_path(w, p) {
  54. if (!p->connect)
  55. continue;
  56. if (p->source->id == snd_soc_dapm_dai_out)
  57. return (struct snd_soc_dai *)p->source->priv;
  58. be = axg_tdmin_get_be(p->source);
  59. if (be)
  60. return be;
  61. }
  62. return NULL;
  63. }
  64. static struct axg_tdm_stream *
  65. axg_tdmin_get_tdm_stream(struct snd_soc_dapm_widget *w)
  66. {
  67. struct snd_soc_dai *be = axg_tdmin_get_be(w);
  68. if (!be)
  69. return NULL;
  70. return be->capture_dma_data;
  71. }
  72. static void axg_tdmin_enable(struct regmap *map)
  73. {
  74. /* Apply both reset */
  75. regmap_update_bits(map, TDMIN_CTRL,
  76. TDMIN_CTRL_RST_OUT | TDMIN_CTRL_RST_IN, 0);
  77. /* Clear out reset before in reset */
  78. regmap_update_bits(map, TDMIN_CTRL,
  79. TDMIN_CTRL_RST_OUT, TDMIN_CTRL_RST_OUT);
  80. regmap_update_bits(map, TDMIN_CTRL,
  81. TDMIN_CTRL_RST_IN, TDMIN_CTRL_RST_IN);
  82. /* Actually enable tdmin */
  83. regmap_update_bits(map, TDMIN_CTRL,
  84. TDMIN_CTRL_ENABLE, TDMIN_CTRL_ENABLE);
  85. }
  86. static void axg_tdmin_disable(struct regmap *map)
  87. {
  88. regmap_update_bits(map, TDMIN_CTRL, TDMIN_CTRL_ENABLE, 0);
  89. }
  90. static int axg_tdmin_prepare(struct regmap *map, struct axg_tdm_stream *ts)
  91. {
  92. unsigned int val = 0;
  93. /* Set stream skew */
  94. switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  95. case SND_SOC_DAIFMT_I2S:
  96. case SND_SOC_DAIFMT_DSP_A:
  97. val |= TDMIN_CTRL_IN_BIT_SKEW(3);
  98. break;
  99. case SND_SOC_DAIFMT_LEFT_J:
  100. case SND_SOC_DAIFMT_DSP_B:
  101. val = TDMIN_CTRL_IN_BIT_SKEW(2);
  102. break;
  103. default:
  104. pr_err("Unsupported format: %u\n",
  105. ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
  106. return -EINVAL;
  107. }
  108. /* Set stream format mode */
  109. switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  110. case SND_SOC_DAIFMT_I2S:
  111. case SND_SOC_DAIFMT_LEFT_J:
  112. case SND_SOC_DAIFMT_RIGHT_J:
  113. val |= TDMIN_CTRL_I2S_MODE;
  114. break;
  115. }
  116. /* If the sample clock is inverted, invert it back for the formatter */
  117. if (axg_tdm_lrclk_invert(ts->iface->fmt))
  118. val |= TDMIN_CTRL_WS_INV;
  119. /* Set the slot width */
  120. val |= TDMIN_CTRL_BITNUM(ts->iface->slot_width - 1);
  121. /*
  122. * The following also reset LSB_FIRST which result in the formatter
  123. * placing the first bit received at bit 31
  124. */
  125. regmap_update_bits(map, TDMIN_CTRL,
  126. (TDMIN_CTRL_IN_BIT_SKEW_MASK | TDMIN_CTRL_WS_INV |
  127. TDMIN_CTRL_I2S_MODE | TDMIN_CTRL_LSB_FIRST |
  128. TDMIN_CTRL_BITNUM_MASK), val);
  129. /* Set static swap mask configuration */
  130. regmap_write(map, TDMIN_SWAP, 0x76543210);
  131. return axg_tdm_formatter_set_channel_masks(map, ts, TDMIN_MASK0);
  132. }
  133. static const struct snd_soc_dapm_widget axg_tdmin_dapm_widgets[] = {
  134. SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
  135. SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
  136. SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
  137. SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
  138. SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
  139. SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
  140. SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmin_in_mux),
  141. SND_SOC_DAPM_PGA_E("DEC", SND_SOC_NOPM, 0, 0, NULL, 0,
  142. axg_tdm_formatter_event,
  143. (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
  144. SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
  145. };
  146. static const struct snd_soc_dapm_route axg_tdmin_dapm_routes[] = {
  147. { "SRC SEL", "IN 0", "IN 0" },
  148. { "SRC SEL", "IN 1", "IN 1" },
  149. { "SRC SEL", "IN 2", "IN 2" },
  150. { "SRC SEL", "IN 3", "IN 3" },
  151. { "SRC SEL", "IN 4", "IN 4" },
  152. { "SRC SEL", "IN 5", "IN 5" },
  153. { "DEC", NULL, "SRC SEL" },
  154. { "OUT", NULL, "DEC" },
  155. };
  156. static const struct snd_soc_component_driver axg_tdmin_component_drv = {
  157. .dapm_widgets = axg_tdmin_dapm_widgets,
  158. .num_dapm_widgets = ARRAY_SIZE(axg_tdmin_dapm_widgets),
  159. .dapm_routes = axg_tdmin_dapm_routes,
  160. .num_dapm_routes = ARRAY_SIZE(axg_tdmin_dapm_routes),
  161. };
  162. static const struct axg_tdm_formatter_ops axg_tdmin_ops = {
  163. .get_stream = axg_tdmin_get_tdm_stream,
  164. .prepare = axg_tdmin_prepare,
  165. .enable = axg_tdmin_enable,
  166. .disable = axg_tdmin_disable,
  167. };
  168. static const struct axg_tdm_formatter_driver axg_tdmin_drv = {
  169. .component_drv = &axg_tdmin_component_drv,
  170. .regmap_cfg = &axg_tdmin_regmap_cfg,
  171. .ops = &axg_tdmin_ops,
  172. .invert_sclk = false,
  173. };
  174. static const struct of_device_id axg_tdmin_of_match[] = {
  175. {
  176. .compatible = "amlogic,axg-tdmin",
  177. .data = &axg_tdmin_drv,
  178. }, {}
  179. };
  180. MODULE_DEVICE_TABLE(of, axg_tdmin_of_match);
  181. static struct platform_driver axg_tdmin_pdrv = {
  182. .probe = axg_tdm_formatter_probe,
  183. .driver = {
  184. .name = "axg-tdmin",
  185. .of_match_table = axg_tdmin_of_match,
  186. },
  187. };
  188. module_platform_driver(axg_tdmin_pdrv);
  189. MODULE_DESCRIPTION("Amlogic AXG TDM input formatter driver");
  190. MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
  191. MODULE_LICENSE("GPL v2");