mmp-sspa.c 12 KB

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  1. /*
  2. * linux/sound/soc/pxa/mmp-sspa.c
  3. * Base on pxa2xx-ssp.c
  4. *
  5. * Copyright (C) 2011 Marvell International Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/clk.h>
  27. #include <linux/slab.h>
  28. #include <linux/pxa2xx_ssp.h>
  29. #include <linux/io.h>
  30. #include <linux/dmaengine.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/initval.h>
  34. #include <sound/pcm_params.h>
  35. #include <sound/soc.h>
  36. #include <sound/pxa2xx-lib.h>
  37. #include <sound/dmaengine_pcm.h>
  38. #include "mmp-sspa.h"
  39. /*
  40. * SSPA audio private data
  41. */
  42. struct sspa_priv {
  43. struct ssp_device *sspa;
  44. struct snd_dmaengine_dai_dma_data *dma_params;
  45. struct clk *audio_clk;
  46. struct clk *sysclk;
  47. int dai_fmt;
  48. int running_cnt;
  49. };
  50. static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
  51. {
  52. __raw_writel(val, sspa->mmio_base + reg);
  53. }
  54. static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
  55. {
  56. return __raw_readl(sspa->mmio_base + reg);
  57. }
  58. static void mmp_sspa_tx_enable(struct ssp_device *sspa)
  59. {
  60. unsigned int sspa_sp;
  61. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
  62. sspa_sp |= SSPA_SP_S_EN;
  63. sspa_sp |= SSPA_SP_WEN;
  64. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  65. }
  66. static void mmp_sspa_tx_disable(struct ssp_device *sspa)
  67. {
  68. unsigned int sspa_sp;
  69. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
  70. sspa_sp &= ~SSPA_SP_S_EN;
  71. sspa_sp |= SSPA_SP_WEN;
  72. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  73. }
  74. static void mmp_sspa_rx_enable(struct ssp_device *sspa)
  75. {
  76. unsigned int sspa_sp;
  77. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
  78. sspa_sp |= SSPA_SP_S_EN;
  79. sspa_sp |= SSPA_SP_WEN;
  80. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  81. }
  82. static void mmp_sspa_rx_disable(struct ssp_device *sspa)
  83. {
  84. unsigned int sspa_sp;
  85. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
  86. sspa_sp &= ~SSPA_SP_S_EN;
  87. sspa_sp |= SSPA_SP_WEN;
  88. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  89. }
  90. static int mmp_sspa_startup(struct snd_pcm_substream *substream,
  91. struct snd_soc_dai *dai)
  92. {
  93. struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
  94. clk_enable(priv->sysclk);
  95. clk_enable(priv->sspa->clk);
  96. return 0;
  97. }
  98. static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
  99. struct snd_soc_dai *dai)
  100. {
  101. struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
  102. clk_disable(priv->sspa->clk);
  103. clk_disable(priv->sysclk);
  104. }
  105. /*
  106. * Set the SSP ports SYSCLK.
  107. */
  108. static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
  109. int clk_id, unsigned int freq, int dir)
  110. {
  111. struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
  112. int ret = 0;
  113. switch (clk_id) {
  114. case MMP_SSPA_CLK_AUDIO:
  115. ret = clk_set_rate(priv->audio_clk, freq);
  116. if (ret)
  117. return ret;
  118. break;
  119. case MMP_SSPA_CLK_PLL:
  120. case MMP_SSPA_CLK_VCXO:
  121. /* not support yet */
  122. return -EINVAL;
  123. default:
  124. return -EINVAL;
  125. }
  126. return 0;
  127. }
  128. static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
  129. int source, unsigned int freq_in,
  130. unsigned int freq_out)
  131. {
  132. struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
  133. int ret = 0;
  134. switch (pll_id) {
  135. case MMP_SYSCLK:
  136. ret = clk_set_rate(priv->sysclk, freq_out);
  137. if (ret)
  138. return ret;
  139. break;
  140. case MMP_SSPA_CLK:
  141. ret = clk_set_rate(priv->sspa->clk, freq_out);
  142. if (ret)
  143. return ret;
  144. break;
  145. default:
  146. return -ENODEV;
  147. }
  148. return 0;
  149. }
  150. /*
  151. * Set up the sspa dai format. The sspa port must be inactive
  152. * before calling this function as the physical
  153. * interface format is changed.
  154. */
  155. static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
  156. unsigned int fmt)
  157. {
  158. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
  159. struct ssp_device *sspa = sspa_priv->sspa;
  160. u32 sspa_sp, sspa_ctrl;
  161. /* check if we need to change anything at all */
  162. if (sspa_priv->dai_fmt == fmt)
  163. return 0;
  164. /* we can only change the settings if the port is not in use */
  165. if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
  166. (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
  167. dev_err(&sspa->pdev->dev,
  168. "can't change hardware dai format: stream is in use\n");
  169. return -EINVAL;
  170. }
  171. /* reset port settings */
  172. sspa_sp = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
  173. sspa_ctrl = 0;
  174. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  175. case SND_SOC_DAIFMT_CBS_CFS:
  176. sspa_sp |= SSPA_SP_MSL;
  177. break;
  178. case SND_SOC_DAIFMT_CBM_CFM:
  179. break;
  180. default:
  181. return -EINVAL;
  182. }
  183. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  184. case SND_SOC_DAIFMT_NB_NF:
  185. sspa_sp |= SSPA_SP_FSP;
  186. break;
  187. default:
  188. return -EINVAL;
  189. }
  190. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  191. case SND_SOC_DAIFMT_I2S:
  192. sspa_sp |= SSPA_TXSP_FPER(63);
  193. sspa_sp |= SSPA_SP_FWID(31);
  194. sspa_ctrl |= SSPA_CTL_XDATDLY(1);
  195. break;
  196. default:
  197. return -EINVAL;
  198. }
  199. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  200. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  201. sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
  202. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  203. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  204. /*
  205. * FIXME: hw issue, for the tx serial port,
  206. * can not config the master/slave mode;
  207. * so must clean this bit.
  208. * The master/slave mode has been set in the
  209. * rx port.
  210. */
  211. sspa_sp &= ~SSPA_SP_MSL;
  212. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  213. mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
  214. mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
  215. /* Since we are configuring the timings for the format by hand
  216. * we have to defer some things until hw_params() where we
  217. * know parameters like the sample size.
  218. */
  219. sspa_priv->dai_fmt = fmt;
  220. return 0;
  221. }
  222. /*
  223. * Set the SSPA audio DMA parameters and sample size.
  224. * Can be called multiple times by oss emulation.
  225. */
  226. static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
  227. struct snd_pcm_hw_params *params,
  228. struct snd_soc_dai *dai)
  229. {
  230. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  231. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  232. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
  233. struct ssp_device *sspa = sspa_priv->sspa;
  234. struct snd_dmaengine_dai_dma_data *dma_params;
  235. u32 sspa_ctrl;
  236. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  237. sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
  238. else
  239. sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
  240. sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
  241. sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
  242. sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
  243. sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
  244. sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
  245. switch (params_format(params)) {
  246. case SNDRV_PCM_FORMAT_S8:
  247. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
  248. break;
  249. case SNDRV_PCM_FORMAT_S16_LE:
  250. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
  251. break;
  252. case SNDRV_PCM_FORMAT_S20_3LE:
  253. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
  254. break;
  255. case SNDRV_PCM_FORMAT_S24_3LE:
  256. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
  257. break;
  258. case SNDRV_PCM_FORMAT_S32_LE:
  259. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
  260. break;
  261. default:
  262. return -EINVAL;
  263. }
  264. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  265. mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
  266. mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
  267. } else {
  268. mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
  269. mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
  270. }
  271. dma_params = &sspa_priv->dma_params[substream->stream];
  272. dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  273. (sspa->phys_base + SSPA_TXD) :
  274. (sspa->phys_base + SSPA_RXD);
  275. snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
  276. return 0;
  277. }
  278. static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
  279. struct snd_soc_dai *dai)
  280. {
  281. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
  282. struct ssp_device *sspa = sspa_priv->sspa;
  283. int ret = 0;
  284. switch (cmd) {
  285. case SNDRV_PCM_TRIGGER_START:
  286. case SNDRV_PCM_TRIGGER_RESUME:
  287. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  288. /*
  289. * whatever playback or capture, must enable rx.
  290. * this is a hw issue, so need check if rx has been
  291. * enabled or not; if has been enabled by another
  292. * stream, do not enable again.
  293. */
  294. if (!sspa_priv->running_cnt)
  295. mmp_sspa_rx_enable(sspa);
  296. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  297. mmp_sspa_tx_enable(sspa);
  298. sspa_priv->running_cnt++;
  299. break;
  300. case SNDRV_PCM_TRIGGER_STOP:
  301. case SNDRV_PCM_TRIGGER_SUSPEND:
  302. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  303. sspa_priv->running_cnt--;
  304. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  305. mmp_sspa_tx_disable(sspa);
  306. /* have no capture stream, disable rx port */
  307. if (!sspa_priv->running_cnt)
  308. mmp_sspa_rx_disable(sspa);
  309. break;
  310. default:
  311. ret = -EINVAL;
  312. }
  313. return ret;
  314. }
  315. static int mmp_sspa_probe(struct snd_soc_dai *dai)
  316. {
  317. struct sspa_priv *priv = dev_get_drvdata(dai->dev);
  318. snd_soc_dai_set_drvdata(dai, priv);
  319. return 0;
  320. }
  321. #define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
  322. #define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  323. SNDRV_PCM_FMTBIT_S16_LE | \
  324. SNDRV_PCM_FMTBIT_S24_LE | \
  325. SNDRV_PCM_FMTBIT_S32_LE)
  326. static const struct snd_soc_dai_ops mmp_sspa_dai_ops = {
  327. .startup = mmp_sspa_startup,
  328. .shutdown = mmp_sspa_shutdown,
  329. .trigger = mmp_sspa_trigger,
  330. .hw_params = mmp_sspa_hw_params,
  331. .set_sysclk = mmp_sspa_set_dai_sysclk,
  332. .set_pll = mmp_sspa_set_dai_pll,
  333. .set_fmt = mmp_sspa_set_dai_fmt,
  334. };
  335. static struct snd_soc_dai_driver mmp_sspa_dai = {
  336. .probe = mmp_sspa_probe,
  337. .playback = {
  338. .channels_min = 1,
  339. .channels_max = 128,
  340. .rates = MMP_SSPA_RATES,
  341. .formats = MMP_SSPA_FORMATS,
  342. },
  343. .capture = {
  344. .channels_min = 1,
  345. .channels_max = 2,
  346. .rates = MMP_SSPA_RATES,
  347. .formats = MMP_SSPA_FORMATS,
  348. },
  349. .ops = &mmp_sspa_dai_ops,
  350. };
  351. static const struct snd_soc_component_driver mmp_sspa_component = {
  352. .name = "mmp-sspa",
  353. };
  354. static int asoc_mmp_sspa_probe(struct platform_device *pdev)
  355. {
  356. struct sspa_priv *priv;
  357. struct resource *res;
  358. priv = devm_kzalloc(&pdev->dev,
  359. sizeof(struct sspa_priv), GFP_KERNEL);
  360. if (!priv)
  361. return -ENOMEM;
  362. priv->sspa = devm_kzalloc(&pdev->dev,
  363. sizeof(struct ssp_device), GFP_KERNEL);
  364. if (priv->sspa == NULL)
  365. return -ENOMEM;
  366. priv->dma_params = devm_kcalloc(&pdev->dev,
  367. 2, sizeof(struct snd_dmaengine_dai_dma_data),
  368. GFP_KERNEL);
  369. if (priv->dma_params == NULL)
  370. return -ENOMEM;
  371. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  372. priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
  373. if (IS_ERR(priv->sspa->mmio_base))
  374. return PTR_ERR(priv->sspa->mmio_base);
  375. priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
  376. if (IS_ERR(priv->sspa->clk))
  377. return PTR_ERR(priv->sspa->clk);
  378. priv->audio_clk = clk_get(NULL, "mmp-audio");
  379. if (IS_ERR(priv->audio_clk))
  380. return PTR_ERR(priv->audio_clk);
  381. priv->sysclk = clk_get(NULL, "mmp-sysclk");
  382. if (IS_ERR(priv->sysclk)) {
  383. clk_put(priv->audio_clk);
  384. return PTR_ERR(priv->sysclk);
  385. }
  386. clk_enable(priv->audio_clk);
  387. priv->dai_fmt = (unsigned int) -1;
  388. platform_set_drvdata(pdev, priv);
  389. return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component,
  390. &mmp_sspa_dai, 1);
  391. }
  392. static int asoc_mmp_sspa_remove(struct platform_device *pdev)
  393. {
  394. struct sspa_priv *priv = platform_get_drvdata(pdev);
  395. clk_disable(priv->audio_clk);
  396. clk_put(priv->audio_clk);
  397. clk_put(priv->sysclk);
  398. return 0;
  399. }
  400. static struct platform_driver asoc_mmp_sspa_driver = {
  401. .driver = {
  402. .name = "mmp-sspa-dai",
  403. },
  404. .probe = asoc_mmp_sspa_probe,
  405. .remove = asoc_mmp_sspa_remove,
  406. };
  407. module_platform_driver(asoc_mmp_sspa_driver);
  408. MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
  409. MODULE_DESCRIPTION("MMP SSPA SoC Interface");
  410. MODULE_LICENSE("GPL");
  411. MODULE_ALIAS("platform:mmp-sspa-dai");