txx9aclc.c 12 KB

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  1. /*
  2. * Generic TXx9 ACLC platform driver
  3. *
  4. * Copyright (C) 2009 Atsushi Nemoto
  5. *
  6. * Based on RBTX49xx patch from CELF patch archive.
  7. * (C) Copyright TOSHIBA CORPORATION 2004-2006
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/scatterlist.h>
  17. #include <linux/slab.h>
  18. #include <linux/dmaengine.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include "txx9aclc.h"
  24. #define DRV_NAME "txx9aclc"
  25. static struct txx9aclc_soc_device {
  26. struct txx9aclc_dmadata dmadata[2];
  27. } txx9aclc_soc_device;
  28. /* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
  29. static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
  30. static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
  31. struct txx9aclc_dmadata *dmadata);
  32. static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
  33. /*
  34. * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
  35. * needs more works for noncoherent MIPS.
  36. */
  37. .info = SNDRV_PCM_INFO_INTERLEAVED |
  38. SNDRV_PCM_INFO_BATCH |
  39. SNDRV_PCM_INFO_PAUSE,
  40. .period_bytes_min = 1024,
  41. .period_bytes_max = 8 * 1024,
  42. .periods_min = 2,
  43. .periods_max = 4096,
  44. .buffer_bytes_max = 32 * 1024,
  45. };
  46. static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
  47. struct snd_pcm_hw_params *params)
  48. {
  49. struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  50. struct snd_pcm_runtime *runtime = substream->runtime;
  51. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
  52. struct txx9aclc_dmadata *dmadata = runtime->private_data;
  53. int ret;
  54. ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
  55. if (ret < 0)
  56. return ret;
  57. dev_dbg(component->dev,
  58. "runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
  59. "runtime->min_align %ld\n",
  60. (unsigned long)runtime->dma_area,
  61. (unsigned long)runtime->dma_addr, runtime->dma_bytes,
  62. runtime->min_align);
  63. dev_dbg(component->dev,
  64. "periods %d period_bytes %d stream %d\n",
  65. params_periods(params), params_period_bytes(params),
  66. substream->stream);
  67. dmadata->substream = substream;
  68. dmadata->pos = 0;
  69. return 0;
  70. }
  71. static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
  72. {
  73. return snd_pcm_lib_free_pages(substream);
  74. }
  75. static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
  76. {
  77. struct snd_pcm_runtime *runtime = substream->runtime;
  78. struct txx9aclc_dmadata *dmadata = runtime->private_data;
  79. dmadata->dma_addr = runtime->dma_addr;
  80. dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
  81. dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
  82. if (dmadata->buffer_bytes == dmadata->period_bytes) {
  83. dmadata->frag_bytes = dmadata->period_bytes >> 1;
  84. dmadata->frags = 2;
  85. } else {
  86. dmadata->frag_bytes = dmadata->period_bytes;
  87. dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
  88. }
  89. dmadata->frag_count = 0;
  90. dmadata->pos = 0;
  91. return 0;
  92. }
  93. static void txx9aclc_dma_complete(void *arg)
  94. {
  95. struct txx9aclc_dmadata *dmadata = arg;
  96. unsigned long flags;
  97. /* dma completion handler cannot submit new operations */
  98. spin_lock_irqsave(&dmadata->dma_lock, flags);
  99. if (dmadata->frag_count >= 0) {
  100. dmadata->dmacount--;
  101. if (!WARN_ON(dmadata->dmacount < 0))
  102. tasklet_schedule(&dmadata->tasklet);
  103. }
  104. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  105. }
  106. static struct dma_async_tx_descriptor *
  107. txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
  108. {
  109. struct dma_chan *chan = dmadata->dma_chan;
  110. struct dma_async_tx_descriptor *desc;
  111. struct scatterlist sg;
  112. sg_init_table(&sg, 1);
  113. sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
  114. dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
  115. sg_dma_address(&sg) = buf_dma_addr;
  116. desc = dmaengine_prep_slave_sg(chan, &sg, 1,
  117. dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  118. DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
  119. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  120. if (!desc) {
  121. dev_err(&chan->dev->device, "cannot prepare slave dma\n");
  122. return NULL;
  123. }
  124. desc->callback = txx9aclc_dma_complete;
  125. desc->callback_param = dmadata;
  126. dmaengine_submit(desc);
  127. return desc;
  128. }
  129. #define NR_DMA_CHAIN 2
  130. static void txx9aclc_dma_tasklet(unsigned long data)
  131. {
  132. struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
  133. struct dma_chan *chan = dmadata->dma_chan;
  134. struct dma_async_tx_descriptor *desc;
  135. struct snd_pcm_substream *substream = dmadata->substream;
  136. u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  137. ACCTL_AUDODMA : ACCTL_AUDIDMA;
  138. int i;
  139. unsigned long flags;
  140. spin_lock_irqsave(&dmadata->dma_lock, flags);
  141. if (dmadata->frag_count < 0) {
  142. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  143. void __iomem *base = drvdata->base;
  144. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  145. dmaengine_terminate_all(chan);
  146. /* first time */
  147. for (i = 0; i < NR_DMA_CHAIN; i++) {
  148. desc = txx9aclc_dma_submit(dmadata,
  149. dmadata->dma_addr + i * dmadata->frag_bytes);
  150. if (!desc)
  151. return;
  152. }
  153. dmadata->dmacount = NR_DMA_CHAIN;
  154. dma_async_issue_pending(chan);
  155. spin_lock_irqsave(&dmadata->dma_lock, flags);
  156. __raw_writel(ctlbit, base + ACCTLEN);
  157. dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
  158. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  159. return;
  160. }
  161. if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
  162. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  163. return;
  164. }
  165. while (dmadata->dmacount < NR_DMA_CHAIN) {
  166. dmadata->dmacount++;
  167. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  168. desc = txx9aclc_dma_submit(dmadata,
  169. dmadata->dma_addr +
  170. dmadata->frag_count * dmadata->frag_bytes);
  171. if (!desc)
  172. return;
  173. dma_async_issue_pending(chan);
  174. spin_lock_irqsave(&dmadata->dma_lock, flags);
  175. dmadata->frag_count++;
  176. dmadata->frag_count %= dmadata->frags;
  177. dmadata->pos += dmadata->frag_bytes;
  178. dmadata->pos %= dmadata->buffer_bytes;
  179. if ((dmadata->frag_count * dmadata->frag_bytes) %
  180. dmadata->period_bytes == 0)
  181. snd_pcm_period_elapsed(substream);
  182. }
  183. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  184. }
  185. static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  186. {
  187. struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
  188. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  189. void __iomem *base = drvdata->base;
  190. unsigned long flags;
  191. int ret = 0;
  192. u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  193. ACCTL_AUDODMA : ACCTL_AUDIDMA;
  194. spin_lock_irqsave(&dmadata->dma_lock, flags);
  195. switch (cmd) {
  196. case SNDRV_PCM_TRIGGER_START:
  197. dmadata->frag_count = -1;
  198. tasklet_schedule(&dmadata->tasklet);
  199. break;
  200. case SNDRV_PCM_TRIGGER_STOP:
  201. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  202. case SNDRV_PCM_TRIGGER_SUSPEND:
  203. __raw_writel(ctlbit, base + ACCTLDIS);
  204. break;
  205. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  206. case SNDRV_PCM_TRIGGER_RESUME:
  207. __raw_writel(ctlbit, base + ACCTLEN);
  208. break;
  209. default:
  210. ret = -EINVAL;
  211. }
  212. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  213. return ret;
  214. }
  215. static snd_pcm_uframes_t
  216. txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
  217. {
  218. struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
  219. return bytes_to_frames(substream->runtime, dmadata->pos);
  220. }
  221. static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
  222. {
  223. struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
  224. struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
  225. int ret;
  226. ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
  227. if (ret)
  228. return ret;
  229. /* ensure that buffer size is a multiple of period size */
  230. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  231. SNDRV_PCM_HW_PARAM_PERIODS);
  232. if (ret < 0)
  233. return ret;
  234. substream->runtime->private_data = dmadata;
  235. return 0;
  236. }
  237. static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
  238. {
  239. struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
  240. struct dma_chan *chan = dmadata->dma_chan;
  241. dmadata->frag_count = -1;
  242. dmaengine_terminate_all(chan);
  243. return 0;
  244. }
  245. static const struct snd_pcm_ops txx9aclc_pcm_ops = {
  246. .open = txx9aclc_pcm_open,
  247. .close = txx9aclc_pcm_close,
  248. .ioctl = snd_pcm_lib_ioctl,
  249. .hw_params = txx9aclc_pcm_hw_params,
  250. .hw_free = txx9aclc_pcm_hw_free,
  251. .prepare = txx9aclc_pcm_prepare,
  252. .trigger = txx9aclc_pcm_trigger,
  253. .pointer = txx9aclc_pcm_pointer,
  254. };
  255. static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
  256. {
  257. struct snd_card *card = rtd->card->snd_card;
  258. struct snd_soc_dai *dai = rtd->cpu_dai;
  259. struct snd_pcm *pcm = rtd->pcm;
  260. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
  261. struct platform_device *pdev = to_platform_device(component->dev);
  262. struct txx9aclc_soc_device *dev;
  263. struct resource *r;
  264. int i;
  265. int ret;
  266. /* at this point onwards the AC97 component has probed and this will be valid */
  267. dev = snd_soc_dai_get_drvdata(dai);
  268. dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
  269. dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
  270. for (i = 0; i < 2; i++) {
  271. r = platform_get_resource(pdev, IORESOURCE_DMA, i);
  272. if (!r) {
  273. ret = -EBUSY;
  274. goto exit;
  275. }
  276. dev->dmadata[i].dma_res = r;
  277. ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
  278. if (ret)
  279. goto exit;
  280. }
  281. return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  282. card->dev, 64 * 1024, 4 * 1024 * 1024);
  283. exit:
  284. for (i = 0; i < 2; i++) {
  285. if (dev->dmadata[i].dma_chan)
  286. dma_release_channel(dev->dmadata[i].dma_chan);
  287. dev->dmadata[i].dma_chan = NULL;
  288. }
  289. return ret;
  290. }
  291. static bool filter(struct dma_chan *chan, void *param)
  292. {
  293. struct txx9aclc_dmadata *dmadata = param;
  294. char *devname;
  295. bool found = false;
  296. devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
  297. (int)dmadata->dma_res->start);
  298. if (strcmp(dev_name(chan->device->dev), devname) == 0) {
  299. chan->private = &dmadata->dma_slave;
  300. found = true;
  301. }
  302. kfree(devname);
  303. return found;
  304. }
  305. static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
  306. struct txx9aclc_dmadata *dmadata)
  307. {
  308. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  309. struct txx9dmac_slave *ds = &dmadata->dma_slave;
  310. dma_cap_mask_t mask;
  311. spin_lock_init(&dmadata->dma_lock);
  312. ds->reg_width = sizeof(u32);
  313. if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  314. ds->tx_reg = drvdata->physbase + ACAUDODAT;
  315. ds->rx_reg = 0;
  316. } else {
  317. ds->tx_reg = 0;
  318. ds->rx_reg = drvdata->physbase + ACAUDIDAT;
  319. }
  320. /* Try to grab a DMA channel */
  321. dma_cap_zero(mask);
  322. dma_cap_set(DMA_SLAVE, mask);
  323. dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
  324. if (!dmadata->dma_chan) {
  325. printk(KERN_ERR
  326. "DMA channel for %s is not available\n",
  327. dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  328. "playback" : "capture");
  329. return -EBUSY;
  330. }
  331. tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
  332. (unsigned long)dmadata);
  333. return 0;
  334. }
  335. static int txx9aclc_pcm_probe(struct snd_soc_component *component)
  336. {
  337. snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
  338. return 0;
  339. }
  340. static void txx9aclc_pcm_remove(struct snd_soc_component *component)
  341. {
  342. struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
  343. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  344. void __iomem *base = drvdata->base;
  345. int i;
  346. /* disable all FIFO DMAs */
  347. __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
  348. /* dummy R/W to clear pending DMAREQ if any */
  349. __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
  350. for (i = 0; i < 2; i++) {
  351. struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
  352. struct dma_chan *chan = dmadata->dma_chan;
  353. if (chan) {
  354. dmadata->frag_count = -1;
  355. dmaengine_terminate_all(chan);
  356. dma_release_channel(chan);
  357. }
  358. dev->dmadata[i].dma_chan = NULL;
  359. }
  360. }
  361. static const struct snd_soc_component_driver txx9aclc_soc_component = {
  362. .name = DRV_NAME,
  363. .probe = txx9aclc_pcm_probe,
  364. .remove = txx9aclc_pcm_remove,
  365. .ops = &txx9aclc_pcm_ops,
  366. .pcm_new = txx9aclc_pcm_new,
  367. };
  368. static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
  369. {
  370. return devm_snd_soc_register_component(&pdev->dev,
  371. &txx9aclc_soc_component, NULL, 0);
  372. }
  373. static struct platform_driver txx9aclc_pcm_driver = {
  374. .driver = {
  375. .name = "txx9aclc-pcm-audio",
  376. },
  377. .probe = txx9aclc_soc_platform_probe,
  378. };
  379. module_platform_driver(txx9aclc_pcm_driver);
  380. MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
  381. MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
  382. MODULE_LICENSE("GPL");