jobdesc.c 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * SEC Descriptor Construction Library
  4. * Basic job descriptor construction
  5. *
  6. * Copyright 2014 Freescale Semiconductor, Inc.
  7. *
  8. */
  9. #include <common.h>
  10. #include <fsl_sec.h>
  11. #include "desc_constr.h"
  12. #include "jobdesc.h"
  13. #include "rsa_caam.h"
  14. #if defined(CONFIG_MX6) || defined(CONFIG_MX7)
  15. /*!
  16. * Secure memory run command
  17. *
  18. * @param sec_mem_cmd Secure memory command register
  19. * @return cmd_status Secure memory command status register
  20. */
  21. uint32_t secmem_set_cmd(uint32_t sec_mem_cmd)
  22. {
  23. uint32_t temp_reg;
  24. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  25. uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid));
  26. uint32_t jr_id = 0;
  27. sec_out32(CAAM_SMCJR(sm_vid, jr_id), sec_mem_cmd);
  28. do {
  29. temp_reg = sec_in32(CAAM_SMCSJR(sm_vid, jr_id));
  30. } while (temp_reg & CMD_COMPLETE);
  31. return temp_reg;
  32. }
  33. /*!
  34. * CAAM page allocation:
  35. * Allocates a partition from secure memory, with the id
  36. * equal to partition_num. This will de-allocate the page
  37. * if it is already allocated. The partition will have
  38. * full access permissions. The permissions are set before,
  39. * running a job descriptor. A memory page of secure RAM
  40. * is allocated for the partition.
  41. *
  42. * @param page Number of the page to allocate.
  43. * @param partition Number of the partition to allocate.
  44. * @return 0 on success, ERROR_IN_PAGE_ALLOC otherwise
  45. */
  46. int caam_page_alloc(uint8_t page_num, uint8_t partition_num)
  47. {
  48. uint32_t temp_reg;
  49. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  50. uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid));
  51. uint32_t jr_id = 0;
  52. /*
  53. * De-Allocate partition_num if already allocated to ARM core
  54. */
  55. if (sec_in32(CAAM_SMPO_0) & PARTITION_OWNER(partition_num)) {
  56. temp_reg = secmem_set_cmd(PARTITION(partition_num) |
  57. CMD_PART_DEALLOC);
  58. if (temp_reg & SMCSJR_AERR) {
  59. printf("Error: De-allocation status 0x%X\n", temp_reg);
  60. return ERROR_IN_PAGE_ALLOC;
  61. }
  62. }
  63. /* set the access rights to allow full access */
  64. sec_out32(CAAM_SMAG1JR(sm_vid, jr_id, partition_num), 0xF);
  65. sec_out32(CAAM_SMAG2JR(sm_vid, jr_id, partition_num), 0xF);
  66. sec_out32(CAAM_SMAPJR(sm_vid, jr_id, partition_num), 0xFF);
  67. /* Now need to allocate partition_num of secure RAM. */
  68. /* De-Allocate page_num by starting with a page inquiry command */
  69. temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_INQUIRY);
  70. /* if the page is owned, de-allocate it */
  71. if ((temp_reg & SMCSJR_PO) == PAGE_OWNED) {
  72. temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_PAGE_DEALLOC);
  73. if (temp_reg & SMCSJR_AERR) {
  74. printf("Error: Allocation status 0x%X\n", temp_reg);
  75. return ERROR_IN_PAGE_ALLOC;
  76. }
  77. }
  78. /* Allocate page_num to partition_num */
  79. temp_reg = secmem_set_cmd(PAGE(page_num) | PARTITION(partition_num)
  80. | CMD_PAGE_ALLOC);
  81. if (temp_reg & SMCSJR_AERR) {
  82. printf("Error: Allocation status 0x%X\n", temp_reg);
  83. return ERROR_IN_PAGE_ALLOC;
  84. }
  85. /* page inquiry command to ensure that the page was allocated */
  86. temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_INQUIRY);
  87. /* if the page is not owned => problem */
  88. if ((temp_reg & SMCSJR_PO) != PAGE_OWNED) {
  89. printf("Allocation of page %d in partition %d failed 0x%X\n",
  90. temp_reg, page_num, partition_num);
  91. return ERROR_IN_PAGE_ALLOC;
  92. }
  93. return 0;
  94. }
  95. int inline_cnstr_jobdesc_blob_dek(uint32_t *desc, const uint8_t *plain_txt,
  96. uint8_t *dek_blob, uint32_t in_sz)
  97. {
  98. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  99. uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid));
  100. uint32_t jr_id = 0;
  101. uint32_t ret = 0;
  102. u32 aad_w1, aad_w2;
  103. /* output blob will have 32 bytes key blob in beginning and
  104. * 16 byte HMAC identifier at end of data blob */
  105. uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE;
  106. /* Setting HDR for blob */
  107. uint8_t wrapped_key_hdr[8] = {HDR_TAG, 0x00, WRP_HDR_SIZE + out_sz,
  108. HDR_PAR, HAB_MOD, HAB_ALG, in_sz, HAB_FLG};
  109. /* initialize the blob array */
  110. memset(dek_blob, 0, out_sz + 8);
  111. /* Copy the header into the DEK blob buffer */
  112. memcpy(dek_blob, wrapped_key_hdr, sizeof(wrapped_key_hdr));
  113. /* allocating secure memory */
  114. ret = caam_page_alloc(PAGE_1, PARTITION_1);
  115. if (ret)
  116. return ret;
  117. /* Write DEK to secure memory */
  118. memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz);
  119. unsigned long start = (unsigned long)SEC_MEM_PAGE1 &
  120. ~(ARCH_DMA_MINALIGN - 1);
  121. unsigned long end = ALIGN(start + 0x1000, ARCH_DMA_MINALIGN);
  122. flush_dcache_range(start, end);
  123. /* Now configure the access rights of the partition */
  124. sec_out32(CAAM_SMAG1JR(sm_vid, jr_id, PARTITION_1), KS_G1);
  125. sec_out32(CAAM_SMAG2JR(sm_vid, jr_id, PARTITION_1), 0);
  126. sec_out32(CAAM_SMAPJR(sm_vid, jr_id, PARTITION_1), PERM);
  127. /* construct aad for AES */
  128. aad_w1 = (in_sz << OP_ALG_ALGSEL_SHIFT) | KEY_AES_SRC | LD_CCM_MODE;
  129. aad_w2 = 0x0;
  130. init_job_desc(desc, 0);
  131. append_cmd(desc, CMD_LOAD | CLASS_2 | KEY_IMM | KEY_ENC |
  132. (0x0c << LDST_OFFSET_SHIFT) | 0x08);
  133. append_u32(desc, aad_w1);
  134. append_u32(desc, aad_w2);
  135. append_cmd_ptr(desc, (dma_addr_t)SEC_MEM_PAGE1, in_sz, CMD_SEQ_IN_PTR);
  136. append_cmd_ptr(desc, (dma_addr_t)dek_blob + 8, out_sz, CMD_SEQ_OUT_PTR);
  137. append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB |
  138. OP_PCLID_SECMEM);
  139. return ret;
  140. }
  141. #endif
  142. void inline_cnstr_jobdesc_hash(uint32_t *desc,
  143. const uint8_t *msg, uint32_t msgsz, uint8_t *digest,
  144. u32 alg_type, uint32_t alg_size, int sg_tbl)
  145. {
  146. /* SHA 256 , output is of length 32 words */
  147. uint32_t storelen = alg_size;
  148. u32 options;
  149. dma_addr_t dma_addr_in, dma_addr_out;
  150. dma_addr_in = virt_to_phys((void *)msg);
  151. dma_addr_out = virt_to_phys((void *)digest);
  152. init_job_desc(desc, 0);
  153. append_operation(desc, OP_TYPE_CLASS2_ALG |
  154. OP_ALG_AAI_HASH | OP_ALG_AS_INITFINAL |
  155. OP_ALG_ENCRYPT | OP_ALG_ICV_OFF | alg_type);
  156. options = LDST_CLASS_2_CCB | FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST2;
  157. if (sg_tbl)
  158. options |= FIFOLDST_SGF;
  159. if (msgsz > 0xffff) {
  160. options |= FIFOLDST_EXT;
  161. append_fifo_load(desc, dma_addr_in, 0, options);
  162. append_cmd(desc, msgsz);
  163. } else {
  164. append_fifo_load(desc, dma_addr_in, msgsz, options);
  165. }
  166. append_store(desc, dma_addr_out, storelen,
  167. LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_CONTEXT);
  168. }
  169. #ifndef CONFIG_SPL_BUILD
  170. void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr,
  171. uint8_t *plain_txt, uint8_t *enc_blob,
  172. uint32_t in_sz)
  173. {
  174. dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out;
  175. uint32_t key_sz = KEY_IDNFR_SZ_BYTES;
  176. /* output blob will have 32 bytes key blob in beginning and
  177. * 16 byte HMAC identifier at end of data blob */
  178. uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE;
  179. dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr);
  180. dma_addr_in = virt_to_phys((void *)plain_txt);
  181. dma_addr_out = virt_to_phys((void *)enc_blob);
  182. init_job_desc(desc, 0);
  183. append_key(desc, dma_addr_key_idnfr, key_sz, CLASS_2);
  184. append_seq_in_ptr(desc, dma_addr_in, in_sz, 0);
  185. append_seq_out_ptr(desc, dma_addr_out, out_sz, 0);
  186. append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB);
  187. }
  188. void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr,
  189. uint8_t *enc_blob, uint8_t *plain_txt,
  190. uint32_t out_sz)
  191. {
  192. dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out;
  193. uint32_t key_sz = KEY_IDNFR_SZ_BYTES;
  194. uint32_t in_sz = out_sz + KEY_BLOB_SIZE + MAC_SIZE;
  195. dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr);
  196. dma_addr_in = virt_to_phys((void *)enc_blob);
  197. dma_addr_out = virt_to_phys((void *)plain_txt);
  198. init_job_desc(desc, 0);
  199. append_key(desc, dma_addr_key_idnfr, key_sz, CLASS_2);
  200. append_seq_in_ptr(desc, dma_addr_in, in_sz, 0);
  201. append_seq_out_ptr(desc, dma_addr_out, out_sz, 0);
  202. append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB);
  203. }
  204. #endif
  205. /*
  206. * Descriptor to instantiate RNG State Handle 0 in normal mode and
  207. * load the JDKEK, TDKEK and TDSK registers
  208. */
  209. void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc, int handle)
  210. {
  211. u32 *jump_cmd;
  212. init_job_desc(desc, 0);
  213. /* INIT RNG in non-test mode */
  214. append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  215. (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT);
  216. /* For SH0, Secure Keys must be generated as well */
  217. if (handle == 0) {
  218. /* wait for done */
  219. jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
  220. set_jump_tgt_here(desc, jump_cmd);
  221. /*
  222. * load 1 to clear written reg:
  223. * resets the done interrupt and returns the RNG to idle.
  224. */
  225. append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
  226. /* generate secure keys (non-test) */
  227. append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  228. OP_ALG_RNG4_SK);
  229. }
  230. }
  231. /* Change key size to bytes form bits in calling function*/
  232. void inline_cnstr_jobdesc_pkha_rsaexp(uint32_t *desc,
  233. struct pk_in_params *pkin, uint8_t *out,
  234. uint32_t out_siz)
  235. {
  236. dma_addr_t dma_addr_e, dma_addr_a, dma_addr_n, dma_addr_out;
  237. dma_addr_e = virt_to_phys((void *)pkin->e);
  238. dma_addr_a = virt_to_phys((void *)pkin->a);
  239. dma_addr_n = virt_to_phys((void *)pkin->n);
  240. dma_addr_out = virt_to_phys((void *)out);
  241. init_job_desc(desc, 0);
  242. append_key(desc, dma_addr_e, pkin->e_siz, KEY_DEST_PKHA_E | CLASS_1);
  243. append_fifo_load(desc, dma_addr_a,
  244. pkin->a_siz, LDST_CLASS_1_CCB | FIFOLD_TYPE_PK_A);
  245. append_fifo_load(desc, dma_addr_n,
  246. pkin->n_siz, LDST_CLASS_1_CCB | FIFOLD_TYPE_PK_N);
  247. append_operation(desc, OP_TYPE_PK | OP_ALG_PK | OP_ALG_PKMODE_MOD_EXPO);
  248. append_fifo_store(desc, dma_addr_out, out_siz,
  249. LDST_CLASS_1_CCB | FIFOST_TYPE_PKHA_B);
  250. }