bcm6368-usbh-phy.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
  4. *
  5. * Derived from linux/arch/mips/bcm63xx/usb-common.c:
  6. * Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
  7. * Copyright 2013 Florian Fainelli <florian@openwrt.org>
  8. */
  9. #include <common.h>
  10. #include <clk.h>
  11. #include <dm.h>
  12. #include <generic-phy.h>
  13. #include <power-domain.h>
  14. #include <reset.h>
  15. #include <asm/io.h>
  16. #include <dm/device.h>
  17. /* USBH PLL Control register */
  18. #define USBH_PLL_REG 0x18
  19. #define USBH_PLL_IDDQ_PWRDN BIT(9)
  20. #define USBH_PLL_PWRDN_DELAY BIT(10)
  21. /* USBH Swap Control register */
  22. #define USBH_SWAP_REG 0x1c
  23. #define USBH_SWAP_OHCI_DATA BIT(0)
  24. #define USBH_SWAP_OHCI_ENDIAN BIT(1)
  25. #define USBH_SWAP_EHCI_DATA BIT(3)
  26. #define USBH_SWAP_EHCI_ENDIAN BIT(4)
  27. /* USBH Setup register */
  28. #define USBH_SETUP_REG 0x28
  29. #define USBH_SETUP_IOC BIT(4)
  30. #define USBH_SETUP_IPP BIT(5)
  31. struct bcm6368_usbh_hw {
  32. uint32_t setup_clr;
  33. uint32_t pll_clr;
  34. };
  35. struct bcm6368_usbh_priv {
  36. const struct bcm6368_usbh_hw *hw;
  37. void __iomem *regs;
  38. };
  39. static int bcm6368_usbh_init(struct phy *phy)
  40. {
  41. struct bcm6368_usbh_priv *priv = dev_get_priv(phy->dev);
  42. const struct bcm6368_usbh_hw *hw = priv->hw;
  43. /* configure to work in native cpu endian */
  44. clrsetbits_be32(priv->regs + USBH_SWAP_REG,
  45. USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
  46. USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
  47. /* setup config */
  48. if (hw->setup_clr)
  49. clrbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_clr);
  50. setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC);
  51. /* enable pll control */
  52. if (hw->pll_clr)
  53. clrbits_be32(priv->regs + USBH_PLL_REG, hw->pll_clr);
  54. return 0;
  55. }
  56. static struct phy_ops bcm6368_usbh_ops = {
  57. .init = bcm6368_usbh_init,
  58. };
  59. static const struct bcm6368_usbh_hw bcm6328_hw = {
  60. .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
  61. .setup_clr = 0,
  62. };
  63. static const struct bcm6368_usbh_hw bcm6362_hw = {
  64. .pll_clr = 0,
  65. .setup_clr = 0,
  66. };
  67. static const struct bcm6368_usbh_hw bcm6368_hw = {
  68. .pll_clr = 0,
  69. .setup_clr = 0,
  70. };
  71. static const struct bcm6368_usbh_hw bcm63268_hw = {
  72. .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
  73. .setup_clr = USBH_SETUP_IPP,
  74. };
  75. static const struct udevice_id bcm6368_usbh_ids[] = {
  76. {
  77. .compatible = "brcm,bcm6328-usbh",
  78. .data = (ulong)&bcm6328_hw,
  79. }, {
  80. .compatible = "brcm,bcm6362-usbh",
  81. .data = (ulong)&bcm6362_hw,
  82. }, {
  83. .compatible = "brcm,bcm6368-usbh",
  84. .data = (ulong)&bcm6368_hw,
  85. }, {
  86. .compatible = "brcm,bcm63268-usbh",
  87. .data = (ulong)&bcm63268_hw,
  88. }, { /* sentinel */ }
  89. };
  90. static int bcm6368_usbh_probe(struct udevice *dev)
  91. {
  92. struct bcm6368_usbh_priv *priv = dev_get_priv(dev);
  93. const struct bcm6368_usbh_hw *hw =
  94. (const struct bcm6368_usbh_hw *)dev_get_driver_data(dev);
  95. #if defined(CONFIG_POWER_DOMAIN)
  96. struct power_domain pwr_dom;
  97. #endif
  98. struct reset_ctl rst_ctl;
  99. struct clk clk;
  100. int ret;
  101. priv->regs = dev_remap_addr(dev);
  102. if (!priv->regs)
  103. return -EINVAL;
  104. priv->hw = hw;
  105. /* enable usbh clock */
  106. ret = clk_get_by_name(dev, "usbh", &clk);
  107. if (ret < 0)
  108. return ret;
  109. ret = clk_enable(&clk);
  110. if (ret < 0)
  111. return ret;
  112. ret = clk_free(&clk);
  113. if (ret < 0)
  114. return ret;
  115. #if defined(CONFIG_POWER_DOMAIN)
  116. /* enable power domain */
  117. ret = power_domain_get(dev, &pwr_dom);
  118. if (ret < 0)
  119. return ret;
  120. ret = power_domain_on(&pwr_dom);
  121. if (ret < 0)
  122. return ret;
  123. ret = power_domain_free(&pwr_dom);
  124. if (ret < 0)
  125. return ret;
  126. #endif
  127. /* perform reset */
  128. ret = reset_get_by_index(dev, 0, &rst_ctl);
  129. if (ret < 0)
  130. return ret;
  131. ret = reset_deassert(&rst_ctl);
  132. if (ret < 0)
  133. return ret;
  134. ret = reset_free(&rst_ctl);
  135. if (ret < 0)
  136. return ret;
  137. /* enable usb_ref clock */
  138. ret = clk_get_by_name(dev, "usb_ref", &clk);
  139. if (!ret) {
  140. ret = clk_enable(&clk);
  141. if (ret < 0)
  142. return ret;
  143. ret = clk_free(&clk);
  144. if (ret < 0)
  145. return ret;
  146. }
  147. mdelay(100);
  148. return 0;
  149. }
  150. U_BOOT_DRIVER(bcm6368_usbh) = {
  151. .name = "bcm6368-usbh",
  152. .id = UCLASS_PHY,
  153. .of_match = bcm6368_usbh_ids,
  154. .ops = &bcm6368_usbh_ops,
  155. .priv_auto_alloc_size = sizeof(struct bcm6368_usbh_priv),
  156. .probe = bcm6368_usbh_probe,
  157. };