writing_musb_glue_layer.rst 26 KB

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  1. =========================
  2. Writing a MUSB Glue Layer
  3. =========================
  4. :Author: Apelete Seketeli
  5. Introduction
  6. ============
  7. The Linux MUSB subsystem is part of the larger Linux USB subsystem. It
  8. provides support for embedded USB Device Controllers (UDC) that do not
  9. use Universal Host Controller Interface (UHCI) or Open Host Controller
  10. Interface (OHCI).
  11. Instead, these embedded UDC rely on the USB On-the-Go (OTG)
  12. specification which they implement at least partially. The silicon
  13. reference design used in most cases is the Multipoint USB Highspeed
  14. Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™
  15. design.
  16. As a self-taught exercise I have written an MUSB glue layer for the
  17. Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the
  18. kernel source tree. This layer can be found at
  19. ``drivers/usb/musb/jz4740.c``. In this documentation I will walk through the
  20. basics of the ``jz4740.c`` glue layer, explaining the different pieces and
  21. what needs to be done in order to write your own device glue layer.
  22. .. _musb-basics:
  23. Linux MUSB Basics
  24. =================
  25. To get started on the topic, please read USB On-the-Go Basics (see
  26. Resources) which provides an introduction of USB OTG operation at the
  27. hardware level. A couple of wiki pages by Texas Instruments and Analog
  28. Devices also provide an overview of the Linux kernel MUSB configuration,
  29. albeit focused on some specific devices provided by these companies.
  30. Finally, getting acquainted with the USB specification at USB home page
  31. may come in handy, with practical instance provided through the Writing
  32. USB Device Drivers documentation (again, see Resources).
  33. Linux USB stack is a layered architecture in which the MUSB controller
  34. hardware sits at the lowest. The MUSB controller driver abstract the
  35. MUSB controller hardware to the Linux USB stack::
  36. ------------------------
  37. | | <------- drivers/usb/gadget
  38. | Linux USB Core Stack | <------- drivers/usb/host
  39. | | <------- drivers/usb/core
  40. ------------------------
  41. --------------------------
  42. | | <------ drivers/usb/musb/musb_gadget.c
  43. | MUSB Controller driver | <------ drivers/usb/musb/musb_host.c
  44. | | <------ drivers/usb/musb/musb_core.c
  45. --------------------------
  46. ---------------------------------
  47. | MUSB Platform Specific Driver |
  48. | | <-- drivers/usb/musb/jz4740.c
  49. | aka "Glue Layer" |
  50. ---------------------------------
  51. ---------------------------------
  52. | MUSB Controller Hardware |
  53. ---------------------------------
  54. As outlined above, the glue layer is actually the platform specific code
  55. sitting in between the controller driver and the controller hardware.
  56. Just like a Linux USB driver needs to register itself with the Linux USB
  57. subsystem, the MUSB glue layer needs first to register itself with the
  58. MUSB controller driver. This will allow the controller driver to know
  59. about which device the glue layer supports and which functions to call
  60. when a supported device is detected or released; remember we are talking
  61. about an embedded controller chip here, so no insertion or removal at
  62. run-time.
  63. All of this information is passed to the MUSB controller driver through
  64. a :c:type:`platform_driver` structure defined in the glue layer as::
  65. static struct platform_driver jz4740_driver = {
  66. .probe = jz4740_probe,
  67. .remove = jz4740_remove,
  68. .driver = {
  69. .name = "musb-jz4740",
  70. },
  71. };
  72. The probe and remove function pointers are called when a matching device
  73. is detected and, respectively, released. The name string describes the
  74. device supported by this glue layer. In the current case it matches a
  75. platform_device structure declared in ``arch/mips/jz4740/platform.c``. Note
  76. that we are not using device tree bindings here.
  77. In order to register itself to the controller driver, the glue layer
  78. goes through a few steps, basically allocating the controller hardware
  79. resources and initialising a couple of circuits. To do so, it needs to
  80. keep track of the information used throughout these steps. This is done
  81. by defining a private ``jz4740_glue`` structure::
  82. struct jz4740_glue {
  83. struct device *dev;
  84. struct platform_device *musb;
  85. struct clk *clk;
  86. };
  87. The dev and musb members are both device structure variables. The first
  88. one holds generic information about the device, since it's the basic
  89. device structure, and the latter holds information more closely related
  90. to the subsystem the device is registered to. The clk variable keeps
  91. information related to the device clock operation.
  92. Let's go through the steps of the probe function that leads the glue
  93. layer to register itself to the controller driver.
  94. .. note::
  95. For the sake of readability each function will be split in logical
  96. parts, each part being shown as if it was independent from the others.
  97. .. code-block:: c
  98. :emphasize-lines: 8,12,18
  99. static int jz4740_probe(struct platform_device *pdev)
  100. {
  101. struct platform_device *musb;
  102. struct jz4740_glue *glue;
  103. struct clk *clk;
  104. int ret;
  105. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  106. if (!glue)
  107. return -ENOMEM;
  108. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  109. if (!musb) {
  110. dev_err(&pdev->dev, "failed to allocate musb device\n");
  111. return -ENOMEM;
  112. }
  113. clk = devm_clk_get(&pdev->dev, "udc");
  114. if (IS_ERR(clk)) {
  115. dev_err(&pdev->dev, "failed to get clock\n");
  116. ret = PTR_ERR(clk);
  117. goto err_platform_device_put;
  118. }
  119. ret = clk_prepare_enable(clk);
  120. if (ret) {
  121. dev_err(&pdev->dev, "failed to enable clock\n");
  122. goto err_platform_device_put;
  123. }
  124. musb->dev.parent = &pdev->dev;
  125. glue->dev = &pdev->dev;
  126. glue->musb = musb;
  127. glue->clk = clk;
  128. return 0;
  129. err_platform_device_put:
  130. platform_device_put(musb);
  131. return ret;
  132. }
  133. The first few lines of the probe function allocate and assign the glue,
  134. musb and clk variables. The ``GFP_KERNEL`` flag (line 8) allows the
  135. allocation process to sleep and wait for memory, thus being usable in a
  136. locking situation. The ``PLATFORM_DEVID_AUTO`` flag (line 12) allows
  137. automatic allocation and management of device IDs in order to avoid
  138. device namespace collisions with explicit IDs. With :c:func:`devm_clk_get`
  139. (line 18) the glue layer allocates the clock -- the ``devm_`` prefix
  140. indicates that :c:func:`clk_get` is managed: it automatically frees the
  141. allocated clock resource data when the device is released -- and enable
  142. it.
  143. Then comes the registration steps:
  144. .. code-block:: c
  145. :emphasize-lines: 3,5,7,9,16
  146. static int jz4740_probe(struct platform_device *pdev)
  147. {
  148. struct musb_hdrc_platform_data *pdata = &jz4740_musb_platform_data;
  149. pdata->platform_ops = &jz4740_musb_ops;
  150. platform_set_drvdata(pdev, glue);
  151. ret = platform_device_add_resources(musb, pdev->resource,
  152. pdev->num_resources);
  153. if (ret) {
  154. dev_err(&pdev->dev, "failed to add resources\n");
  155. goto err_clk_disable;
  156. }
  157. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  158. if (ret) {
  159. dev_err(&pdev->dev, "failed to add platform_data\n");
  160. goto err_clk_disable;
  161. }
  162. return 0;
  163. err_clk_disable:
  164. clk_disable_unprepare(clk);
  165. err_platform_device_put:
  166. platform_device_put(musb);
  167. return ret;
  168. }
  169. The first step is to pass the device data privately held by the glue
  170. layer on to the controller driver through :c:func:`platform_set_drvdata`
  171. (line 7). Next is passing on the device resources information, also privately
  172. held at that point, through :c:func:`platform_device_add_resources` (line 9).
  173. Finally comes passing on the platform specific data to the controller
  174. driver (line 16). Platform data will be discussed in
  175. :ref:`musb-dev-platform-data`, but here we are looking at the
  176. ``platform_ops`` function pointer (line 5) in ``musb_hdrc_platform_data``
  177. structure (line 3). This function pointer allows the MUSB controller
  178. driver to know which function to call for device operation::
  179. static const struct musb_platform_ops jz4740_musb_ops = {
  180. .init = jz4740_musb_init,
  181. .exit = jz4740_musb_exit,
  182. };
  183. Here we have the minimal case where only init and exit functions are
  184. called by the controller driver when needed. Fact is the JZ4740 MUSB
  185. controller is a basic controller, lacking some features found in other
  186. controllers, otherwise we may also have pointers to a few other
  187. functions like a power management function or a function to switch
  188. between OTG and non-OTG modes, for instance.
  189. At that point of the registration process, the controller driver
  190. actually calls the init function:
  191. .. code-block:: c
  192. :emphasize-lines: 12,14
  193. static int jz4740_musb_init(struct musb *musb)
  194. {
  195. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  196. if (!musb->xceiv) {
  197. pr_err("HS UDC: no transceiver configured\n");
  198. return -ENODEV;
  199. }
  200. /* Silicon does not implement ConfigData register.
  201. * Set dyn_fifo to avoid reading EP config from hardware.
  202. */
  203. musb->dyn_fifo = true;
  204. musb->isr = jz4740_musb_interrupt;
  205. return 0;
  206. }
  207. The goal of ``jz4740_musb_init()`` is to get hold of the transceiver
  208. driver data of the MUSB controller hardware and pass it on to the MUSB
  209. controller driver, as usual. The transceiver is the circuitry inside the
  210. controller hardware responsible for sending/receiving the USB data.
  211. Since it is an implementation of the physical layer of the OSI model,
  212. the transceiver is also referred to as PHY.
  213. Getting hold of the ``MUSB PHY`` driver data is done with ``usb_get_phy()``
  214. which returns a pointer to the structure containing the driver instance
  215. data. The next couple of instructions (line 12 and 14) are used as a
  216. quirk and to setup IRQ handling respectively. Quirks and IRQ handling
  217. will be discussed later in :ref:`musb-dev-quirks` and
  218. :ref:`musb-handling-irqs`\ ::
  219. static int jz4740_musb_exit(struct musb *musb)
  220. {
  221. usb_put_phy(musb->xceiv);
  222. return 0;
  223. }
  224. Acting as the counterpart of init, the exit function releases the MUSB
  225. PHY driver when the controller hardware itself is about to be released.
  226. Again, note that init and exit are fairly simple in this case due to the
  227. basic set of features of the JZ4740 controller hardware. When writing an
  228. musb glue layer for a more complex controller hardware, you might need
  229. to take care of more processing in those two functions.
  230. Returning from the init function, the MUSB controller driver jumps back
  231. into the probe function::
  232. static int jz4740_probe(struct platform_device *pdev)
  233. {
  234. ret = platform_device_add(musb);
  235. if (ret) {
  236. dev_err(&pdev->dev, "failed to register musb device\n");
  237. goto err_clk_disable;
  238. }
  239. return 0;
  240. err_clk_disable:
  241. clk_disable_unprepare(clk);
  242. err_platform_device_put:
  243. platform_device_put(musb);
  244. return ret;
  245. }
  246. This is the last part of the device registration process where the glue
  247. layer adds the controller hardware device to Linux kernel device
  248. hierarchy: at this stage, all known information about the device is
  249. passed on to the Linux USB core stack:
  250. .. code-block:: c
  251. :emphasize-lines: 5,6
  252. static int jz4740_remove(struct platform_device *pdev)
  253. {
  254. struct jz4740_glue *glue = platform_get_drvdata(pdev);
  255. platform_device_unregister(glue->musb);
  256. clk_disable_unprepare(glue->clk);
  257. return 0;
  258. }
  259. Acting as the counterpart of probe, the remove function unregister the
  260. MUSB controller hardware (line 5) and disable the clock (line 6),
  261. allowing it to be gated.
  262. .. _musb-handling-irqs:
  263. Handling IRQs
  264. =============
  265. Additionally to the MUSB controller hardware basic setup and
  266. registration, the glue layer is also responsible for handling the IRQs:
  267. .. code-block:: c
  268. :emphasize-lines: 7,9-11,14,24
  269. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  270. {
  271. unsigned long flags;
  272. irqreturn_t retval = IRQ_NONE;
  273. struct musb *musb = __hci;
  274. spin_lock_irqsave(&musb->lock, flags);
  275. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  276. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  277. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  278. /*
  279. * The controller is gadget only, the state of the host mode IRQ bits is
  280. * undefined. Mask them to make sure that the musb driver core will
  281. * never see them set
  282. */
  283. musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  284. MUSB_INTR_RESET | MUSB_INTR_SOF;
  285. if (musb->int_usb || musb->int_tx || musb->int_rx)
  286. retval = musb_interrupt(musb);
  287. spin_unlock_irqrestore(&musb->lock, flags);
  288. return retval;
  289. }
  290. Here the glue layer mostly has to read the relevant hardware registers
  291. and pass their values on to the controller driver which will handle the
  292. actual event that triggered the IRQ.
  293. The interrupt handler critical section is protected by the
  294. :c:func:`spin_lock_irqsave` and counterpart :c:func:`spin_unlock_irqrestore`
  295. functions (line 7 and 24 respectively), which prevent the interrupt
  296. handler code to be run by two different threads at the same time.
  297. Then the relevant interrupt registers are read (line 9 to 11):
  298. - ``MUSB_INTRUSB``: indicates which USB interrupts are currently active,
  299. - ``MUSB_INTRTX``: indicates which of the interrupts for TX endpoints are
  300. currently active,
  301. - ``MUSB_INTRRX``: indicates which of the interrupts for TX endpoints are
  302. currently active.
  303. Note that :c:func:`musb_readb` is used to read 8-bit registers at most, while
  304. :c:func:`musb_readw` allows us to read at most 16-bit registers. There are
  305. other functions that can be used depending on the size of your device
  306. registers. See ``musb_io.h`` for more information.
  307. Instruction on line 18 is another quirk specific to the JZ4740 USB
  308. device controller, which will be discussed later in :ref:`musb-dev-quirks`.
  309. The glue layer still needs to register the IRQ handler though. Remember
  310. the instruction on line 14 of the init function::
  311. static int jz4740_musb_init(struct musb *musb)
  312. {
  313. musb->isr = jz4740_musb_interrupt;
  314. return 0;
  315. }
  316. This instruction sets a pointer to the glue layer IRQ handler function,
  317. in order for the controller hardware to call the handler back when an
  318. IRQ comes from the controller hardware. The interrupt handler is now
  319. implemented and registered.
  320. .. _musb-dev-platform-data:
  321. Device Platform Data
  322. ====================
  323. In order to write an MUSB glue layer, you need to have some data
  324. describing the hardware capabilities of your controller hardware, which
  325. is called the platform data.
  326. Platform data is specific to your hardware, though it may cover a broad
  327. range of devices, and is generally found somewhere in the ``arch/``
  328. directory, depending on your device architecture.
  329. For instance, platform data for the JZ4740 SoC is found in
  330. ``arch/mips/jz4740/platform.c``. In the ``platform.c`` file each device of the
  331. JZ4740 SoC is described through a set of structures.
  332. Here is the part of ``arch/mips/jz4740/platform.c`` that covers the USB
  333. Device Controller (UDC):
  334. .. code-block:: c
  335. :emphasize-lines: 2,7,14-17,21,22,25,26,28,29
  336. /* USB Device Controller */
  337. struct platform_device jz4740_udc_xceiv_device = {
  338. .name = "usb_phy_gen_xceiv",
  339. .id = 0,
  340. };
  341. static struct resource jz4740_udc_resources[] = {
  342. [0] = {
  343. .start = JZ4740_UDC_BASE_ADDR,
  344. .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
  345. .flags = IORESOURCE_MEM,
  346. },
  347. [1] = {
  348. .start = JZ4740_IRQ_UDC,
  349. .end = JZ4740_IRQ_UDC,
  350. .flags = IORESOURCE_IRQ,
  351. .name = "mc",
  352. },
  353. };
  354. struct platform_device jz4740_udc_device = {
  355. .name = "musb-jz4740",
  356. .id = -1,
  357. .dev = {
  358. .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask,
  359. .coherent_dma_mask = DMA_BIT_MASK(32),
  360. },
  361. .num_resources = ARRAY_SIZE(jz4740_udc_resources),
  362. .resource = jz4740_udc_resources,
  363. };
  364. The ``jz4740_udc_xceiv_device`` platform device structure (line 2)
  365. describes the UDC transceiver with a name and id number.
  366. At the time of this writing, note that ``usb_phy_gen_xceiv`` is the
  367. specific name to be used for all transceivers that are either built-in
  368. with reference USB IP or autonomous and doesn't require any PHY
  369. programming. You will need to set ``CONFIG_NOP_USB_XCEIV=y`` in the
  370. kernel configuration to make use of the corresponding transceiver
  371. driver. The id field could be set to -1 (equivalent to
  372. ``PLATFORM_DEVID_NONE``), -2 (equivalent to ``PLATFORM_DEVID_AUTO``) or
  373. start with 0 for the first device of this kind if we want a specific id
  374. number.
  375. The ``jz4740_udc_resources`` resource structure (line 7) defines the UDC
  376. registers base addresses.
  377. The first array (line 9 to 11) defines the UDC registers base memory
  378. addresses: start points to the first register memory address, end points
  379. to the last register memory address and the flags member defines the
  380. type of resource we are dealing with. So ``IORESOURCE_MEM`` is used to
  381. define the registers memory addresses. The second array (line 14 to 17)
  382. defines the UDC IRQ registers addresses. Since there is only one IRQ
  383. register available for the JZ4740 UDC, start and end point at the same
  384. address. The ``IORESOURCE_IRQ`` flag tells that we are dealing with IRQ
  385. resources, and the name ``mc`` is in fact hard-coded in the MUSB core in
  386. order for the controller driver to retrieve this IRQ resource by
  387. querying it by its name.
  388. Finally, the ``jz4740_udc_device`` platform device structure (line 21)
  389. describes the UDC itself.
  390. The ``musb-jz4740`` name (line 22) defines the MUSB driver that is used
  391. for this device; remember this is in fact the name that we used in the
  392. ``jz4740_driver`` platform driver structure in :ref:`musb-basics`.
  393. The id field (line 23) is set to -1 (equivalent to ``PLATFORM_DEVID_NONE``)
  394. since we do not need an id for the device: the MUSB controller driver was
  395. already set to allocate an automatic id in :ref:`musb-basics`. In the dev field
  396. we care for DMA related information here. The ``dma_mask`` field (line 25)
  397. defines the width of the DMA mask that is going to be used, and
  398. ``coherent_dma_mask`` (line 26) has the same purpose but for the
  399. ``alloc_coherent`` DMA mappings: in both cases we are using a 32 bits mask.
  400. Then the resource field (line 29) is simply a pointer to the resource
  401. structure defined before, while the ``num_resources`` field (line 28) keeps
  402. track of the number of arrays defined in the resource structure (in this
  403. case there were two resource arrays defined before).
  404. With this quick overview of the UDC platform data at the ``arch/`` level now
  405. done, let's get back to the MUSB glue layer specific platform data in
  406. ``drivers/usb/musb/jz4740.c``:
  407. .. code-block:: c
  408. :emphasize-lines: 3,5,7-9,11
  409. static struct musb_hdrc_config jz4740_musb_config = {
  410. /* Silicon does not implement USB OTG. */
  411. .multipoint = 0,
  412. /* Max EPs scanned, driver will decide which EP can be used. */
  413. .num_eps = 4,
  414. /* RAMbits needed to configure EPs from table */
  415. .ram_bits = 9,
  416. .fifo_cfg = jz4740_musb_fifo_cfg,
  417. .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg),
  418. };
  419. static struct musb_hdrc_platform_data jz4740_musb_platform_data = {
  420. .mode = MUSB_PERIPHERAL,
  421. .config = &jz4740_musb_config,
  422. };
  423. First the glue layer configures some aspects of the controller driver
  424. operation related to the controller hardware specifics. This is done
  425. through the ``jz4740_musb_config`` :c:type:`musb_hdrc_config` structure.
  426. Defining the OTG capability of the controller hardware, the multipoint
  427. member (line 3) is set to 0 (equivalent to false) since the JZ4740 UDC
  428. is not OTG compatible. Then ``num_eps`` (line 5) defines the number of USB
  429. endpoints of the controller hardware, including endpoint 0: here we have
  430. 3 endpoints + endpoint 0. Next is ``ram_bits`` (line 7) which is the width
  431. of the RAM address bus for the MUSB controller hardware. This
  432. information is needed when the controller driver cannot automatically
  433. configure endpoints by reading the relevant controller hardware
  434. registers. This issue will be discussed when we get to device quirks in
  435. :ref:`musb-dev-quirks`. Last two fields (line 8 and 9) are also
  436. about device quirks: ``fifo_cfg`` points to the USB endpoints configuration
  437. table and ``fifo_cfg_size`` keeps track of the size of the number of
  438. entries in that configuration table. More on that later in
  439. :ref:`musb-dev-quirks`.
  440. Then this configuration is embedded inside ``jz4740_musb_platform_data``
  441. :c:type:`musb_hdrc_platform_data` structure (line 11): config is a pointer to
  442. the configuration structure itself, and mode tells the controller driver
  443. if the controller hardware may be used as ``MUSB_HOST`` only,
  444. ``MUSB_PERIPHERAL`` only or ``MUSB_OTG`` which is a dual mode.
  445. Remember that ``jz4740_musb_platform_data`` is then used to convey
  446. platform data information as we have seen in the probe function in
  447. :ref:`musb-basics`.
  448. .. _musb-dev-quirks:
  449. Device Quirks
  450. =============
  451. Completing the platform data specific to your device, you may also need
  452. to write some code in the glue layer to work around some device specific
  453. limitations. These quirks may be due to some hardware bugs, or simply be
  454. the result of an incomplete implementation of the USB On-the-Go
  455. specification.
  456. The JZ4740 UDC exhibits such quirks, some of which we will discuss here
  457. for the sake of insight even though these might not be found in the
  458. controller hardware you are working on.
  459. Let's get back to the init function first:
  460. .. code-block:: c
  461. :emphasize-lines: 12
  462. static int jz4740_musb_init(struct musb *musb)
  463. {
  464. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  465. if (!musb->xceiv) {
  466. pr_err("HS UDC: no transceiver configured\n");
  467. return -ENODEV;
  468. }
  469. /* Silicon does not implement ConfigData register.
  470. * Set dyn_fifo to avoid reading EP config from hardware.
  471. */
  472. musb->dyn_fifo = true;
  473. musb->isr = jz4740_musb_interrupt;
  474. return 0;
  475. }
  476. Instruction on line 12 helps the MUSB controller driver to work around
  477. the fact that the controller hardware is missing registers that are used
  478. for USB endpoints configuration.
  479. Without these registers, the controller driver is unable to read the
  480. endpoints configuration from the hardware, so we use line 12 instruction
  481. to bypass reading the configuration from silicon, and rely on a
  482. hard-coded table that describes the endpoints configuration instead::
  483. static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
  484. { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  485. { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  486. { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
  487. };
  488. Looking at the configuration table above, we see that each endpoints is
  489. described by three fields: ``hw_ep_num`` is the endpoint number, style is
  490. its direction (either ``FIFO_TX`` for the controller driver to send packets
  491. in the controller hardware, or ``FIFO_RX`` to receive packets from
  492. hardware), and maxpacket defines the maximum size of each data packet
  493. that can be transmitted over that endpoint. Reading from the table, the
  494. controller driver knows that endpoint 1 can be used to send and receive
  495. USB data packets of 512 bytes at once (this is in fact a bulk in/out
  496. endpoint), and endpoint 2 can be used to send data packets of 64 bytes
  497. at once (this is in fact an interrupt endpoint).
  498. Note that there is no information about endpoint 0 here: that one is
  499. implemented by default in every silicon design, with a predefined
  500. configuration according to the USB specification. For more examples of
  501. endpoint configuration tables, see ``musb_core.c``.
  502. Let's now get back to the interrupt handler function:
  503. .. code-block:: c
  504. :emphasize-lines: 18-19
  505. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  506. {
  507. unsigned long flags;
  508. irqreturn_t retval = IRQ_NONE;
  509. struct musb *musb = __hci;
  510. spin_lock_irqsave(&musb->lock, flags);
  511. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  512. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  513. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  514. /*
  515. * The controller is gadget only, the state of the host mode IRQ bits is
  516. * undefined. Mask them to make sure that the musb driver core will
  517. * never see them set
  518. */
  519. musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  520. MUSB_INTR_RESET | MUSB_INTR_SOF;
  521. if (musb->int_usb || musb->int_tx || musb->int_rx)
  522. retval = musb_interrupt(musb);
  523. spin_unlock_irqrestore(&musb->lock, flags);
  524. return retval;
  525. }
  526. Instruction on line 18 above is a way for the controller driver to work
  527. around the fact that some interrupt bits used for USB host mode
  528. operation are missing in the ``MUSB_INTRUSB`` register, thus left in an
  529. undefined hardware state, since this MUSB controller hardware is used in
  530. peripheral mode only. As a consequence, the glue layer masks these
  531. missing bits out to avoid parasite interrupts by doing a logical AND
  532. operation between the value read from ``MUSB_INTRUSB`` and the bits that
  533. are actually implemented in the register.
  534. These are only a couple of the quirks found in the JZ4740 USB device
  535. controller. Some others were directly addressed in the MUSB core since
  536. the fixes were generic enough to provide a better handling of the issues
  537. for others controller hardware eventually.
  538. Conclusion
  539. ==========
  540. Writing a Linux MUSB glue layer should be a more accessible task, as
  541. this documentation tries to show the ins and outs of this exercise.
  542. The JZ4740 USB device controller being fairly simple, I hope its glue
  543. layer serves as a good example for the curious mind. Used with the
  544. current MUSB glue layers, this documentation should provide enough
  545. guidance to get started; should anything gets out of hand, the linux-usb
  546. mailing list archive is another helpful resource to browse through.
  547. Acknowledgements
  548. ================
  549. Many thanks to Lars-Peter Clausen and Maarten ter Huurne for answering
  550. my questions while I was writing the JZ4740 glue layer and for helping
  551. me out getting the code in good shape.
  552. I would also like to thank the Qi-Hardware community at large for its
  553. cheerful guidance and support.
  554. Resources
  555. =========
  556. USB Home Page: http://www.usb.org
  557. linux-usb Mailing List Archives: http://marc.info/?l=linux-usb
  558. USB On-the-Go Basics:
  559. http://www.maximintegrated.com/app-notes/index.mvp/id/1822
  560. :ref:`Writing USB Device Drivers <writing-usb-driver>`
  561. Texas Instruments USB Configuration Wiki Page:
  562. http://processors.wiki.ti.com/index.php/Usbgeneralpage