cpu.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. *
  4. * (C) Copyright 2000-2003
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
  8. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  9. */
  10. #include <common.h>
  11. #include <watchdog.h>
  12. #include <command.h>
  13. #include <netdev.h>
  14. #include <asm/immap.h>
  15. #include <asm/io.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  18. {
  19. rcm_t *rcm = (rcm_t *) (MMAP_RCM);
  20. udelay(1000);
  21. setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
  22. /* we don't return! */
  23. return 0;
  24. };
  25. #if defined(CONFIG_DISPLAY_CPUINFO)
  26. int print_cpuinfo(void)
  27. {
  28. ccm_t *ccm = (ccm_t *) MMAP_CCM;
  29. u16 msk;
  30. u16 id = 0;
  31. u8 ver;
  32. puts("CPU: ");
  33. msk = (in_be16(&ccm->cir) >> 6);
  34. ver = (in_be16(&ccm->cir) & 0x003f);
  35. switch (msk) {
  36. #ifdef CONFIG_MCF5301x
  37. case 0x78:
  38. id = 53010;
  39. break;
  40. case 0x77:
  41. id = 53012;
  42. break;
  43. case 0x76:
  44. id = 53015;
  45. break;
  46. case 0x74:
  47. id = 53011;
  48. break;
  49. case 0x73:
  50. id = 53013;
  51. break;
  52. #endif
  53. #ifdef CONFIG_MCF532x
  54. case 0x54:
  55. id = 5329;
  56. break;
  57. case 0x59:
  58. id = 5328;
  59. break;
  60. case 0x61:
  61. id = 5327;
  62. break;
  63. case 0x65:
  64. id = 5373;
  65. break;
  66. case 0x68:
  67. id = 53721;
  68. break;
  69. case 0x69:
  70. id = 5372;
  71. break;
  72. case 0x6B:
  73. id = 5372;
  74. break;
  75. #endif
  76. }
  77. if (id) {
  78. char buf1[32], buf2[32];
  79. printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
  80. ver);
  81. printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
  82. strmhz(buf1, gd->cpu_clk),
  83. strmhz(buf2, gd->bus_clk));
  84. }
  85. return 0;
  86. };
  87. #endif /* CONFIG_DISPLAY_CPUINFO */
  88. #if defined(CONFIG_WATCHDOG)
  89. /* Called by macro WATCHDOG_RESET */
  90. void watchdog_reset(void)
  91. {
  92. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  93. /* Count register */
  94. out_be16(&wdp->sr, 0x5555);
  95. out_be16(&wdp->sr, 0xaaaa);
  96. }
  97. int watchdog_disable(void)
  98. {
  99. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  100. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  101. /* halted watchdog timer */
  102. setbits_be16(&wdp->cr, WTM_WCR_HALTED);
  103. puts("WATCHDOG:disabled\n");
  104. return (0);
  105. }
  106. int watchdog_init(void)
  107. {
  108. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  109. u32 wdog_module = 0;
  110. /* set timeout and enable watchdog */
  111. wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
  112. #ifdef CONFIG_M5329
  113. out_be16(&wdp->mr, wdog_module / 8192);
  114. #else
  115. out_be16(&wdp->mr, wdog_module / 4096);
  116. #endif
  117. out_be16(&wdp->cr, WTM_WCR_EN);
  118. puts("WATCHDOG:enabled\n");
  119. return (0);
  120. }
  121. #endif /* CONFIG_WATCHDOG */
  122. #if defined(CONFIG_MCFFEC)
  123. /* Default initializations for MCFFEC controllers. To override,
  124. * create a board-specific function called:
  125. * int board_eth_init(bd_t *bis)
  126. */
  127. int cpu_eth_init(bd_t *bis)
  128. {
  129. return mcffec_initialize(bis);
  130. }
  131. #endif