vct.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
  4. *
  5. * Copyright (C) 2006 Micronas GmbH
  6. */
  7. #include <common.h>
  8. #include <command.h>
  9. #include <netdev.h>
  10. #include <asm/mipsregs.h>
  11. #include "vct.h"
  12. #if defined(CONFIG_VCT_PREMIUM)
  13. #define BOARD_NAME "PremiumD"
  14. #elif defined(CONFIG_VCT_PLATINUM)
  15. #define BOARD_NAME "PlatinumD"
  16. #elif defined(CONFIG_VCT_PLATINUMAVC)
  17. #define BOARD_NAME "PlatinumAVC"
  18. #else
  19. #error "vct: No board variant defined!"
  20. #endif
  21. #if defined(CONFIG_VCT_ONENAND)
  22. #define BOARD_NAME_ADD " OneNAND"
  23. #else
  24. #define BOARD_NAME_ADD " NOR"
  25. #endif
  26. DECLARE_GLOBAL_DATA_PTR;
  27. int board_early_init_f(void)
  28. {
  29. /*
  30. * First initialize the PIN mulitplexing
  31. */
  32. vct_pin_mux_initialize();
  33. /*
  34. * Init the EBI very early so that FLASH can be accessed
  35. */
  36. ebi_initialize();
  37. return 0;
  38. }
  39. void _machine_restart(void)
  40. {
  41. reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
  42. reg_write(WDT_TORR(WDT_BASE), 0x00);
  43. reg_write(WDT_CR(WDT_BASE), 0x1D);
  44. /*
  45. * Now wait for the watchdog to trigger the reset
  46. */
  47. udelay(1000000);
  48. }
  49. /*
  50. * SDRAM is already configured by the bootstrap code, only return the
  51. * auto-detected size here
  52. */
  53. int dram_init(void)
  54. {
  55. gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  56. CONFIG_SYS_MBYTES_SDRAM << 20);
  57. return 0;
  58. }
  59. int checkboard(void)
  60. {
  61. char buf[64];
  62. int i = env_get_f("serial#", buf, sizeof(buf));
  63. u32 config0 = read_c0_prid();
  64. if ((config0 & 0xff0000) == PRID_COMP_LEGACY
  65. && (config0 & 0xff00) == PRID_IMP_LX4280) {
  66. puts("Board: MDED \n");
  67. printf("CPU: LX4280 id: 0x%02x, rev: 0x%02x\n",
  68. (config0 >> 8) & 0xFF, config0 & 0xFF);
  69. } else if ((config0 & 0xff0000) == PRID_COMP_MIPS
  70. && (config0 & 0xff00) == PRID_IMP_VGC) {
  71. u32 jedec_id = *((u32 *) 0xBEBC71A0);
  72. if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
  73. puts("Board: VGCA \n");
  74. } else if ((((jedec_id) >> 12) & 0xFF) == 0x48
  75. || (((jedec_id) >> 12) & 0xFF) == 0x49) {
  76. puts("Board: VGCB \n");
  77. }
  78. printf("CPU: MIPS 4K id: 0x%02x, rev: 0x%02x\n",
  79. (config0 >> 8) & 0xFF, config0 & 0xFF);
  80. } else if (config0 == 0x19378) {
  81. printf("CPU: MIPS 24K id: 0x%02x, rev: 0x%02x\n",
  82. (config0 >> 8) & 0xFF, config0 & 0xFF);
  83. } else {
  84. printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
  85. config0);
  86. }
  87. printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);
  88. if (i > 0) {
  89. puts(", serial# ");
  90. puts(buf);
  91. }
  92. putc('\n');
  93. return 0;
  94. }
  95. int board_eth_init(bd_t *bis)
  96. {
  97. int rc = 0;
  98. #ifdef CONFIG_SMC911X
  99. rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
  100. #endif
  101. return rc;
  102. }