ddr3_k2l.c 582 B

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Keystone2: DDR3 initialization
  4. *
  5. * (C) Copyright 2014
  6. * Texas Instruments Incorporated, <www.ti.com>
  7. */
  8. #include <common.h>
  9. #include "ddr3_cfg.h"
  10. #include <asm/arch/ddr3.h>
  11. static struct pll_init_data ddr3_400 = DDR3_PLL_400;
  12. u32 ddr3_init(void)
  13. {
  14. init_pll(&ddr3_400);
  15. /* No SO-DIMM, 2GB discreet DDR */
  16. printf("DRAM: 2 GiB\n");
  17. /* Reset DDR3 PHY after PLL enabled */
  18. ddr3_reset_ddrphy();
  19. ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
  20. ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
  21. return 2;
  22. }