clk-h32mx.c 1.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Atmel Corporation
  4. * Wenyou.Yang <wenyou.yang@atmel.com>
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <dm/util.h>
  10. #include <linux/io.h>
  11. #include <mach/at91_pmc.h>
  12. #include "pmc.h"
  13. DECLARE_GLOBAL_DATA_PTR;
  14. #define H32MX_MAX_FREQ 90000000
  15. static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
  16. {
  17. struct pmc_platdata *plat = dev_get_platdata(clk->dev);
  18. struct at91_pmc *pmc = plat->reg_base;
  19. ulong rate = gd->arch.mck_rate_hz;
  20. if (readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV)
  21. rate /= 2;
  22. if (rate > H32MX_MAX_FREQ)
  23. dev_dbg(clk->dev, "H32MX clock is too fast\n");
  24. return rate;
  25. }
  26. static struct clk_ops sama5d4_h32mx_clk_ops = {
  27. .get_rate = sama5d4_h32mx_clk_get_rate,
  28. };
  29. static int sama5d4_h32mx_clk_probe(struct udevice *dev)
  30. {
  31. return at91_pmc_core_probe(dev);
  32. }
  33. static const struct udevice_id sama5d4_h32mx_clk_match[] = {
  34. { .compatible = "atmel,sama5d4-clk-h32mx" },
  35. {}
  36. };
  37. U_BOOT_DRIVER(sama5d4_h32mx_clk) = {
  38. .name = "sama5d4-h32mx-clk",
  39. .id = UCLASS_CLK,
  40. .of_match = sama5d4_h32mx_clk_match,
  41. .probe = sama5d4_h32mx_clk_probe,
  42. .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
  43. .ops = &sama5d4_h32mx_clk_ops,
  44. };