pmc.c 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Atmel Corporation
  4. * Wenyou.Yang <wenyou.yang@atmel.com>
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <dm/lists.h>
  10. #include <dm/util.h>
  11. #include "pmc.h"
  12. DECLARE_GLOBAL_DATA_PTR;
  13. static const struct udevice_id at91_pmc_match[] = {
  14. { .compatible = "atmel,at91rm9200-pmc" },
  15. { .compatible = "atmel,at91sam9260-pmc" },
  16. { .compatible = "atmel,at91sam9g45-pmc" },
  17. { .compatible = "atmel,at91sam9n12-pmc" },
  18. { .compatible = "atmel,at91sam9x5-pmc" },
  19. { .compatible = "atmel,sama5d3-pmc" },
  20. { .compatible = "atmel,sama5d2-pmc" },
  21. {}
  22. };
  23. U_BOOT_DRIVER(at91_pmc) = {
  24. .name = "at91-pmc",
  25. .id = UCLASS_SIMPLE_BUS,
  26. .of_match = at91_pmc_match,
  27. };
  28. /*---------------------------------------------------------*/
  29. int at91_pmc_core_probe(struct udevice *dev)
  30. {
  31. struct pmc_platdata *plat = dev_get_platdata(dev);
  32. dev = dev_get_parent(dev);
  33. plat->reg_base = (struct at91_pmc *)devfdt_get_addr_ptr(dev);
  34. return 0;
  35. }
  36. /**
  37. * at91_clk_sub_device_bind() - for the at91 clock driver
  38. * Recursively bind its children as clk devices.
  39. *
  40. * @return: 0 on success, or negative error code on failure
  41. */
  42. int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)
  43. {
  44. const void *fdt = gd->fdt_blob;
  45. int offset = dev_of_offset(dev);
  46. bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC);
  47. const char *name;
  48. int ret;
  49. for (offset = fdt_first_subnode(fdt, offset);
  50. offset > 0;
  51. offset = fdt_next_subnode(fdt, offset)) {
  52. if (pre_reloc_only &&
  53. !dm_fdt_pre_reloc(fdt, offset))
  54. continue;
  55. /*
  56. * If this node has "compatible" property, this is not
  57. * a clock sub-node, but a normal device. skip.
  58. */
  59. fdt_get_property(fdt, offset, "compatible", &ret);
  60. if (ret >= 0)
  61. continue;
  62. if (ret != -FDT_ERR_NOTFOUND)
  63. return ret;
  64. name = fdt_get_name(fdt, offset, NULL);
  65. if (!name)
  66. return -EINVAL;
  67. ret = device_bind_driver_to_node(dev, drv_name, name,
  68. offset_to_ofnode(offset), NULL);
  69. if (ret)
  70. return ret;
  71. }
  72. return 0;
  73. }
  74. int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
  75. {
  76. int periph;
  77. if (args->args_count) {
  78. debug("Invalid args_count: %d\n", args->args_count);
  79. return -EINVAL;
  80. }
  81. periph = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(clk->dev), "reg",
  82. -1);
  83. if (periph < 0)
  84. return -EINVAL;
  85. clk->id = periph;
  86. return 0;
  87. }
  88. int at91_clk_probe(struct udevice *dev)
  89. {
  90. struct udevice *dev_periph_container, *dev_pmc;
  91. struct pmc_platdata *plat = dev_get_platdata(dev);
  92. dev_periph_container = dev_get_parent(dev);
  93. dev_pmc = dev_get_parent(dev_periph_container);
  94. plat->reg_base = (struct at91_pmc *)devfdt_get_addr_ptr(dev_pmc);
  95. return 0;
  96. }