Kconfig 8.4 KB

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  1. menuconfig NAND
  2. bool "NAND Device Support"
  3. if NAND
  4. config SYS_NAND_SELF_INIT
  5. bool
  6. help
  7. This option, if enabled, provides more flexible and linux-like
  8. NAND initialization process.
  9. config NAND_DENALI
  10. bool
  11. select SYS_NAND_SELF_INIT
  12. imply CMD_NAND
  13. config NAND_DENALI_DT
  14. bool "Support Denali NAND controller as a DT device"
  15. select NAND_DENALI
  16. depends on OF_CONTROL && DM
  17. help
  18. Enable the driver for NAND flash on platforms using a Denali NAND
  19. controller as a DT device.
  20. config NAND_DENALI_SPARE_AREA_SKIP_BYTES
  21. int "Number of bytes skipped in OOB area"
  22. depends on NAND_DENALI
  23. range 0 63
  24. help
  25. This option specifies the number of bytes to skip from the beginning
  26. of OOB area before last ECC sector data starts. This is potentially
  27. used to preserve the bad block marker in the OOB area.
  28. config NAND_OMAP_GPMC
  29. bool "Support OMAP GPMC NAND controller"
  30. depends on ARCH_OMAP2PLUS
  31. help
  32. Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
  33. GPMC controller is used for parallel NAND flash devices, and can
  34. do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
  35. and BCH16 ECC algorithms.
  36. config NAND_OMAP_GPMC_PREFETCH
  37. bool "Enable GPMC Prefetch"
  38. depends on NAND_OMAP_GPMC
  39. default y
  40. help
  41. On OMAP platforms that use the GPMC controller
  42. (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
  43. uses the prefetch mode to speed up read operations.
  44. config NAND_OMAP_ELM
  45. bool "Enable ELM driver for OMAPxx and AMxx platforms."
  46. depends on NAND_OMAP_GPMC && !OMAP34XX
  47. help
  48. ELM controller is used for ECC error detection (not ECC calculation)
  49. of BCH4, BCH8 and BCH16 ECC algorithms.
  50. Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
  51. thus such SoC platforms need to depend on software library for ECC error
  52. detection. However ECC calculation on such plaforms would still be
  53. done by GPMC controller.
  54. config NAND_VF610_NFC
  55. bool "Support for Freescale NFC for VF610"
  56. select SYS_NAND_SELF_INIT
  57. imply CMD_NAND
  58. help
  59. Enables support for NAND Flash Controller on some Freescale
  60. processors like the VF610, MCF54418 or Kinetis K70.
  61. The driver supports a maximum 2k page size. The driver
  62. currently does not support hardware ECC.
  63. choice
  64. prompt "Hardware ECC strength"
  65. depends on NAND_VF610_NFC
  66. default SYS_NAND_VF610_NFC_45_ECC_BYTES
  67. help
  68. Select the ECC strength used in the hardware BCH ECC block.
  69. config SYS_NAND_VF610_NFC_45_ECC_BYTES
  70. bool "24-error correction (45 ECC bytes)"
  71. config SYS_NAND_VF610_NFC_60_ECC_BYTES
  72. bool "32-error correction (60 ECC bytes)"
  73. endchoice
  74. config NAND_PXA3XX
  75. bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
  76. select SYS_NAND_SELF_INIT
  77. imply CMD_NAND
  78. help
  79. This enables the driver for the NAND flash device found on
  80. PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
  81. config NAND_SUNXI
  82. bool "Support for NAND on Allwinner SoCs"
  83. default ARCH_SUNXI
  84. depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
  85. select SYS_NAND_SELF_INIT
  86. select SYS_NAND_U_BOOT_LOCATIONS
  87. select SPL_NAND_SUPPORT
  88. imply CMD_NAND
  89. ---help---
  90. Enable support for NAND. This option enables the standard and
  91. SPL drivers.
  92. The SPL driver only supports reading from the NAND using DMA
  93. transfers.
  94. if NAND_SUNXI
  95. config NAND_SUNXI_SPL_ECC_STRENGTH
  96. int "Allwinner NAND SPL ECC Strength"
  97. default 64
  98. config NAND_SUNXI_SPL_ECC_SIZE
  99. int "Allwinner NAND SPL ECC Step Size"
  100. default 1024
  101. config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
  102. int "Allwinner NAND SPL Usable Page Size"
  103. default 1024
  104. endif
  105. config NAND_ARASAN
  106. bool "Configure Arasan Nand"
  107. select SYS_NAND_SELF_INIT
  108. imply CMD_NAND
  109. help
  110. This enables Nand driver support for Arasan nand flash
  111. controller. This uses the hardware ECC for read and
  112. write operations.
  113. config NAND_MXC
  114. bool "MXC NAND support"
  115. depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
  116. imply CMD_NAND
  117. help
  118. This enables the NAND driver for the NAND flash controller on the
  119. i.MX27 / i.MX31 / i.MX5 rocessors.
  120. config NAND_MXS
  121. bool "MXS NAND support"
  122. depends on MX23 || MX28 || MX6 || MX7
  123. select SYS_NAND_SELF_INIT
  124. imply CMD_NAND
  125. select APBH_DMA
  126. select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
  127. select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
  128. help
  129. This enables NAND driver for the NAND flash controller on the
  130. MXS processors.
  131. if NAND_MXS
  132. config NAND_MXS_DT
  133. bool "Support MXS NAND controller as a DT device"
  134. depends on OF_CONTROL && MTD
  135. help
  136. Enable the driver for MXS NAND flash on platforms using
  137. device tree.
  138. config NAND_MXS_USE_MINIMUM_ECC
  139. bool "Use minimum ECC strength supported by the controller"
  140. default false
  141. endif
  142. config NAND_ZYNQ
  143. bool "Support for Zynq Nand controller"
  144. select SYS_NAND_SELF_INIT
  145. imply CMD_NAND
  146. help
  147. This enables Nand driver support for Nand flash controller
  148. found on Zynq SoC.
  149. config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
  150. bool "Enable use of 1st stage bootloader timing for NAND"
  151. depends on NAND_ZYNQ
  152. help
  153. This flag prevent U-boot reconfigure NAND flash controller and reuse
  154. the NAND timing from 1st stage bootloader.
  155. config NAND_ARKMICRO
  156. bool "Support for Arkmicro Nand controller"
  157. select SYS_NAND_SELF_INIT
  158. imply CMD_NAND
  159. help
  160. This enables Nand driver support for Nand flash controller
  161. found on Arkmicro SoC.
  162. comment "Generic NAND options"
  163. config SYS_NAND_BLOCK_SIZE
  164. hex "NAND chip eraseblock size"
  165. depends on ARCH_SUNXI
  166. help
  167. Number of data bytes in one eraseblock for the NAND chip on the
  168. board. This is the multiple of NAND_PAGE_SIZE and the number of
  169. pages.
  170. config SYS_NAND_PAGE_SIZE
  171. hex "NAND chip page size"
  172. depends on ARCH_SUNXI
  173. help
  174. Number of data bytes in one page for the NAND chip on the
  175. board, not including the OOB area.
  176. config SYS_NAND_OOBSIZE
  177. hex "NAND chip OOB size"
  178. depends on ARCH_SUNXI
  179. help
  180. Number of bytes in the Out-Of-Band area for the NAND chip on
  181. the board.
  182. # Enhance depends when converting drivers to Kconfig which use this config
  183. # option (mxc_nand, ndfc, omap_gpmc).
  184. config SYS_NAND_BUSWIDTH_16BIT
  185. bool "Use 16-bit NAND interface"
  186. depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
  187. help
  188. Indicates that NAND device has 16-bit wide data-bus. In absence of this
  189. config, bus-width of NAND device is assumed to be either 8-bit and later
  190. determined by reading ONFI params.
  191. Above config is useful when NAND device's bus-width information cannot
  192. be determined from on-chip ONFI params, like in following scenarios:
  193. - SPL boot does not support reading of ONFI parameters. This is done to
  194. keep SPL code foot-print small.
  195. - In current U-Boot flow using nand_init(), driver initialization
  196. happens in board_nand_init() which is called before any device probe
  197. (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
  198. not available while configuring controller. So a static CONFIG_NAND_xx
  199. is needed to know the device's bus-width in advance.
  200. if SPL
  201. config SYS_NAND_U_BOOT_LOCATIONS
  202. bool "Define U-boot binaries locations in NAND"
  203. help
  204. Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
  205. This option should not be enabled when compiling U-boot for boards
  206. defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
  207. file.
  208. config SYS_NAND_U_BOOT_OFFS
  209. hex "Location in NAND to read U-Boot from"
  210. default 0x800000 if NAND_SUNXI
  211. depends on SYS_NAND_U_BOOT_LOCATIONS
  212. help
  213. Set the offset from the start of the nand where u-boot should be
  214. loaded from.
  215. config SYS_NAND_U_BOOT_OFFS_REDUND
  216. hex "Location in NAND to read U-Boot from"
  217. default SYS_NAND_U_BOOT_OFFS
  218. depends on SYS_NAND_U_BOOT_LOCATIONS
  219. help
  220. Set the offset from the start of the nand where the redundant u-boot
  221. should be loaded from.
  222. config SPL_NAND_AM33XX_BCH
  223. bool "Enables SPL-NAND driver which supports ELM based"
  224. depends on NAND_OMAP_GPMC && !OMAP34XX
  225. default y
  226. help
  227. Hardware ECC correction. This is useful for platforms which have ELM
  228. hardware engine and use NAND boot mode.
  229. Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
  230. so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
  231. SPL-NAND driver with software ECC correction support.
  232. config SPL_NAND_DENALI
  233. bool "Support Denali NAND controller for SPL"
  234. help
  235. This is a small implementation of the Denali NAND controller
  236. for use on SPL.
  237. config SPL_NAND_SIMPLE
  238. bool "Use simple SPL NAND driver"
  239. depends on !SPL_NAND_AM33XX_BCH
  240. help
  241. Support for NAND boot using simple NAND drivers that
  242. expose the cmd_ctrl() interface.
  243. endif
  244. endif # if NAND