Kconfig 10 KB

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  1. #
  2. # PINCTRL infrastructure and drivers
  3. #
  4. menu "Pin controllers"
  5. config PINCTRL
  6. bool "Support pin controllers"
  7. depends on DM
  8. help
  9. This enables the basic support for pinctrl framework. You may want
  10. to enable some more options depending on what you want to do.
  11. config PINCTRL_FULL
  12. bool "Support full pin controllers"
  13. depends on PINCTRL && OF_CONTROL
  14. default y
  15. help
  16. This provides Linux-compatible device tree interface for the pinctrl
  17. subsystem. This feature depends on device tree configuration because
  18. it parses a device tree to look for the pinctrl device which the
  19. peripheral device is associated with.
  20. If this option is disabled (it is the only possible choice for non-DT
  21. boards), the pinctrl core provides no systematic mechanism for
  22. identifying peripheral devices, applying needed pinctrl settings.
  23. It is totally up to the implementation of each low-level driver.
  24. You can save memory footprint in return for some limitations.
  25. config PINCTRL_GENERIC
  26. bool "Support generic pin controllers"
  27. depends on PINCTRL_FULL
  28. default y
  29. help
  30. Say Y here if you want to use the pinctrl subsystem through the
  31. generic DT interface. If enabled, some functions become available
  32. to parse common properties such as "pins", "groups", "functions" and
  33. some pin configuration parameters. It would be easier if you only
  34. need the generic DT interface for pin muxing and pin configuration.
  35. If you need to handle vendor-specific DT properties, you can disable
  36. this option and implement your own set_state callback in the pinctrl
  37. operations.
  38. config PINMUX
  39. bool "Support pin multiplexing controllers"
  40. depends on PINCTRL_GENERIC
  41. default y
  42. help
  43. This option enables pin multiplexing through the generic pinctrl
  44. framework. Most SoCs have their own multiplexing arrangement where
  45. a single pin can be used for several functions. An SoC pinctrl driver
  46. allows the required function to be selected for each pin.
  47. The driver is typically controlled by the device tree.
  48. config PINCONF
  49. bool "Support pin configuration controllers"
  50. depends on PINCTRL_GENERIC
  51. help
  52. This option enables pin configuration through the generic pinctrl
  53. framework.
  54. config SPL_PINCTRL
  55. bool "Support pin controllers in SPL"
  56. depends on SPL && SPL_DM
  57. help
  58. This option is an SPL-variant of the PINCTRL option.
  59. See the help of PINCTRL for details.
  60. config SPL_PINCTRL_FULL
  61. bool "Support full pin controllers in SPL"
  62. depends on SPL_PINCTRL && SPL_OF_CONTROL
  63. default n if TARGET_STM32F746_DISCO
  64. default y
  65. help
  66. This option is an SPL-variant of the PINCTRL_FULL option.
  67. See the help of PINCTRL_FULL for details.
  68. config SPL_PINCTRL_GENERIC
  69. bool "Support generic pin controllers in SPL"
  70. depends on SPL_PINCTRL_FULL
  71. default y
  72. help
  73. This option is an SPL-variant of the PINCTRL_GENERIC option.
  74. See the help of PINCTRL_GENERIC for details.
  75. config SPL_PINMUX
  76. bool "Support pin multiplexing controllers in SPL"
  77. depends on SPL_PINCTRL_GENERIC
  78. default y
  79. help
  80. This option is an SPL-variant of the PINMUX option.
  81. See the help of PINMUX for details.
  82. The pinctrl subsystem can add a substantial overhead to the SPL
  83. image since it typically requires quite a few tables either in the
  84. driver or in the device tree. If this is acceptable and you need
  85. to adjust pin multiplexing in SPL in order to boot into U-Boot,
  86. enable this option. You will need to enable device tree in SPL
  87. for this to work.
  88. config SPL_PINCONF
  89. bool "Support pin configuration controllers in SPL"
  90. depends on SPL_PINCTRL_GENERIC
  91. help
  92. This option is an SPL-variant of the PINCONF option.
  93. See the help of PINCONF for details.
  94. if PINCTRL || SPL_PINCTRL
  95. config PINCTRL_AR933X
  96. bool "QCA/Athores ar933x pin control driver"
  97. depends on DM && SOC_AR933X
  98. help
  99. Support pin multiplexing control on QCA/Athores ar933x SoCs.
  100. The driver is controlled by a device tree node which contains
  101. both the GPIO definitions and pin control functions for each
  102. available multiplex function.
  103. config PINCTRL_AT91
  104. bool "AT91 pinctrl driver"
  105. depends on DM
  106. help
  107. This option is to enable the AT91 pinctrl driver for AT91 PIO
  108. controller.
  109. AT91 PIO controller is a combined gpio-controller, pin-mux and
  110. pin-config module. Each I/O pin may be dedicated as a general-purpose
  111. I/O or be assigned to a function of an embedded peripheral. Each I/O
  112. pin has a glitch filter providing rejection of glitches lower than
  113. one-half of peripheral clock cycle and a debouncing filter providing
  114. rejection of unwanted pulses from key or push button operations. You
  115. can also control the multi-driver capability, pull-up and pull-down
  116. feature on each I/O pin.
  117. config PINCTRL_AT91PIO4
  118. bool "AT91 PIO4 pinctrl driver"
  119. depends on DM
  120. help
  121. This option is to enable the AT91 pinctrl driver for AT91 PIO4
  122. controller which is available on SAMA5D2 SoC.
  123. config PINCTRL_PIC32
  124. bool "Microchip PIC32 pin-control and pin-mux driver"
  125. depends on DM && MACH_PIC32
  126. default y
  127. help
  128. Supports individual pin selection and configuration for each
  129. remappable peripheral available on Microchip PIC32
  130. SoCs. This driver is controlled by a device tree node which
  131. contains both GPIO defintion and pin control functions.
  132. config PINCTRL_QCA953X
  133. bool "QCA/Athores qca953x pin control driver"
  134. depends on DM && SOC_QCA953X
  135. help
  136. Support pin multiplexing control on QCA/Athores qca953x SoCs.
  137. The driver is controlled by a device tree node which contains both
  138. the GPIO definitions and pin control functions for each available
  139. multiplex function.
  140. config PINCTRL_ROCKCHIP_RK3036
  141. bool "Rockchip rk3036 pin control driver"
  142. depends on DM
  143. help
  144. Support pin multiplexing control on Rockchip rk3036 SoCs.
  145. The driver is controlled by a device tree node which contains both
  146. the GPIO definitions and pin control functions for each available
  147. multiplex function.
  148. config PINCTRL_ROCKCHIP_RK3128
  149. bool "Rockchip rk3128 pin control driver"
  150. depends on DM
  151. help
  152. Support pin multiplexing control on Rockchip rk3128 SoCs.
  153. The driver is controlled by a device tree node which contains both
  154. the GPIO definitions and pin control functions for each available
  155. multiplex function.
  156. config PINCTRL_ROCKCHIP_RK3188
  157. bool "Rockchip rk3188 pin control driver"
  158. depends on DM
  159. help
  160. Support pin multiplexing control on Rockchip rk3188 SoCs.
  161. The driver is controlled by a device tree node which contains both
  162. the GPIO definitions and pin control functions for each available
  163. multiplex function.
  164. config PINCTRL_ROCKCHIP_RK322X
  165. bool "Rockchip rk322x pin control driver"
  166. depends on DM
  167. help
  168. Support pin multiplexing control on Rockchip rk322x SoCs.
  169. The driver is controlled by a device tree node which contains both
  170. the GPIO definitions and pin control functions for each available
  171. multiplex function.
  172. config PINCTRL_ROCKCHIP_RK3288
  173. bool "Rockchip rk3288 pin control driver"
  174. depends on DM
  175. help
  176. Support pin multiplexing control on Rockchip rk3288 SoCs.
  177. The driver is controlled by a device tree node which contains both
  178. the GPIO definitions and pin control functions for each available
  179. multiplex function.
  180. config PINCTRL_ROCKCHIP_RK3328
  181. bool "Rockchip rk3328 pin control driver"
  182. depends on DM
  183. help
  184. Support pin multiplexing control on Rockchip rk3328 SoCs.
  185. The driver is controlled by a device tree node which contains both
  186. the GPIO definitions and pin control functions for each available
  187. multiplex function.
  188. config PINCTRL_ROCKCHIP_RK3368
  189. bool "Rockchip RK3368 pin control driver"
  190. depends on DM
  191. help
  192. Support pin multiplexing control on Rockchip rk3368 SoCs.
  193. The driver is controlled by a device tree node which contains both
  194. the GPIO definitions and pin control functions for each available
  195. multiplex function.
  196. config PINCTRL_ROCKCHIP_RK3399
  197. bool "Rockchip rk3399 pin control driver"
  198. depends on DM
  199. help
  200. Support pin multiplexing control on Rockchip rk3399 SoCs.
  201. The driver is controlled by a device tree node which contains both
  202. the GPIO definitions and pin control functions for each available
  203. multiplex function.
  204. config PINCTRL_ROCKCHIP_RV1108
  205. bool "Rockchip rv1108 pin control driver"
  206. depends on DM
  207. help
  208. Support pin multiplexing control on Rockchip rv1108 SoC.
  209. The driver is controlled by a device tree node which contains
  210. both the GPIO definitions and pin control functions for each
  211. available multiplex function.
  212. config PINCTRL_SANDBOX
  213. bool "Sandbox pinctrl driver"
  214. depends on SANDBOX
  215. help
  216. This enables pinctrl driver for sandbox.
  217. Currently, this driver actually does nothing but print debug
  218. messages when pinctrl operations are invoked.
  219. config PINCTRL_SINGLE
  220. bool "Single register pin-control and pin-multiplex driver"
  221. depends on DM
  222. help
  223. This enables pinctrl driver for systems using a single register for
  224. pin configuration and multiplexing. TI's AM335X SoCs are examples of
  225. such systems.
  226. Depending on the platform make sure to also enable OF_TRANSLATE and
  227. eventually SPL_OF_TRANSLATE to get correct address translations.
  228. config PINCTRL_STI
  229. bool "STMicroelectronics STi pin-control and pin-mux driver"
  230. depends on DM && ARCH_STI
  231. default y
  232. help
  233. Support pin multiplexing control on STMicrolectronics STi SoCs.
  234. The driver is controlled by a device tree node which contains both
  235. the GPIO definitions and pin control functions for each available
  236. multiplex function.
  237. config PINCTRL_STM32
  238. bool "ST STM32 pin control driver"
  239. depends on DM
  240. help
  241. Supports pin multiplexing control on stm32 SoCs.
  242. The driver is controlled by a device tree node which contains both
  243. the GPIO definitions and pin control functions for each available
  244. multiplex function.
  245. config ASPEED_AST2500_PINCTRL
  246. bool "Aspeed AST2500 pin control driver"
  247. depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
  248. default y
  249. help
  250. Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
  251. Generic Pinctrl framework and is compatible with the Linux driver,
  252. i.e. it uses the same device tree configuration.
  253. endif
  254. source "drivers/pinctrl/meson/Kconfig"
  255. source "drivers/pinctrl/nxp/Kconfig"
  256. source "drivers/pinctrl/renesas/Kconfig"
  257. source "drivers/pinctrl/uniphier/Kconfig"
  258. source "drivers/pinctrl/exynos/Kconfig"
  259. source "drivers/pinctrl/mvebu/Kconfig"
  260. source "drivers/pinctrl/broadcom/Kconfig"
  261. endmenu