pinctrl-uniphier.h 4.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015-2016 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. */
  6. #ifndef __PINCTRL_UNIPHIER_H__
  7. #define __PINCTRL_UNIPHIER_H__
  8. #include <linux/bitops.h>
  9. #include <linux/build_bug.h>
  10. #include <linux/kernel.h>
  11. #include <linux/types.h>
  12. /* drive strength control register number */
  13. #define UNIPHIER_PIN_DRVCTRL_SHIFT 0
  14. #define UNIPHIER_PIN_DRVCTRL_BITS 9
  15. #define UNIPHIER_PIN_DRVCTRL_MASK ((1U << (UNIPHIER_PIN_DRVCTRL_BITS)) \
  16. - 1)
  17. /* drive control type */
  18. #define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
  19. (UNIPHIER_PIN_DRVCTRL_BITS))
  20. #define UNIPHIER_PIN_DRV_TYPE_BITS 2
  21. #define UNIPHIER_PIN_DRV_TYPE_MASK ((1U << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
  22. - 1)
  23. /* drive control type */
  24. enum uniphier_pin_drv_type {
  25. UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
  26. UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
  27. UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
  28. };
  29. #define UNIPHIER_PIN_DRVCTRL(x) \
  30. (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
  31. #define UNIPHIER_PIN_DRV_TYPE(x) \
  32. (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
  33. #define UNIPHIER_PIN_ATTR_PACKED(drvctrl, drv_type) \
  34. UNIPHIER_PIN_DRVCTRL(drvctrl) | \
  35. UNIPHIER_PIN_DRV_TYPE(drv_type)
  36. static inline unsigned int uniphier_pin_get_drvctrl(unsigned int data)
  37. {
  38. return (data >> UNIPHIER_PIN_DRVCTRL_SHIFT) & UNIPHIER_PIN_DRVCTRL_MASK;
  39. }
  40. static inline unsigned int uniphier_pin_get_drv_type(unsigned int data)
  41. {
  42. return (data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
  43. UNIPHIER_PIN_DRV_TYPE_MASK;
  44. }
  45. /**
  46. * struct uniphier_pinctrl_pin - pin data for UniPhier SoC
  47. *
  48. * @number: pin number
  49. * @data: additional per-pin data
  50. */
  51. struct uniphier_pinctrl_pin {
  52. unsigned number;
  53. const char *name;
  54. unsigned int data;
  55. };
  56. /**
  57. * struct uniphier_pinctrl_group - pin group data for UniPhier SoC
  58. *
  59. * @name: pin group name
  60. * @pins: array of pins that belong to the group
  61. * @num_pins: number of pins in the group
  62. * @muxvals: array of values to be set to pinmux registers
  63. */
  64. struct uniphier_pinctrl_group {
  65. const char *name;
  66. const unsigned *pins;
  67. unsigned num_pins;
  68. const int *muxvals;
  69. };
  70. /**
  71. * struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller
  72. *
  73. * @pins: array of pin data
  74. * @pins_count: number of pin data
  75. * @groups: array of pin group data
  76. * @groups_count: number of pin group data
  77. * @functions: array of pinmux function names
  78. * @functions_count: number of pinmux functions
  79. * @mux_bits: bit width of each pinmux register
  80. * @reg_stride: stride of pinmux register address
  81. * @caps: SoC-specific capability flag
  82. */
  83. struct uniphier_pinctrl_socdata {
  84. const struct uniphier_pinctrl_pin *pins;
  85. int pins_count;
  86. const struct uniphier_pinctrl_group *groups;
  87. int groups_count;
  88. const char * const *functions;
  89. int functions_count;
  90. unsigned caps;
  91. #define UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE BIT(3)
  92. #define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2)
  93. #define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1)
  94. #define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0)
  95. };
  96. #define UNIPHIER_PINCTRL_PIN(a, b, c, d) \
  97. { \
  98. .number = a, \
  99. .name = b, \
  100. .data = UNIPHIER_PIN_ATTR_PACKED(c, d), \
  101. }
  102. #define __UNIPHIER_PINCTRL_GROUP(grp) \
  103. { \
  104. .name = #grp, \
  105. .pins = grp##_pins, \
  106. .num_pins = ARRAY_SIZE(grp##_pins), \
  107. .muxvals = grp##_muxvals + \
  108. BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
  109. ARRAY_SIZE(grp##_muxvals)), \
  110. }
  111. #define __UNIPHIER_PINMUX_FUNCTION(func) #func
  112. #ifdef CONFIG_SPL_BUILD
  113. /*
  114. * a tricky way to drop unneeded *_pins and *_muxvals arrays from SPL,
  115. * suppressing "defined but not used" warnings.
  116. */
  117. #define UNIPHIER_PINCTRL_GROUP(grp) \
  118. { .num_pins = ARRAY_SIZE(grp##_pins) + ARRAY_SIZE(grp##_muxvals) }
  119. #define UNIPHIER_PINMUX_FUNCTION(func) NULL
  120. #else
  121. #define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp)
  122. #define UNIPHIER_PINMUX_FUNCTION(func) __UNIPHIER_PINMUX_FUNCTION(func)
  123. #endif
  124. #define UNIPHIER_PINCTRL_GROUP_SPL(grp) __UNIPHIER_PINCTRL_GROUP(grp)
  125. #define UNIPHIER_PINMUX_FUNCTION_SPL(func) __UNIPHIER_PINMUX_FUNCTION(func)
  126. /**
  127. * struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
  128. *
  129. * @base: base address of the pinctrl device
  130. * @socdata: SoC specific data
  131. */
  132. struct uniphier_pinctrl_priv {
  133. void __iomem *base;
  134. struct uniphier_pinctrl_socdata *socdata;
  135. };
  136. extern const struct pinctrl_ops uniphier_pinctrl_ops;
  137. int uniphier_pinctrl_probe(struct udevice *dev,
  138. struct uniphier_pinctrl_socdata *socdata);
  139. #endif /* __PINCTRL_UNIPHIER_H__ */